JPH04290297A - Multilayer circuit board - Google Patents

Abstract

PURPOSE:To reduce a crosstalk noise in a via of a multilayer circuit board formed by laminating a plurality of boards, and connecting inner layer patterns of the boards through vias passing through the boards. CONSTITUTION:Pads arranged on an upper surface of a board of an uppermost layer formed by laminating a plurality of boards, first vias connected at each one end to a pad and so arranged at the other at a predetermined pitch as to pass the board, second vias arranged in parallel with the first vias, and a via connecting pattern so provided on a predetermined layer as to connect the second vias to the predetermined vias of the first vias, are provided. An interval larger than the pitch is formed between the first vias nearest the arranging positions of the second vias and the arranging positions of the second vias. 1-1,1-2,1-3,1-N: board, 2: upper surface, 3: pad, 4: first via, 4-1: predetermined via, 5: second via, 6: via connecting pattern.

Description

[Detailed description of the invention]

0001

[Industrial Application Field] The present invention is a method of laminating a plurality of substrates,
The present invention relates to a multilayer wiring board formed such that inner layer patterns on each board are connected by vias penetrating each board.

A multilayer wiring board made of a ceramic material used in electronic equipment is formed so that a pad is provided on the mounting surface and an inner layer pattern is connected to the pad by bonding a via.

Therefore, when an LSI package or the like is mounted on a multilayer wiring board, the input/output pins of the LSI package are bonded to the pads, and the input/output pins are fixed to the pads.

0004

2. Description of the Related Art A conventional device has been constructed as shown in a side sectional view of FIG. 4. As shown in FIG. 4, a plurality of substrates 1-1 to 1-N each having an inner layer pattern 10 are stacked to have a thickness T, and the upper surface 2 of the uppermost layered substrate 1-1 is The pads 3 are arranged at a predetermined pitch P.

[0005] Also, the pad 3 has a laminated substrate 1-
The first vias 4 are connected by penetrating through 1 to 1-N. Therefore, when mounting the LSI package 7, connect the input/output pin 8 of the LSI package 7 to the pad 3 by bonding the input/output pin 8.
is connected to the inner layer pattern 10 via the first via 4, and signals are input and output to the input/output pin 8.

Therefore, the pitch P of the pad 3 is formed to match the input/output pin 8, and the pitch P of the pad 3 is formed to match the input/output pin 8.
A first via 4 is arranged directly below. On the other hand, in recent years, such LSI packages 7 have become faster and more densely packaged, and the pitch P of the input/output pins 8 tends to be as fine as possible.

[0007]

[Problem to be solved by the invention] Such a pad 3
In the configuration in which the first via 4 is arranged directly below the input/output pin 8 , the pitch P of the input/output pin 8 becomes a minute value, so that the first vias 4 , which are arranged parallel to each other, are closely spaced. It turns out.

[0008] Therefore, there is a problem in that crosstalk noise is generated by the input/output signals propagated to each of the first vias 4, and erroneous signals are input/output to/from the LSI package 7.

Therefore, the present invention aims to reduce crosstalk noise in vias.

0010

[Means for Solving the Problems] FIG. 1 is a diagram explaining the principle of the present invention. As shown in FIG. 1, a plurality of substrates 1-1 to 1-N
pads 3 arranged on the upper surface 2 of the uppermost layer substrate 1-1 formed by laminating the pads 3, and one end of the pads 3
A first via 4 is disposed at a predetermined pitch P such that the other end penetrates through the substrates 1-1 to 1-N, and a first via 4 is disposed parallel to the first via 4. a via connection pattern 6 provided in a predetermined layer to connect the second via 5 to a predetermined via 4-1 of the first via 4; The distance between the first via 4, which is closest to the location where the second via 5 is provided, and the location where the second via 5 is provided is set to be a distance L that is larger than the pitch P, and the uppermost layer substrate 1-1 is The via connection pattern 6 is arranged to connect the predetermined via 4-1 and the second via 5 to the uppermost layer substrate 1-1.
It is configured to be carried out in the following.

[0011] With this configuration, the above-mentioned problem is solved.

0012

[Function] That is, the pads 3 arranged on the upper surface 2 of the uppermost substrate 1-1 are bonded to the pads 3,
A first via 4 is disposed at a predetermined pitch P so as to penetrate through 1 to 1-N, a second via 5 is disposed parallel to the first via 4, and a second via 5 is disposed in parallel with the first via 4. A via connection pattern 6 is provided in a predetermined layer to connect a second via 5 to a predetermined via 4-1, and the predetermined via 4-1 is connected to the second via 5 via the via connection pattern 6. By connecting the first via 4
A distance L, which is larger than the pitch P, is formed between the location where the second via 5 is provided and the location where the second via 5 is provided.

[0013] With this configuration, the arrangement pitch P in the first via 4 becomes small, and if crosstalk noise is caused by the input/output signal propagated to the first via 4, the input/output signal is can be propagated to the second via 5 through a predetermined via 4-1.

[0014] Therefore, by arranging the first vias 4 close to each other, it is possible to prevent input/output of erroneous signals due to crosstalk noise occurring between the first vias 4, thereby improving reliability. I can figure it out.

[0015]

EXAMPLES The present invention will be explained in detail below with reference to FIGS. 2 and 3. FIG. 2 is a side sectional view of an embodiment according to the present invention.
FIG. 3 is a side sectional view of another embodiment of the invention. The same reference numerals indicate the same objects throughout the figures.

As shown in FIG. 2, a plurality of substrates 1-1 to
Pads 3 are arranged at a predetermined pitch P on the upper surface 2 of the uppermost substrate 1-1, which is formed to have a thickness T by laminating 1-N.
The first vias 4 are connected to each other by penetrating the substrates 1-1 to 1-N, and the second vias 5 are arranged parallel to the first vias 4. There is.

Furthermore, a via connection pattern 6 is provided between a predetermined via 4-1 formed to a length H in the first via 4 and a second via 5. 4
-1 connects to the second via 5 via the via connection pattern 6
The first and second vias 4 are formed to be connected to the first and second vias 4.
, 5 are formed so as to be connected to the inner layer patterns 10, respectively.

Therefore, by bonding the input/output pin 8 to the pad 3, input/output signals to the LSI package 7 are transmitted through the first and second vias 4, 5 and the inner layer pattern 10 connected to each.

With this configuration, the second vias 5 can be arranged at locations with a distance L larger than the pitch P of the first vias 4. In reality, the pitch P of such first vias 4 is approximately 1.0 m.
m, and even if the distance is about 1.0 mm, by making the predetermined input/output signal by the predetermined via 4-1 to be transmitted by the second via 5, the first The mutual pitch of the vias 4 can be widened, and the influence of crosstalk noise can be minimized.

Furthermore, in the LSI package 7, the signal system input to the LSI package 7 is
Since the signal system output from the LSI package 7 is generally at a higher level, the influence of crosstalk noise due to the output signal system is large. The influence of crosstalk noise can also be reduced by using via 5.

[0021] Furthermore, in order to reduce the influence of such crosstalk noise, the predetermined length H of the via 4-1
It is necessary to make it as small as possible, and to shorten the distance provided in parallel to the first via 4.

Therefore, in the case shown in FIG. 3, the via connection pattern 6 is provided on the uppermost substrate 1-1. In this way, when the via connection pattern 6 is provided on the top layer substrate 1-1, the length of the predetermined via 4-1 connected to the second via 5 can be set to H1, which is shorter than the aforementioned length H. By further reducing the distance parallel to the first via 4, more effects can be obtained.

[0023]

[Effects of the Invention] As explained above, according to the present invention,
A first via is provided so as to penetrate through each board by being connected to a pad, and a second via is provided at a location away from the first via. By connecting a predetermined via in the second via to the second via using a via connection pattern, the influence of crosstalk noise on the input/output signal in the first via can be reduced.

Therefore, the input/output of erroneous signals due to crosstalk noise as in the conventional method can be avoided, reliability can be improved, and the practical effects are great.

[Brief explanation of the drawing]

[Figure 1] Diagram explaining the principle of the present invention

[Figure 2] Side sectional view of one embodiment according to the present invention

[Figure 3
] Side sectional view of another embodiment of the present invention

[Figure 4] Conventional side sectional view

[Explanation of symbols]

1-1 ~1-N board
2 Top surface 3 Pad
4 First via 5 Second via
6 Via connection pattern 4-1 Predetermined pad

Claims (2)

[Claims] 1. Pads (3) arranged on the upper surface (2) of a top layer substrate (1-1) formed by stacking a plurality of substrates (1-1 to 1-N), and one end thereof. is connected to the pad (3), and the other end is connected to the substrate (1-1 to 1-N
); a second via (5) disposed parallel to the first via (4); The first via (
4) the second via (5) in the predetermined via (4-1);
a via connection pattern (6) provided in a predetermined layer so as to connect the first via (4) closest to the location of the second via (5); A multilayer wiring board characterized in that the distance between the vias (5) and the arrangement location is set to a distance (L) larger than the pitch (P). 2. The top layer substrate (1) according to claim 1;
-1) the via connection pattern (6) is arranged on the uppermost layer substrate (1-1), and the predetermined via (4-1) and the second via (5) are connected to the uppermost layer substrate (1-1). A multilayer wiring board characterized in that