JPH04290265A - Electrooptical detector array and manufacture thereof - Google Patents

Abstract

PURPOSE: To efficiently convert light energy into electrical energy by placing a plurality of semiconductor devices at the support of a dielectric material with a gap. CONSTITUTION: Optical energy enters a P-type region 62 before entering a bulk N-type region 63. Both the P-type region and N-type region of a diode are arranged with a gap along with an adjacent diode. A metal connects the P-type region into one piece electrically without essentially interfering with an incidence light energy. A multiplexer integrated circuit substrate 53 is extended in parallel with the support and includes an array of devices for reading the electrical characteristics of the diode selectively. The elements and the diode have a nearly identical geographical structure arrangement, matching corresponding device and diode. An array 54 of indium post or bump connect the matched and corresponding device and diode.

Description

[Detailed description of the invention]

0001

TECHNICAL FIELD This invention relates generally to electro-optic detector arrays, and more particularly to electro-optic detector arrays in which the front surface of a semiconductor device is illuminated with optical energy and a method of manufacturing the same. The invention also relates to an electro-optic detector array comprising a plurality of semiconductor elements spaced from each other on a support of dielectric material and a method of manufacturing the same.

0002

BACKGROUND OF THE INVENTION Semiconductor electro-optic detectors are either photovoltaic or photoconductive. Different types of electro-optic detectors are used for different wavelength ranges from infrared to ultraviolet. For example, about 8-12 microns and 1-5.
Electromotive force-based electro-optic detectors for the 6 micron infrared wavelength range are often made of mercury cadmium telluride (Hg
CdTe) and indium antimonide (InSb)
Created with. Specific configurations of indium antimonide electro-optic detectors are disclosed, for example, in commonly assigned U.S. Pat. Nos. 3,483,096 and 3,554,818;
and No. 3,577,175. Although an InSb electro-optic detector will be described below, the broad aspects of the invention are not limited to this material.

The single element devices disclosed in the prior patents mentioned above generally include a PN junction in which the P-type region exposed to the optical energy source to be detected is supported by an N-type bulk substrate. The PN junction is typically located within about 4 microns of the surface of the P-type region where the optical energy to be detected is incident. That is, P exposed to the optical radiation that we are trying to detect
The mold region is approximately 4 microns thick or less. For certain InSb devices, the PN junction is formed within 0.5 microns of the surface of the P-type region exposed to radiation. The arrangement of the P-type region is preferably such that optical radiation is directly incident thereon and the photogenerated charge carriers formed in the P-type region can diffuse to the junction somewhat unhindered. Even with this configuration, a significant amount of light energy penetrates through the P-type region to reach the PN junction, generating some more charge carriers there, and even further into the N-type region, generating even more charge carriers. Generate carrier. As long as this absorption in the N-type material does not occur too far from the junction, the charge carriers formed will also diffuse towards the junction. Furthermore, this arrangement allows optical energy not absorbed in the P-type region to directly reach the PN junction. Therefore, if the P-type region is arranged in an indium antimonide detector such that light energy is incident on the P-type region, the efficiency of converting light energy into electrical energy will be relatively high.

Although such a feature has been known for many years, it has not, to our knowledge, been realized in the fabrication of relatively large InSb electro-optic semiconductor detector arrays. In large InSb arrays of the prior art to which we are aware, it has been the practice to illuminate a relatively thick N-type bulk substrate of semiconductor material. In other words, the “back” of the array
The light was shining on the surface. The thickness of the irradiated N-type bulk substrate is typically 10 microns, which increases the probability that the photogenerated charge carriers will interact with crystal defects and other charge carriers in the N-type bulk substrate. This is especially true when exposing the photodetector to energy with the shortest wavelength. This is because the shortest wavelength energy is absorbed closest to the back surface, and the resulting photogenerated charge carriers have to travel the longest distance to the PN junction. Furthermore, light energy in the 1-4 micron range is rarely, if ever able to propagate unhindered through thick materials to the PN junction.

The construction and manufacturing method of a typical prior art indium antimonide photovoltaic detector array is shown in FIG.
and shown in Figure 2. In this and other prior art arrangements, the light energy to be detected is first transferred to a relatively thick layer (approximately 1
(0-20 microns) incident on the N-type bulk substrate. Therefore, P
The distance to the N junction will be approximately 10-20 microns. 1
For the shortest wavelength in the ~5.6 micron band, i.e. 1-3 micron wavelength, the photogenerated charge carriers formed in the N-type bulk substrate in response to the incident light energy are unhindered in the N
The quantum efficiency is relatively low because the mold does not travel through the bulk substrate. On the contrary, the free charge carriers generated by the absorption of light energy, or photons, often interact with the crystal lattice and crystal defects of InSb before reaching the PN junction, so that the carriers dissipate energy and other forms of opposite It is not detected because it recombines with the carrier. Furthermore, the energy of the shortest wavelength reaches the junction without being absorbed by the N-type material, and is hardly able to form a photogenerating carrier there.

The prior art arrangement shown in FIGS. 1 and 2 includes an N-type bulk substrate 23 of indium antimonide approximately 15 mils thick and a P-type region 24 formed thereon. It is connected to the multiplexer board 25 by indium pillars 26. Pillars 26 can be grown on metal contact pads (not shown), typically gold, nickel, or chromium for P-type regions, or on a multiplexer substrate, or a combination of both. A PN junction forming a diode is present at each location of the P-type region 24 on the N-type bulk substrate 23. After connecting the detector assembly, which includes an N-type bulk substrate 23 and an array of P-type regions 24 formed by gas diffusion or ionic bombardment, to a multiplexer substrate 25, the bulk substrate is heated to approximately 10 microns as shown in FIG. , mechanically and/or chemically thinned and polished. Multiplexer substrate 25 includes electronic circuitry having switching elements of substantially the same topography as P-type region 24 . Electronic circuitry on multiplexer board 25 selectively reads signals from selected diodes of the electro-optic detector array through indium bumps to one or a few common signal leads of the multiplexer chip. This reads out the optical energy incident on the surface of the N-type bulk substrate 23 that generally corresponds to the P-type region 24 connected to the indium pillar or bump 26 selected by the circuitry of the N-type bulk substrate 25 of the multiplexer. .

To withstand mechanical forces during and after mechanical thinning of the bulk substrate, an epoxy layer is placed between the array containing the N-type bulk substrate 23 and the P-type region 24 and the multiplexer 25. Inject the binding agent. A binder fills the spaces between the indium pillars or bumps 26.

In use, the structure of FIG. 2 is arranged so that optical energy is first incident on the N-type bulk substrate 23. In use, the structure of FIG. The light energy forms a pair of electron and hole free charge carriers for each photon absorbed within the bulk substrate 23 . When the minority carriers, holes in the indium antimonide N-type bulk substrate 23, recombine with the majority carriers, no current is generated and no optical energy is detected. However, when minority carriers diffuse across the junction between the N-type bulk substrate 23 and a particular P-type region 24, a current is generated in the P-type region.

Whether minority carriers diffuse beyond the junction depends on (1) the distance from the position where electron-hole pairs are formed by the incident light energy to the junction position, and (2) the diffusion distance in the bulk material 23. , and (3) determined by the defect density of the bulk material, which acts as a recombination center. These defects may be present even before processing is performed. However, other defects may be formed by some of the many processing steps, such as ion implantation, thinning operations, and/or bump bonding agent implantation. Generally, the efficiency of a detector for converting optical energy into electrical energy decreases as the distance between the junction and the surface upon which the optical energy first enters increases.

Thinning and polishing the N-type bulk substrate 23 places severe stress on the detector, which often results in N-type bulk substrate 23 being thinned and polished.
Cracks occur in the mold bulk substrate. The abrasives and mechanical abrasion used to thin the N-type bulk substrate 23 cause microcrystalline damage on the surface of the bulk material to which light energy is first incident. Crystallite damage has a very detrimental effect on the electrical properties of the array. The resulting deterioration of the bulk material of the N-type bulk substrate 23 on which the optical energy is incident increases the surface recombination rate of the N-type bulk substrate and dramatically reduces the quantum efficiency. The effect is particularly significant when the shortest wavelength is absorbed near the surface of the N-type bulk substrate 23.

Detector arrays are typically used at cryogenic temperatures, such as in the range of liquid helium or liquid nitrogen. At liquid nitrogen temperatures, no reduction in short wavelength quantum efficiency occurs in InSb arrays, but as the temperature decreases further down to the liquid helium temperature range (of interest to astronomers), the diffusion length (described above) decreases significantly, The performance of technology devices is reduced. Also, when used at liquid nitrogen temperatures, severe mechanical distortion occurs in the array due to thermal expansion mismatch between the N-type bulk substrate 23 and the multiplexer substrate 25. The very thin bulk material of the N-type bulk substrate 23 cannot necessarily accommodate the resulting strains and may cause breakage or deformation of the material between the indium pillars 26 and the N-type bulk substrate 23 or the pads thereon. May damage the bond.

Another drawback of prior art methods is that the bulk substrate thinning process is performed after the detector wafer is cut into individual chips and after bump bonding is performed. Therefore, for example, if there are 10 arrays on one wafer, the thinning process will be performed 10 times, resulting in an expensive processing technique.

[0013]

SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a new and improved electro-optic detector array and method of manufacturing the same.

Another object of the present invention is to provide a new and improved electro-optic detector array and method of manufacturing the same in which the PN junction is located in close proximity to the surface upon which optical energy is initially incident. be.

Yet another object of the present invention is a new and improved electro-optic detector for infrared energy as described above, having a relatively high quantum efficiency for wavelengths across the spectrum of infrared energy in the 1-5.6 micron wavelength band. and its manufacturing method.

Yet another object of the present invention is to provide an improved new electro-optic system for use in cryogenic environments whose mechanical and electrical properties are stable even when the array is subjected to extreme temperature cycling. An object of the present invention is to provide a detector and a method for manufacturing the same.

Yet another object of the present invention is to provide a new and improved electro-optic detector array that performs all detector processing prior to connecting the wafer to external control circuitry or multiplexer type N bulk substrates. That's true.

Still another object of the invention is to have a relatively high quantum efficiency across the spectrum of intended uses and to maintain mechanical properties even when used at cryogenic temperatures and when subjected to temperature cycling between cryogenic temperatures and ambient temperatures. An object of the present invention is to provide a new and improved indium antimonide detector array having stable electrical characteristics and a method for manufacturing the same.

Yet another object of the present invention is to provide a P-type solution for indium antimonide so that the infrared light energy to be detected is first incident on the P-type material of the detector rather than the N-type material.
An object of the present invention is to provide a new and improved indium antimonide detector array in which a pattern material is arranged and a method for manufacturing the same.

[0020]

[Means for Solving the Problems] In the first aspect of the present invention,
An electro-optical detector consists of a mechanical support of dielectric material and an array of semiconductor diodes on this support. The diode has electrical properties that are influenced by optical energy incident thereon and includes a junction separating first and second differently doped regions. The features of this detector are that the first and second
are arranged on a support that transmits the optical energy to be detected, and are arranged such that the optical energy to be detected is incident on the first area before propagating within the support and entering the second area; Also, the diodes are configured as islands on the support so that adjacent diodes have their respective double regions spaced apart from each other.

[0021] In a detector according to another aspect of the present invention, the first and second regions are arranged on a support that transmits the light energy to be detected, and the light energy to be detected is propagated within the support. It is arranged such that it enters the first region before entering the second region, the second region is formed of a thinned bulk material, and the first region is formed as a layer on the bulk material. .

In yet another aspect of the invention, an electro-optic detector comprises a mechanical support of dielectric material and an InS
b Consists of a two-dimensional array of semiconductor diodes. The diode includes a junction separating a P-doped region and an N-doped region. A feature of this detector is that both regions are arranged on a support that transmits the optical energy to be detected, and that the optical energy to be detected propagates through the support and enters the P-doped region before being incident on the N-doped region. It is to be arranged so that it is incident.

In one preferred embodiment, the metal electrodes electrically connected to the support and connecting the first regions to each other are arranged so as not to substantially impede light energy incident on the first regions. It is desirable to arrange the diodes in a matrix,
The metal electrodes are arranged as a grid of intersecting bands extending orthogonally to each other or as a film with windows so that the light energy to be detected is incident on the first region. The material and thickness forming the first region are determined such that charge carriers generated by optical energy absorbed in the first region diffuse to the junction without substantially recombining with other charge carriers. Ru. Also, the first region is preferably formed as a gas diffusion bulk material or an ion implantation layer.

In one preferred embodiment, a multiplexer integrated circuit board extends parallel to the support and is equipped with an array of elements for selectively reading out the electrical characteristics of the diodes. The elements and diodes are provided with substantially the same topographic structure, the positions of corresponding elements and diodes are aligned, and the two are connected by an array of metal bumps.

The semiconductor optical array of diodes is preferably formed as a PN junction on the bulk semiconductor of the first conductivity type and near its surface. Each joint is
It exists between the bulk semiconductor of the first conductivity type and the semiconductor region of the second conductivity type. The electrode is formed by metallizing a portion of the semiconductor region of the second conductivity type. The array is joined to the support by coupling a semiconductor region of a first conductivity type to the support such that an optical path within the support continues to at least a portion of the semiconductor region of the first conductivity type. The islands are formed by reducing the thickness of the bulk substrate with the semiconductor region bonded to the support and etching the thinned bulk substrate. At this time, each island includes a corresponding region of the bulk semiconductor, a junction, and one of the second conductivity type semiconductor regions.

[0026] The above and other objects and features of the present invention,
BRIEF DESCRIPTION OF THE DRAWINGS The advantages and advantages thereof will become apparent from the following detailed description of some specific embodiments, in particular with reference to the accompanying drawings.

[0027]

[Embodiment] Next, a description will be given with reference to FIG. This figure shows a photovoltaic indium antimonide infrared detector diode array 52 for radiation in the 1-1.5 micron wavelength range mounted on an optically transparent support 51. A multiplexer integrated circuit board 53 extending parallel to the support 51 is connected by indium pillars 54 to the diodes of the array.

The diodes of the array 52 are arranged in a support 51 that is transparent to the light energy to be detected, such that the light energy to be detected is incident on the P-type doped regions 62 of the diodes before the N-type bulk substrate regions 63 of the diodes of the array. Arrange as shown. The diodes of the array are formed as islands, with adjacent diodes spaced apart from each other with a dielectric between them. The PN junctions between P-type regions 62 and N-type regions 63 of the diodes of array 52 are located within about 4 microns (typically within about 0.5 microns) of the surface of each diode on which the light energy to be detected first impinges. ) position. Because of the close proximity of the individual junctions to the surface on which the light energy first enters, the charge carriers formed in the P-type region 62 diffuse directly into the junctions, and the charge carriers formed in the P-type region 62 diffuse directly into the junctions, and throughout the wavelength range of interest, including the shortest wavelength end of the spectrum. Efficient transfer of optical energy to electrical energy by the semiconductor diodes of array 52 occurs. The current in the N-type regions of the diodes of the array 52 resulting from the incidence of light energy is transferred through the metal contact pads 55 of the N-type region 63 and from the connections of the metal pads through the indium pillars 54 to the elements of the multiplexer 53. be done.

The support 51 of dielectric material, which is transparent to the light energy to be detected, is an epoxy adhesive layer 58 overlaid on a metal grid layer 59, generally formed of intersecting gold strips extending in mutually orthogonal directions. A dielectric plate 57 (e.g. sapphire or gallium) serving as a window, covered on the back side with
(formed with arsenic). The metal lattice layer 59 has each P
The mold region 62 is grounded to a reference potential level such as the ground. The majority of the metal grid 59 obscures most of all the P-type regions 62 of the indium antimonide diodes of the array 52 and is transparent to the optical energy to be detected, as is the case with the dielectric plate 57, preferably made of monoxide. It extends beyond the oxide layer 61 formed of silicon or silicon dioxide. The metal pad 55 is placed on the surface of the N-type region 63, away from the surface of the P-type region 62 on which the light energy to be detected first enters.

A metal grid 59 extends through a portion of the oxide layer 61 and establishes contact with the front side of each of the P-type regions 62. Because the percentage of the area of each front face of region 62 covered by metal grid 59 is relatively small, the metal grid obscures a substantial portion of the otherwise exposed front face of P-type region 62. do not have. Although the diodes of array 52 and metal grid 59 are preferably arranged in a square matrix, this need not necessarily be the case. For example, the diodes of array 2 can be arranged in a linear, rectangular, or even circular arrangement. Typically, the array associated with the present invention will consist of at least 16 diodes.

The P-type region 62, N-type region 63, and corresponding junction of each indium antimonide diode in array 52 ensure that almost all of the 1-2 micron optical radiation to be detected is absorbed in the P-type region or junction. However,
The arrangement is such that radiation with a wavelength of 2 microns or more passes through the P-type region and the junction to some extent to the N-type region. To this end, the distance from the electrical PN junction between regions 62 and 63 to the surface of P-type region 62 in contact with oxide layer 61 is less than 4 microns, typically less than 0.5 microns; The thickness of N-type region 63 is between 5 microns and 20 microns. With this configuration, a significant number of photons are absorbed near the junction, and charge carriers generated by the incident optical radiation diffuse into the junction without recombination. This improves the quantum efficiency of converting optical energy into electrical energy, particularly in the short wavelength region of 1 to 2 microns.

Oxide layer 61 engages the top and side surfaces of P-type region 62 and the side surfaces of N-type region 63 to provide an electrically insulating layer for the PN junction. The oxide layer 61 also includes indium antimonide of the array 52, as described below.
The etching solution used to separate the diodes into islands is prevented from attacking the metal grid layer 59.

A preferred method of forming the structure shown in FIG. 3 is illustrated in FIGS. 4-7. First, as shown in Figure 4,
A P-type region 62 is formed on a bulk N-type indium antimonide substrate 71, eg, about 10 mils thick, using a gas evaporation process or ion bombardment. Next, an oxide layer 61 and a metal lattice 59 are sequentially deposited on the exposed upper surfaces of the N-type bulk substrate 71 and the P-type region 62.
A structure as shown in FIG. 5 is formed. (FIG. 5 schematically shows the top surface of the metal lattice layer 59 and the P-type region 62 and the N-type bulk substrate 71. For clarity, the oxide layer 61 is not shown.) As a result, a rectangular array of mutually spaced P-type regions 62 is formed to cover the upper surface of the N-type bulk substrate 71, and a matrix-matrix array of the N-type bulk substrate not covered with P-type regions is formed. remain. The metal lattice 59 has a P-type region 62 and an N
Cover the illustrated surface portion of the mold bulk substrate 71.

A guide plate or window 57 is adhered to the exposed surfaces of metal grid 59 and oxide layer 61 by an epoxy adhesive layer 58 to form the structure shown in FIG. Generally, surfaces of indium antimonide that are exposed to optical energy are provided with an antireflective coating by methods well known to those skilled in the art. For clarity, the anti-reflection coating is not shown.

After forming the structure shown in FIG. 4, the thickness of the N-type bulk substrate 71 is reduced to about 10 to 2, as shown in FIG.
reduced to 0 microns. Reducing the thickness of the N-type bulk substrate 71 means thinning the N-type bulk substrate by conventional mechanical or chemical means. Next, Figure 6
An etchant mask is formed in exposed areas of the bulk substrate layer 71 that generally correspond to areas of the oxide layer that contact the N-type bulk substrate 71 . Next, a chemical etchant for indium antimonide is applied to the etchant mask and the exposed surface of the N-type bulk substrate 71 to form trenches between the N-type regions 63, as shown in FIG. Grooves can also be formed in the detector material using dry or plasma etching or ion beam milling. The grooves separate individual islands of detector material to form individual discrete detector diodes. This forms a number of diodes spaced apart from each other, each having a P-type region 62 and an N-type region 63. The N-type regions of all diodes are mechanically and electrically isolated from each other. The P-type regions of the diodes are all mechanically separated from each other, but electrically interconnected by a metal grid 59.

After fabricating the structure shown in FIG. 7, metal ohmic contact pads 55 (FIG. 3) are deposited on N-type regions 63 and pillars or bumps 54 are grown on the metal pads. In particular, the connection between the multiplexer substrate 53 and the diodes of the array 52 is carried out by growing indium pillars or bumps 54 in areas of the multiplexer that correspond to the metal pads and/or the diodes of the array 52 and are topographically matched. . The wafer is then cut into individual arrays that are bump connected to multiplexer readouts.

P-type indium antimonide "islands" with a common N-type indium antimonide N-type bulk substrate
In contrast to the structure of the prior art (generally referring to a "P on N" structure), the structure of the present invention is
Each island has an N-type region above a P-type region,
Form a separate diode with a PN junction. In the prior art, optically generated carriers had to travel through many microns of N-type indium antimonide to reach the carrier collection region. In of the present invention
In the Sb example, the optically generated carriers are 0.
The carrier collection region is reached by simply moving the P-type region 62 of 5 microns (or less). In the present invention, the P-type material of the islands is electrically connected to the metal grid pattern 59, and all of the diode islands are mechanically separated from each other by etching the material between the P-type layers. Due to these elements, the present invention can be regarded as a structure in which "N is placed on P".

The only reason for thinning the N-type bulk substrate in the present invention is to perform the etch step, ie, the removal of a significant amount of material between the P-type regions, at high speed and with minimal lateral etching. Because the device is illuminated from the "front" or P-type region side, mechanical damage caused by processing of the N-type bulk material does not adversely affect the optical and electrical sensing characteristics of the array. In many cases, the P-type region is located at a distance from the surface of the InSb where the energy to be detected is incident.
Only less than a micron. By locating the carrier collection region very close to the surface where the energy to be detected is incident, the minority carriers are spread over a "long" distance (approximately 10 microns) through the dense N-type material of the recombination center. All the problems you have to do will be solved.

In the present invention, since the detector material is processed essentially in the form of a wafer, the planarity
and improved thickness control. In many cases, the detector and multiplexer N-type bulk substrates can be made of the same material or materials with the same or similar coefficients of thermal expansion, thus eliminating the stress problem in the N-type bulk substrate 71 during the manufacturing process. Therefore, virtually no stress occurs that would cause the bonding of the indium columns 54 to fail. Furthermore, the adjacent N-type region 6
3, the electrical isolation of the detector diodes of array 52 is complete and optical and electrical leakage between the diodes of array 52 is eliminated. By physically removing the indium antimonide between adjacent diodes of the array, laterally diffusing charge carriers are decoupled from adjacent diodes.
).

By isolating the individual indium antimonide diode detector islands, thermal expansion stresses are removed from the detector material. Thermal stress problems in the highly brittle indium antimonide detector material are eliminated due to the small size of the individual islands forming the detector array 52. In the prior art, thermal stress problems often occurred due to thermal expansion of the indium antimonide N-type bulk substrate relative to the N-type bulk substrate of the multiplexer. In the prior art, since the area of the bulk indium antimonide was comparable to the area of the multiplexer, stress was created in the indium antimonide due to expansion of the indium antimonide relative to the multiplexer. Since the diodes of the present invention are formed as small spatially separated islands, the expansion of the diode elements is negligible compared to the expansion of the multiplexer.

Therefore, the structure of FIG. 3 first has a bulk N
An InSb type InSb wafer is used to produce InS by a normal process.
Begin by forming the b diode array. The surface of the wafer is then altered by diffusion or ion implantation to form a P-type layer. The "mesa" diode array formation method uses a photomask and etching process to create P-type (and some N-type) regions between the desired P-type regions.
Individual P-type mesa regions are formed by etching the InSb (type). Since the P-type region is typically only about 0.4 microns, the etching is very shallow, on the order of 1-4 microns. The edge of each diode's PN junction is exposed on the sidewall of each mesa. A pattern of oxides and metals is then deposited onto this surface immediately prior to bonding to the transparent support. Subsequent back thinning and etching operations are performed in accordance with the present invention as previously described in connection with FIGS. 3-7.

The principles of the invention can also be applied to "mesaless" processes and structures, as shown in FIGS. 8 and 9. The "no-mesa" process also begins by forming a P-type layer on the surface of an N-type wafer by diffusion or ion implantation. A "no-mesa" process omits the etching step to form individual P-type mesa regions. The oxide and metal layers are coated with P immediately before bonding to the transparent support.
Deposit onto the surface of the mold. Thinning and back etching proceed as previously described with respect to FIGS. 6 and 7. A back etch removes the InSb (both N-type and P-type) between adjacent diodes to form individual diodes. This causes the edge of each diode's PN junction to
Exposed on the sidewalls of the islands forming each diode. N-type region 63 is formed from an N-type bulk substrate without a mesa. P
Mold region 62 is formed on the substrate similarly to the previous description, except that a "window" metal pattern is created. The subsequent deposition of metal contact pads and growth of indium pillars are the same for either method of diode formation.

In the embodiment of the invention shown in FIGS. 8 and 9,
Instead of the metal grid 59 of FIG. 3, a metal layer 81 with windows 82 is used. Window 82 is placed over the exposed surface of the P-type region and has an area slightly smaller than the area of the P-type region. Thereby, the P-type region is connected to the metal layer 81. Since window 82 and metal layer 81 are smaller in area than P-type region 62, all P-type regions are connected together. The N-type regions of the diodes of detector array 52 are electrically separated from metal layer 81 by oxide layer 61 . Since the area of window 82 can be more precisely controlled than the area of the P-type or N-type regions, the uniformity of response to light energy is improved compared to the structure of FIG. 3. The window structures of FIGS. 8 and 9 can also be used with the type of mesa structure shown in FIG.

Although some specific embodiments of the invention have been described, modifications in the details of the embodiments described herein do not depart from the true spirit and scope of the invention as defined by the claims. can be achieved without For example, in the illustrated embodiment, there is very little shading interference of the incident light energy by metal grid 59 or metal layer 81. In yet other embodiments, it is possible to create significantly larger shadow defects (eg, up to 99%).

[Brief explanation of the drawing]

FIG. 1 shows an indium antimonide infrared detector array according to the prior art.

FIG. 2 shows an indium antimonide infrared detector array according to the prior art.

FIG. 3 is a side view of a preferred embodiment of an indium antimonide detector array according to the present invention.

FIG. 4 shows an intermediate structure used to form the indium antimonide detector array of FIG. 3;

FIG. 5 illustrates an intermediate structure used to form the indium antimonide detector array of FIG. 3;

FIG. 6 shows an intermediate structure used to form the indium antimonide detector array of FIG. 3;

FIG. 7 shows an intermediate structure used to form the indium antimonide detector array of FIG. 3;

FIG. 8 is a side cross-sectional view of another preferred embodiment of the invention.

9 is a cross-sectional plan view taken along line 9-9 of FIG. 8. FIG.

[Explanation of symbols]

51 Dielectric material support 52 Detector array 53 Multiplexer board 54 Pillar or bump 55 Metal contact pad 57 Window 59 Metal grid 61 Oxide layer 62 P-type region 63 N-type region 71 N type bulk substrate

Claims (13)

[Claims] 1. A mechanical support of dielectric material and an array of semiconductor diodes on the support, the diodes having electrical properties influenced by light energy incident thereon, a first and a second an electro-optical detector having a junction separating regions of different doping, the detector being arranged on a support in which the first and second regions are transparent to the light energy to be detected; the diodes are configured as islands on the support such that adjacent diodes are spaced apart from each other; An electro-optical detector comprising both the above regions. 2. A mechanical support of dielectric material and an array of semiconductor diodes on said support, said diodes having electrical properties influenced by light energy incident thereon, said first and second an electro-optical detector having a junction separating regions of different doping, the detector being arranged on a support in which the first and second regions are transparent to the light energy to be detected; the light energy to be transmitted through the support and incident on the first region before being incident on the second region, the second region being formed of a thinned bulk material, and the first region being formed of a layer on the bulk material. An electro-optic detector characterized in that it is formed as: 3. An electro-optic detector comprising a mechanical support of dielectric material and a two-dimensional array of semiconductor diodes on the support, the diodes having a junction separating a P-doped region and an N-doped region, , the detector is arranged on a support through which the region transmits the light energy to be detected, and the light energy to be detected passes through the support and is incident on the P-doped region before entering the N-doped region. An electro-optical detector characterized in that it is arranged as follows. 4. Further, a first
4. An electro-optic detector according to any one of claims 1 to 3, characterized in that it has metal electrodes connecting the regions to each other so as not to substantially interfere with the light energy incident on the first region. . 5. The diodes are arranged in rows and columns and the metal electrodes are arranged as a grid of intersecting strips extending orthogonally to each other or with windows so that the light energy to be detected can be incident on the first region. 5. The electro-optical detector according to claim 4, wherein the electro-optical detector is arranged as a film. 6. The first region is made of a material such that charge carriers generated by light energy absorbed in the first region diffuse to the junction without substantially recombining with other charge carriers; and has a thickness for that purpose,
The electro-optical detector according to any one of claims 1 to 5. 7. An electro-optical detector according to claim 1 or any one of claims 3 to 6, characterized in that the second region is formed of a thinned bulk material. 8. Detector according to claim 1, characterized in that the first region is formed as a gas-diffused bulk material or as an ion-implanted layer. 9. Any one of claims 1 and 2 or claims 4 to 8, characterized in that the diode is made of InSb, the first region is a P-type bulk material, and the second region is an N-type bulk material. The electro-optical detector described in . 10. Further comprising a multiplexer integrated circuit board having an array of elements extending parallel to the support and selectively reading out electrical characteristics of the diodes, the elements and the diodes having substantially identical topographical structures. rice cake,
10. An electro-optic detector according to any preceding claim, characterized in that the corresponding elements and the diodes are matched, and furthermore a metal bump connects the corresponding matched elements and the diodes. 11. Claims 2 to 10, characterized in that the diodes are configured as islands on a support, and adjacent diodes have regions spaced apart from each other.
Electro-optic detector as described. 12. A semiconductor optical array of diodes comprising:
A PN junction is formed on the bulk semiconductor of the second conductivity type near the surface of the bulk semiconductor, each junction is disposed between the bulk semiconductor of the second conductivity type and the semiconductor region of the first conductivity type, and electrodes are formed by metallizing a portion of the semiconductor region of the first conductivity type, and the array is joined to the support by bonding the semiconductor region of the first conductivity type to the support, whereby an optical path is formed through the support. an island is formed by reducing the thickness of the bulk substrate down to at least a portion of the semiconductor region of the first conductivity type, the semiconductor region remaining coupled to the support, and etching the reduced thickness of the bulk substrate; Claim 11 according to claims 4 to 10, or claim 4 according to claim 1, whereby each island comprises a corresponding region of the bulk semiconductor, a junction and one of the semiconductor regions of the first conductivity type. Electro-optic detector as described. 13. A method for manufacturing a semiconductor optical detector, wherein a bulk semiconductor of a first conductivity type and a second conductivity type are disposed on a bulk semiconductor of a first conductivity type in the vicinity of a surface of the bulk semiconductor.
forming an array of PN junctions located between the semiconductor region of the second conductivity type; metallizing a portion of the semiconductor region; bonding the semiconductor region of the second conductivity type to the transparent support such that the semiconductor region is present on the support, reducing the thickness of the bulk substrate while leaving the semiconductor region bonded to the support; forming an array of diode islands, each of which covers a corresponding region of the bulk semiconductor;
etching a reduced thickness bulk substrate to have one of a junction and a second conductivity type semiconductor region.