JPH04290234A - Semiconductor device - Google Patents

Abstract

PURPOSE:To lower the concentration of an emitter without causing a punchthrough and without deteriorating a current gain by a method wherein the junction of an N-type epitaxial layer with a P-type buried layer is used as an emitter-base junction. CONSTITUTION:Arsenic or anitmony is introduced into a P-type silicon substrate 1 by an ion implantation operation or a thermal diffusion operation; a high- concentration N-type buried layer 2 is formed; boron ions are introduced to form a P-type buried layer 3; an N-type epitaxial layer 4 is grown. In addition, a high-concentration N-type collector extraction layer 5 and a high-concentration base extraction layer 6 are formed; after that, a high-concentration emitter 7 is formed. When a low-concentration deep subemitter is formed instead of the N-type epitaxial layer 4, the region of the P-type base buried layer is made thin and a high-frequency characteristic can be enhanced.

Description

[Detailed description of the invention]

0001

FIELD OF THE INVENTION This invention relates to bipolar integrated circuits.

0002

2. Description of the Related Art FIG. 4 shows the impurity distribution in the depth direction of a conventional NPN bipolar transistor.

Following the high concentration N-type emitter with a peak concentration of 1020 to 1021 cm from the surface, a 1×1018 to 5×1018 cm emitter is formed by ion implantation or the like.
A P-type base with a peak concentration of −3 is formed.

Further, the N-type epitaxial layer 4 having a constant concentration of 1015 to 1016 cm-3 is followed by 1018 to 101
A P-type silicon substrate with a thickness of 1014 to 1015 cm-3 is formed after a high concentration N-type collector buried layer with a peak concentration of 9 cm-3.

Conventionally, in order to prevent punch-through between the collector and emitter and improve current gain, a junction is conventionally formed between the emitter and the base at a concentration of 10 18 cm -3 or more.

[0006]

In a conventional bipolar transistor, a highly doped N-type emitter and a P-type base layer form a very highly doped junction.

[0007] Therefore, the electric field within the depletion layer generated by applying a reverse voltage to the emitter-base junction becomes extremely high. As shown in FIG. 5, hot carriers are generated to form a trap level 13 near the surface of the emitter-base junction, causing a leak in the base current when a forward bias is applied to the emitter-base junction.

[0008] When a reverse voltage (reverse bias) is applied to the emitter-base junction for a long time, there is a problem in that the current gain decreases from the region where the collector current is small, as shown in FIG.

[0009]

[Means for Solving the Problems] A semiconductor device of the present invention includes:
A first buried layer of an opposite conductivity type serving as a collector is formed on a semiconductor substrate of one conductivity type, and a second buried layer of one conductivity type serving as a base is formed in a part of the first buried layer; It includes a bipolar transistor in which an epitaxial layer of opposite conductivity type is formed over the entire surface.

0010

[Example] Regarding the first example of the present invention, FIG. 1(a)
, (b).

As shown in FIG. 1(b), the surface concentration 102
An N-type epitaxial layer serving as a sub-emitter follows the N-type emitter with a high concentration of 0 to 1021 cm-3. Thereafter, a P-type base with a peak concentration of 1017 to 1018 cm-3, a collector consisting of an N-type buried layer of 1018 to 1019 cm-3, and a P-type silicon substrate with a peak concentration of 1014 to 1015 cm-3 are formed.

As shown in FIG. 1(a), arsenic or antimony is introduced into a P-type silicon substrate 1 by ion implantation or thermal diffusion to form a high concentration N-type buried layer 2, and boron is introduced to form a P-type buried layer 2. A type buried layer 3 is formed, and an N type epitaxial layer 4 is formed.
grow.

Further, after forming a highly doped N-type collector lead-out layer 5 and a heavily-doped base lead-out layer 6, a highly doped N-type emitter 7 is formed.

Next, a second embodiment of the present invention will be explained with reference to FIG. By forming a deep, low-concentration sub-emitter instead of the N-type epitaxial layer, the region of the P-type base buried layer can be made thinner and the high frequency characteristics can be improved.

Next, a third embodiment of the present invention will be described with reference to FIG.

In this case, a heavily doped P-type emitter 12 is formed, an N-type epitaxial layer 4 is used as a base, and a P-type buried layer 3 is formed.
A complementary circuit is constructed by adding a PNP transistor having the P-type extraction layer 6 as a collector. P-type insulation isolation layer 9 and field oxide film 8
This enables isolation between elements.

[0017]

[Effect of the invention] By using a junction between an N-type epitaxial layer and a P-type buried layer as an emitter-base junction,
The emitter concentration could be lowered without causing punch-through or deterioration of current gain.

[0018] Deterioration in current gain caused by trapping of hot carriers due to a strong electric field when a reverse voltage is applied between the emitter and base has been eliminated.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view and a graph of impurity distribution showing a first embodiment of the present invention.

FIG. 2 is a graph of impurity distribution showing a second example of the present invention.

FIG. 3 is a sectional view showing a third embodiment of the present invention.

FIG. 4 is a graph of impurity distribution of an NPN transistor according to the prior art.

FIG. 5 is a cross-sectional view showing problems in the prior art.

FIG. 6 is a graph showing the deterioration of current gain of an NPN transistor according to the prior art.

[Explanation of symbols]

1 P-type silicon substrate 2 High concentration N-type buried layer 3 P-type buried layer 4 N-type epitaxial layer 5 Collector drawer layer 6 Base drawer layer 7 High concentration N type emitter 8 Field oxide film 9 P-type insulation layer 10 High concentration P type emitter 11 P type base 12 Silicon oxide film 13 Trap level

Claims (1)

[Claims] 1. A first buried layer of an opposite conductivity type serving as a collector is formed on a semiconductor substrate of one conductivity type, and a second buried layer of one conductivity type serving as a base is formed in a part of the first buried layer. layers are formed,
A semiconductor device that includes a bipolar transistor in which an epitaxial layer of opposite conductivity type is formed over the entire surface.