JPH04287209A - Computer system - Google Patents

Computer system

Info

Publication number
JPH04287209A
JPH04287209A JP3051995A JP5199591A JPH04287209A JP H04287209 A JPH04287209 A JP H04287209A JP 3051995 A JP3051995 A JP 3051995A JP 5199591 A JP5199591 A JP 5199591A JP H04287209 A JPH04287209 A JP H04287209A
Authority
JP
Japan
Prior art keywords
storage device
computer system
main storage
failure occurs
power supply
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3051995A
Other languages
Japanese (ja)
Inventor
Satoyuki Suzuki
智行 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Office Systems Ltd
Original Assignee
NEC Office Systems Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Office Systems Ltd filed Critical NEC Office Systems Ltd
Priority to JP3051995A priority Critical patent/JPH04287209A/en
Publication of JPH04287209A publication Critical patent/JPH04287209A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To eliminate the need of storage holding operations from a computer system and to enable the system to execute a processing which was executed by the system before a power failure occurs in a short time after the power supply is restored by using an SRAM as the main storage device of the system. CONSTITUTION:An SRAM is used as the main storage device of this computer system. Accordingly, storage holding operations, such as power supply, etc., become unnecessary and the memory state of the main storage device before a power failure occurs can be maintained. The initializing programs of LSIs 4 for controlling peripheral devices are stored in a ROM 3. When the power supply is restored, the programs are loaded and the LSIs 4 for controlling peripheral equipments are initialized. Since the memory state of the main storage device 1 is maintained in the same state as the before the power failure occurs, an operating system and application program are immediately set to executable states. Therefore, the processing which was executed before the power failure occurs can be executed in a short time after the power supply is restored.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明はコンピュータシステムに
関し、特に、電源投入時の処理方式を改良したコンピュ
ータシステムに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a computer system, and more particularly to a computer system with an improved power-on processing method.

【0002】0002

【従来の技術】従来のコンピュータシステムの一例を図
3に示す。図4は従来のコンピュータシステムの機能構
成図である。このコンピュータシステムは、主記憶装置
1と中央演算処理装置2とROM3と周辺機器制御用L
SI4とハードディスク5とを具備する。
2. Description of the Related Art An example of a conventional computer system is shown in FIG. FIG. 4 is a functional configuration diagram of a conventional computer system. This computer system includes a main storage device 1, a central processing unit 2, a ROM 3, and a peripheral device control L.
It includes an SI 4 and a hard disk 5.

【0003】電源を再投入すると、ROMに格納された
プログラムをロード(ステップ31)した後、OS(オ
ペレーティングシステム)をロードし(ステップ32)
、主記憶装置上に展開する。次にOS内に格納されたプ
ログラムにより、周辺機器制御用LSIの初期化処理を
行ない(ステップ33)、さらにAP(アプリケーショ
ンプログラム)をロードし(ステップ34)、主記憶装
置上へ展開する。このような順序で処理を行なうことに
より、コンピュータシステムは実行可能状態となる。
When the power is turned on again, the program stored in the ROM is loaded (step 31), and then the OS (operating system) is loaded (step 32).
, expanded on main storage. Next, the peripheral device control LSI is initialized using the program stored in the OS (step 33), and an AP (application program) is loaded (step 34) and expanded onto the main storage device. By performing the processing in this order, the computer system becomes executable.

【0004】0004

【発明が解決しようとする課題】上述した従来のコンピ
ュータシステムにおいては、主記憶装置は電源断の状態
では、記憶を保持していないため、電源を再投入するた
びに、主記憶装置上へのOSのロード、APのロードを
行なう処理を実行しているため、実行可能状態となるま
での処理時間を必要とする問題点がある。
[Problems to be Solved by the Invention] In the above-mentioned conventional computer system, the main memory does not retain memory when the power is turned off, so every time the power is turned on again, data is stored in the main memory. Since the process of loading the OS and the AP is executed, there is a problem in that it requires processing time until the state becomes executable.

【0005】[0005]

【課題を解決するための手段】本発明のコンピュータシ
ステムは、主記憶装置にSRAMを用い、電源再投入時
には、周辺機器制御用LSIの初期化処理を行なうプロ
グラムがLSIに格納されており、そのプログラムをロ
ードし実行するだけで実行可能状態に立ち上がることを
特徴とする。
[Means for Solving the Problems] The computer system of the present invention uses an SRAM as the main storage device, and when the power is turned on again, a program is stored in the LSI for initializing the peripheral device control LSI. It is characterized by being ready to run simply by loading and running the program.

【0006】[0006]

【実施例】次に、本発明について図面を参照して説明す
る。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be explained with reference to the drawings.

【0007】図1は本発明の一実施例のプログラムロー
ド方式を示す図である。図2は本発明の一実施例の機能
構成図である。
FIG. 1 is a diagram showing a program loading method according to an embodiment of the present invention. FIG. 2 is a functional configuration diagram of an embodiment of the present invention.

【0008】図2には、主記憶装置1と、中央演算処理
装置2と、ROM3と、周辺機器制御用LSI4とが示
されている。主記憶装置1は、SRAMを用いることに
より電源供給などの記憶保持動作が不要であり、電源断
前の主記憶装置のメモリ状態を保持することができる。 中央演算処理装置2は、従来のコンピュータシステムと
機能は同一である。ROM3は従来のコンピュータシス
テムではOSに格納されていた、周辺機器制御用LSI
4の初期化処理を行なうプログラムを格納している。
FIG. 2 shows a main storage device 1, a central processing unit 2, a ROM 3, and an LSI 4 for controlling peripheral devices. By using SRAM, the main memory device 1 does not require memory retention operations such as power supply, and can maintain the memory state of the main memory device before the power is turned off. The central processing unit 2 has the same functions as a conventional computer system. ROM3 is an LSI for peripheral device control that is stored in the OS in conventional computer systems.
It stores a program that performs the initialization process of step 4.

【0009】次にこのコンピュータシステムの動作を説
明する。電源を再投入することにより、ROM3よりプ
ログラムをロード(ステップ11)する。このプログラ
ムをロードするだけで周辺機器制御用LSI4の初期化
処理は終了する(ステップ12)。さらに主記憶装置の
メモ状態は電源断前のまま保持されているので、すぐに
OSおよびAPは実行可能状態となる。このような、コ
ンピュータシステムを利用することで、電源断前の処理
が再立上げ後、短時間で実行可能状態となり、またOS
やAPのロード処理が再立ち上げ時に不用なコンピュー
タシステムの構築が可能となる。
Next, the operation of this computer system will be explained. By turning the power back on, the program is loaded from the ROM 3 (step 11). Just by loading this program, the initialization process of the peripheral device control LSI 4 is completed (step 12). Furthermore, since the memo state of the main storage device is maintained as it was before the power was turned off, the OS and AP become executable immediately. By using such a computer system, the processing that was performed before the power was turned off can be executed in a short time after restarting, and the OS
It becomes possible to construct a computer system that does not require loading processing of AP or AP at the time of restart.

【0010】0010

【発明の効果】以上説明したように、本発明によれば、
主記憶装置が電源断前のメモリ状態を保持しているので
、電源断前の処理が再立ち上げ後、短時間で実行可能と
なる効果が得られる。
[Effects of the Invention] As explained above, according to the present invention,
Since the main storage device retains the memory state before the power is turned off, the effect is that the processing before the power is turned off can be executed in a short time after the power is restarted.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】本発明の一実施例のプログラムロード方式を示
す図である。
FIG. 1 is a diagram showing a program loading method according to an embodiment of the present invention.

【図2】本発明の一実施例の機能構成図である。FIG. 2 is a functional configuration diagram of an embodiment of the present invention.

【図3】従来例のプログラムロード方式を示す図である
FIG. 3 is a diagram showing a conventional program loading method.

【図4】従来例の機能構成図である。FIG. 4 is a functional configuration diagram of a conventional example.

【符号の説明】[Explanation of symbols]

1    主記憶装置 2    中央演算処理装置 3    ROM 4    周辺機器制御用LSI 5    ハードディスク 11    LSIロードステップ 1 Main memory 2 Central processing unit 3 ROM 4 LSI for peripheral device control 5 Hard disk 11 LSI road step

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】  主記憶装置にSRAMを用い、電源再
投入時には、周辺機器制御用LSIの初期化処理を行な
うプログラムがLSIに格納されており、そのプログラ
ムをロードし実行するだけで実行可能状態に立ち上がる
ことを特徴とするコンピュータシステム。
Claim 1: An SRAM is used as the main storage device, and when the power is turned on again, a program for initializing the peripheral device control LSI is stored in the LSI, and the program can be executed by simply loading and executing the program. A computer system that stands up.
JP3051995A 1991-03-18 1991-03-18 Computer system Pending JPH04287209A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3051995A JPH04287209A (en) 1991-03-18 1991-03-18 Computer system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3051995A JPH04287209A (en) 1991-03-18 1991-03-18 Computer system

Publications (1)

Publication Number Publication Date
JPH04287209A true JPH04287209A (en) 1992-10-12

Family

ID=12902438

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3051995A Pending JPH04287209A (en) 1991-03-18 1991-03-18 Computer system

Country Status (1)

Country Link
JP (1) JPH04287209A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5513351A (en) * 1994-07-28 1996-04-30 International Business Machines Corporation Protecting a system during system maintenance by usage of temporary filenames in an alias table

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5513351A (en) * 1994-07-28 1996-04-30 International Business Machines Corporation Protecting a system during system maintenance by usage of temporary filenames in an alias table

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