JPH04276822A - Register display circuit for information processor - Google Patents

Abstract

PURPOSE:To enable an information processor to read and display the content of the register of the information processor without connecting a debug device thereto. CONSTITUTION:A mode switching circuit 3 that receives a register display request 7 from a control panel 6 separates the connection between an internal bus and a central processing unit 1, connects between the central processing unit 1 and a register read circuit 4, the register read circuit 4 receives a register read instruction 8 from a control panel 6 and sends a microinstruction 9 to a mode switching circuit 3 for reading the content of a register specified by the control panel 6. Further, the mode switching circuit 3 sends the microinstruction 9 to the central processing unit 1, receives the content of the register from the central processing unit 1, sends the content 10 of the register to a register read circuit 4, while the register read circuit 4 sends the content 11 of the register to a register display circuit 6, whereby a register display circuit 5 sends the content 12 of the register to the control panel 6 to display.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a register display of an information processing apparatus, and more particularly to a register display circuit that reads and displays the contents of a register upon mode switching of a register display request from a control panel.

0002

2. Description of the Related Art Conventionally, the register display of this type of information processing apparatus has been such that the contents of the register cannot be read without connecting a debugging device.

0003

[Problems to be Solved by the Invention] As mentioned above, conventional information processing devices have a system in which the contents of registers cannot be read without connecting a debug device, so it is difficult to identify the cause of a problem when it occurs. It has the disadvantage of being difficult.

An object of the present invention is to read out and display the contents of a specified register by switching the mode of a register display request from a control panel, thereby solving the above-mentioned drawbacks and making it possible to eliminate the need for connecting a debug device. Another object of the present invention is to provide a register display circuit for an information processing device that can read and display the contents of a register of the information processing device.

[0005]

[Means for Solving the Problems] A register display circuit of an information processing device of the present invention has a central processing unit, a memory for storing FW, and a control panel, and the central processing unit and the memory can be connected according to instructions from the control panel. In the register display circuit of an information processing device that displays the contents of the registers of the central processing unit of the information processing device, data processing is performed between the central processing unit and the memory based on commands from the control panel. a mode switching circuit that switches the operating mode between the operating mode and at least one other operating mode; and a register reading circuit that is switched by the mode switching circuit and reads out the contents of the register specified by the display register specified by a command from the control panel. and a register display circuit that displays on a control panel the contents of the register read by the register read circuit.

[0006]

Embodiments Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of a register display circuit of an information processing apparatus according to an embodiment of the present invention.

In FIG. 1, the register display circuit of the information processing apparatus of this embodiment includes a central processing unit 1, a memory 2 for storing FW, a mode switching circuit 3, a register reading circuit 4, and a register display circuit 5. and a control panel 6.

Normally, in the normal mode in which data processing is performed between the central processing unit 1 and the memory 2 that stores the FW, the mode switching circuit 3 switches between the memory 2 that stores the FW.
The central processing unit 1 is connected to an internal bus connected to the central processing unit 1.

[0010] Then, in the register content display mode based on the register display request 7 that requests display of the register content from the control panel 6, the mode switching circuit 3 disconnects the internal bus from the central processing unit 1;
The central processing unit 1 and the register reading circuit 4 are connected.

A register reading circuit 4 connected to the central processing unit 1 by a mode switching circuit 3 receives a register reading instruction 8 from a control panel 6 and issues a microinstruction 9 to read the contents of the register specified by the control panel 6. The signal is sent to the mode switching circuit 3. The mode switching circuit 3, which has received the microinstruction 9 from the register reading circuit 4, sends the microinstruction 9 to the central processing unit 1 and receives the contents of the register from the central processing unit 1. The mode switching circuit 3 that receives the contents of the register from the central processing unit 1 sends the contents 10 of the register to the register reading circuit 4. The register reading circuit 4 receives the register contents 10 from the mode switching circuit 3 and sends the register contents 11 to the register display circuit 5.

The register display circuit 5 receives the register contents 11 from the register read circuit 4, and sends the register contents 12 to the control panel 6 for display. Thereafter, the contents of the register specified by the control panel 6 are read and displayed until a register display termination request is received from the control panel 6.

The mode switching circuit 3 receives a register display termination request from the control panel 6, and the central processing unit 4
The connection between the CPU 1 and the register reading circuit 4 is disconnected, the central processing unit 1 is connected to the internal bus, and the process returns to normal processing.

[0014]

As explained above, the register display circuit of the information processing apparatus of the present invention reads and displays the contents of the specified register by switching the mode of the register display request from the control panel. This has the advantage that the contents of the register of the information processing device can be read and displayed without connecting a debug device.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a register display circuit of an information processing device according to an embodiment of the present invention.

[Explanation of symbols]

1 Central processing unit 2 Memory for storing FW 3 Mode switching circuit 4 Register reading circuit 5 Register display circuit 6 Control panel 7 Register display request 8 Register read instruction 9. Micro instructions

Claims (1)

[Claims] 1. The central processing unit of an information processing device, which has a central processing unit, a memory for storing FW, and a control panel, and performs data processing between the central processing unit and the memory according to instructions from the control panel. In a register display circuit of an information processing device that displays the contents of a register of a processing device, there is a normal operation mode in which data processing is performed between the central processing unit and the memory according to a command from the control panel, and at least one other mode. a mode switching circuit for switching between operating modes; a register reading circuit for reading out the contents of a register that is switched by the mode switching circuit and designated by a display register specified by a command from the control panel; A register display circuit for an information processing device, comprising: a register display circuit that displays read contents of a register on the control panel.