JPH04276640A - Ic package - Google Patents
Ic packageInfo
- Publication number
- JPH04276640A JPH04276640A JP3825691A JP3825691A JPH04276640A JP H04276640 A JPH04276640 A JP H04276640A JP 3825691 A JP3825691 A JP 3825691A JP 3825691 A JP3825691 A JP 3825691A JP H04276640 A JPH04276640 A JP H04276640A
- Authority
- JP
- Japan
- Prior art keywords
- package
- test
- mounting board
- pads
- mounting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004020 conductor Substances 0.000 claims abstract description 10
- 239000004065 semiconductor Substances 0.000 claims abstract description 5
- 238000007789 sealing Methods 0.000 claims description 2
- 239000000758 substrate Substances 0.000 claims description 2
Landscapes
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
Description
【0001】0001
【産業上の利用分野】本発明はICパッケージに関し、
特に表面実装用ICパッケージに関する。[Industrial Application Field] The present invention relates to an IC package.
In particular, it relates to a surface mount IC package.
【0002】0002
【従来の技術】従来の表面実装用ICパッケージの一例
を図2に示す。ICパッケージ2内の半導体の端子は、
実装基板3へ実装する面のみ入出力端子21が出ている
。入出力端子21は、実装基板3に作られた実装基板接
続用パッド31にハンダ付けされ、配線32を通し他の
ICと接続され、電子回路が構成されている。2. Description of the Related Art An example of a conventional surface-mount IC package is shown in FIG. The terminals of the semiconductor inside the IC package 2 are
Input/output terminals 21 are exposed only on the surface to be mounted on the mounting board 3. The input/output terminals 21 are soldered to mounting board connection pads 31 made on the mounting board 3, and connected to other ICs through wiring 32 to form an electronic circuit.
【0003】この電子回路を試験する場合、表面実装用
ICの入出力端子21へは直接接触することができない
ため、実装基板3の配線32に試験用パッド33又は試
験用スルーホール34を設けている。When testing this electronic circuit, since it is not possible to directly contact the input/output terminals 21 of the surface mount IC, test pads 33 or test through holes 34 are provided in the wiring 32 of the mounting board 3. There is.
【0004】0004
【発明が解決しようとする課題】この従来の表面実装用
ICパッケージでは、実装基板の配線上に試験用パッド
又は試験用スルーホールを設けて試験を行なうため、試
験用パッド又は試験用スルーホールが実装基板上大きな
面積を有し、表面実装ICを使用する小型化のメリット
がない。[Problems to be Solved by the Invention] In this conventional surface mount IC package, a test pad or a test through hole is provided on the wiring of the mounting board to conduct a test. It requires a large area on the mounting board, and there is no advantage of miniaturization using surface-mounted ICs.
【0005】又、電子回路の試験は、実装基板の配線上
のパッド又はスルーホールにて行なわれるため、表面実
装ICの入出力端子と実装基板接続用パッドとの導通試
験ができないという欠点がある。[0005] Furthermore, since testing of electronic circuits is carried out on pads or through holes on the wiring of the mounting board, there is a drawback that it is not possible to test continuity between the input/output terminals of the surface mount IC and the connection pads of the mounting board. .
【0006】[0006]
【課題を解決するための手段】本発明のICパッケージ
は、表面実装用ICパッケージにおいて、ICパッケー
ジ内半導体基板の端子よりパッケージ封止外側上面に引
き出された導体と、この導体の先端に設けられた試験用
パッドとを備えている。[Means for Solving the Problems] The IC package of the present invention is a surface mount IC package, and includes a conductor drawn out from a terminal of a semiconductor substrate inside the IC package to an upper surface outside the package sealing, and a conductor provided at the tip of the conductor. It is equipped with a test pad.
【0007】[0007]
【実施例】次に本発明について図面を参照して説明する
。DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be explained with reference to the drawings.
【0008】図1は本発明の一実施例の斜視図である。
ICパッケージ1の上面に、試験用パッド13を設け、
導体12でICパッケージ内半導体の端子(図示せず)
と試験用パッド13とを接続している。FIG. 1 is a perspective view of one embodiment of the present invention. A test pad 13 is provided on the top surface of the IC package 1,
Conductor 12 connects the terminal of the semiconductor inside the IC package (not shown)
and the test pad 13 are connected.
【0009】本発明のICパッケージ1を実装基板へ実
装し他のICとで構成された電子回路を試験する場合、
ICパッケージ1の上面に設けた試験用パッド13に試
験治具を接触させることにより、導体12及びICパッ
ケージ1の入出力端子11の2つの経路のそれぞれを通
して試験を行なうことができる。When the IC package 1 of the present invention is mounted on a mounting board and an electronic circuit composed of other ICs is tested,
By bringing a test jig into contact with the test pad 13 provided on the top surface of the IC package 1, a test can be performed through each of the two paths of the conductor 12 and the input/output terminal 11 of the IC package 1.
【0010】0010
【発明の効果】以上説明したように本発明は、ICパッ
ケージの上面に試験用パッドを設けることにより、実装
基板側に試験用パッド又は試験用スルーホールを作る必
要がなく、表面実装ICの小型化のメリットが生かせる
。[Effects of the Invention] As explained above, the present invention provides a test pad on the top surface of an IC package, thereby eliminating the need to create a test pad or a test through hole on the mounting board side, thereby reducing the size of surface-mounted ICs. You can take advantage of the benefits of
【0011】又、実装基板へのIC搭載後、接続パッド
とICの入出力端子との接続性試験を行なうことができ
るという効果を有する。[0011] Furthermore, after mounting the IC on the mounting board, it is possible to perform a connectivity test between the connection pad and the input/output terminal of the IC.
【図1】本発明の一実施例の斜視図である。FIG. 1 is a perspective view of an embodiment of the invention.
【図2】従来のICパッケージの一例を示す斜視図であ
る。FIG. 2 is a perspective view showing an example of a conventional IC package.
1,2 ICパッケージ 3,2−2 実装基板 11,21 入出力端子 12 導体 13,33 試験用パッド 31 実装基板接続用パッド 32 配線 34 試験用スルーホール 1, 2 IC package 3,2-2 Mounting board 11, 21 Input/output terminal 12 Conductor 13,33 Test pad 31 Mounting board connection pad 32 Wiring 34 Test through hole
Claims (1)
ICパッケージ内半導体基板の端子よりパッケージ封止
外側上面に引き出された導体と、この導体の先端に設け
られた試験用パッドとを備えることを特徴とするICパ
ッケージ。[Claim 1] In a surface mount IC package,
An IC package characterized by comprising a conductor drawn out from a terminal of a semiconductor substrate within the IC package to an upper surface outside the package sealing, and a test pad provided at the tip of the conductor.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3825691A JPH04276640A (en) | 1991-03-05 | 1991-03-05 | Ic package |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3825691A JPH04276640A (en) | 1991-03-05 | 1991-03-05 | Ic package |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH04276640A true JPH04276640A (en) | 1992-10-01 |
Family
ID=12520239
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3825691A Pending JPH04276640A (en) | 1991-03-05 | 1991-03-05 | Ic package |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH04276640A (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62152428A (en) * | 1985-12-27 | 1987-07-07 | 安田 信美 | Glass automatic washer |
-
1991
- 1991-03-05 JP JP3825691A patent/JPH04276640A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62152428A (en) * | 1985-12-27 | 1987-07-07 | 安田 信美 | Glass automatic washer |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR950030325A (en) | Semiconductor package | |
JP2568748B2 (en) | Semiconductor device | |
JPS63296292A (en) | Semiconductor device | |
JP2856195B2 (en) | Device mounting structure on circuit board | |
JPH04273451A (en) | Semiconductor device | |
JP2907127B2 (en) | Multi-chip module | |
KR960035997A (en) | Semiconductor package and manufacturing method | |
JPH04276640A (en) | Ic package | |
JP3150560B2 (en) | Semiconductor device | |
JPH06181375A (en) | Auxiliary supporting part and semiconductor device using the same | |
JPS6154656A (en) | Semiconductor device | |
JP2004031432A (en) | Semiconductor device | |
JPH04216653A (en) | Package for semiconductor integrated circuit and its packaging method | |
JPH04129288A (en) | Hybrid integrated circuit device | |
JPH04225545A (en) | Surface mounting type integrated circuit | |
JPH04111742U (en) | hybrid integrated circuit | |
KR20060075070A (en) | Fbga package memory module for test | |
JPH02239577A (en) | Hybrid integrated circuit for surface mounting | |
JPH02216778A (en) | Mixture integrated circuit device | |
JPS592137U (en) | semiconductor equipment | |
JPH0362538A (en) | Electrode terminal | |
JPH02223178A (en) | Socket for semiconductor device | |
JPH11186435A (en) | Integrated circuit for mounting surface | |
JPH08293663A (en) | Wiring board and electronic apparatus | |
JPH08181241A (en) | Chip carrier and semiconductor device using chip carrier |