JPH0427134A - Measuring device for dc parameter of semiconductor - Google Patents

Measuring device for dc parameter of semiconductor

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Publication number
JPH0427134A
JPH0427134A JP13219490A JP13219490A JPH0427134A JP H0427134 A JPH0427134 A JP H0427134A JP 13219490 A JP13219490 A JP 13219490A JP 13219490 A JP13219490 A JP 13219490A JP H0427134 A JPH0427134 A JP H0427134A
Authority
JP
Japan
Prior art keywords
measurement
semiconductor
pins
measuring device
mount
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13219490A
Other languages
Japanese (ja)
Inventor
Jun Murata
純 村田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Electron Ltd
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Priority to JP13219490A priority Critical patent/JPH0427134A/en
Publication of JPH0427134A publication Critical patent/JPH0427134A/en
Pending legal-status Critical Current

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  • Testing Of Individual Semiconductor Devices (AREA)
  • Measuring Leads Or Probes (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

PURPOSE:To improve measurement accuracy by installing an electric measurement means per measurement pin in a device which places a plurality of measurement pins into contact with electrodes of a semiconductor device formed on a semiconductor wafer and measures DC parameters of said device with an electric means. CONSTITUTION:A probe section 2 of the measurement device holds a semiconductor wafer 3 and provides a mount 4 movable in the direction of X-Y-Z directions where a probe card 6 equipped with a plurality of measurement pins 6 is fixedly installed on the mount. The drive of the mount 4 forces the measurement pins 5 to come into contact with the electrode pad formed between semiconductor chips of the semiconduc tor wafer 3. A measurement section 1 is provided with the same number of measure ment units 7 to the aforesaid measurement pins 5, and electrically connected with each measurement pin 5 by way of conductor patterns and the like formed on the probe card 6. Moreover, a voltage measuring instrument 8, an electric current measur ing instrument 9, and a capacity measuring instrument 10 are installed thereon. A change-over mechanism 11 allows the respective measuring instruments from 8 to 10 to be changed over. This construction makes it possible to prevent the occurrence of leakage current or voltage drop in a matrix where no large matrix does not exist.

Description

【発明の詳細な説明】 [発明の目的] (産業上の利用分野) 本発明は、半導体DCパラメータ測定装置に関する。[Detailed description of the invention] [Purpose of the invention] (Industrial application field) The present invention relates to a semiconductor DC parameter measurement device.

(従来の技術) 従来から、半導体製造に係る分野においては、製造工程
の監視、開発、不良解析等のために半導体ウェハ上に形
成した半導体素子(例えばトランジスタ等)のDCパラ
メータ(例えば電流、電圧、電気容量等)を、半導体D
Cパラメータ測定装置により1llj定することが行わ
れている。
(Prior Art) Traditionally, in the field of semiconductor manufacturing, DC parameters (e.g. current, voltage, , electric capacity, etc.), semiconductor D
1llj is determined using a C parameter measuring device.

例えば、製造工程の監視等においては、半導体ウェハ上
に形成された通常の半導体チップの間に、テスト用のチ
ップ(TEG:1est element group
)を予め設けておき、このテスト用のチップのDCパラ
メータを測定すること等が行われている。
For example, in monitoring manufacturing processes, test chips (TEG: 1st element group) are placed between normal semiconductor chips formed on a semiconductor wafer.
) is provided in advance and the DC parameters of the test chip are measured.

このような半導体DCパラメータ測定装置は、半導体ウ
ェハ上に形成された多数の電極パッドとの電気的な導通
を得るため、多数の測定ピンを有している。また、電気
的測定機構としては、例えば電流測定機構、電圧測定機
構、電気容量測定機構等がそれぞれ1つ設けられている
。そして、これらの電気的測定機構と多数の測定ピンと
の間に介在させた電気的な切換機能を有する電気回路網
(以下マトリクスという。)によって、測定を行う測定
ピンを選択し、順次切換ることによって各測定ピンにつ
いて1つの電気的61定機構により測定を行っている。
Such a semiconductor DC parameter measuring device has a large number of measurement pins in order to obtain electrical continuity with a large number of electrode pads formed on a semiconductor wafer. Further, as the electrical measuring mechanism, for example, one current measuring mechanism, one voltage measuring mechanism, one capacitance measuring mechanism, etc. are provided. Then, an electrical circuit network (hereinafter referred to as a matrix) having an electrical switching function that is interposed between these electrical measurement mechanisms and a large number of measurement pins selects the measurement pins to be measured and switches them sequentially. Accordingly, each measurement pin is measured by one electrical 61 constant mechanism.

なお、上記マトリクスは、例えば多数の機械的なリレー
を組合せることによって構成される。
Note that the matrix is configured by, for example, combining a large number of mechanical relays.

(発明が解決しようとする課題) しかしながら、一般に半導体DCパラメータ測定装置に
おいては、測定ピンが数十水(例えば50本)程度設け
られる。このため上記説明の従来の半導体DCパラメー
タ測定装置では、測定ピンを切換えるためのマトリクス
の規模が大きくなり、このマトリクスにおいてリーク電
流が発生したり、電圧降下が生じたりするため、測定精
度が低下するという問題があった。
(Problems to be Solved by the Invention) However, in general, a semiconductor DC parameter measuring device is provided with about several dozen (for example, 50) measurement pins. For this reason, in the conventional semiconductor DC parameter measuring device described above, the scale of the matrix for switching the measurement pins becomes large, and this matrix causes leakage current and voltage drop, resulting in a decrease in measurement accuracy. There was a problem.

本発明は、かかる従来の事情に対処してなされたもので
、従来に較べて測定精度の大幅な向上を図ることのでき
る半導体DCパラメータ測定装置を提供しようとするも
のである。
The present invention has been made in response to such conventional circumstances, and it is an object of the present invention to provide a semiconductor DC parameter measuring device that can significantly improve measurement accuracy compared to the conventional method.

[発明の構成] (課題を解決するための手段) すなわち本発明は、複数の測定ピンを半導体ウェハに形
成された半導体素子の電極に接触させ、電気的測定手段
により該半導体素子のDCパラメータを測定する半導体
DCパラメータ測定装置において、前記測定ピン毎に、
それぞれ前記電気的測定手段を設けたことを特徴とする
[Structure of the Invention] (Means for Solving the Problems) That is, the present invention brings a plurality of measurement pins into contact with the electrodes of a semiconductor element formed on a semiconductor wafer, and measures the DC parameters of the semiconductor element using electrical measuring means. In the semiconductor DC parameter measuring device to be measured, for each measurement pin,
Each of them is characterized by being provided with the electrical measuring means.

(作 用) 本発明の半導体DCパラメータ測定装置では、例えば電
流測定手段、電圧測定手段、電気容量測定手段等からな
る電気的測定手段が測定ピン毎にそれぞれ設けられてい
る。
(Function) In the semiconductor DC parameter measuring device of the present invention, electrical measuring means consisting of, for example, current measuring means, voltage measuring means, capacitance measuring means, etc. are provided for each measuring pin.

このため、従来のように大規模なマトリクスを必要とせ
ず、マトリクスにおけるリーク電流の発生や、電圧降下
がないため、従来に較べて測定精度の大幅な向上を図る
ことができる。
Therefore, unlike the conventional method, a large-scale matrix is not required, and since there is no leakage current or voltage drop in the matrix, measurement accuracy can be significantly improved compared to the conventional method.

(実施例) 以下、本発明の一実施例を図面を参照して説明する。(Example) Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

第1図に示すように、この実施例の半導体DCパラメー
タ測定装置は、測定部1と、プローブ部2から構成され
ている。
As shown in FIG. 1, the semiconductor DC parameter measuring device of this embodiment is composed of a measuring section 1 and a probe section 2. As shown in FIG.

上記プローブ部2は、上面に半導体ウェハ3を保持し、
X−Y−Z方向に移動可能に構成された載置台4を備え
ており、この載置台4の上部所定位置には、複数(例え
ば50本程度)の測定ピン(探針)5を備えたプローブ
カード6が固定されている。そして、載置台4を駆動す
ることにより、半導体ウェハ3の通常の半導体チップの
間に形成されたテスト用のチップの電極パッドに測定ピ
ン5を接触させるよう構成されている。
The probe section 2 holds a semiconductor wafer 3 on its upper surface,
It is equipped with a mounting table 4 configured to be movable in the X-Y-Z directions, and a plurality of (for example, about 50) measuring pins (probes) 5 are provided at predetermined positions on the upper part of the mounting table 4. A probe card 6 is fixed. By driving the mounting table 4, the measuring pins 5 are brought into contact with the electrode pads of the test chips formed between the normal semiconductor chips of the semiconductor wafer 3.

なお、載置台4には、マイクロコンピュータ等から構成
される図示しない制御機構が設けられており、半導体ウ
ェハ3上のテスト用のチップの位置を予めプログラムし
ておくことにより、所定のテスト用のチップの電極パッ
ドに、自動的に測定ピン5を接触させることができるよ
う構成されている。
Note that the mounting table 4 is provided with a control mechanism (not shown) consisting of a microcomputer, etc., and by programming the position of the test chip on the semiconductor wafer 3 in advance, it is possible to control the position of the test chip on the semiconductor wafer 3. The structure is such that the measurement pin 5 can be automatically brought into contact with the electrode pad of the chip.

一方、測定部1には、上記測定ピン5と同数の測定ユニ
ット7が設けられており、これらのn1定ユニツト7と
各DI定ビン5とは、プローブカード6上に形成された
導体パターンおよびメジャリングケーブル等を介して電
気的に接続されている。
On the other hand, the measurement unit 1 is provided with the same number of measurement units 7 as the measurement pins 5, and these n1 constant units 7 and each DI constant bin 5 are connected to the conductor pattern formed on the probe card 6 and It is electrically connected via a measuring cable or the like.

また、上記測定ユニット7には、第2図に示すように、
電圧測定器8と、電流測定器9と、容量−−1定器10
とが設けられており、電気的な切換機構11によってこ
れらの測定器8〜10を切換え、電圧、電流、電気容量
を測定することができるよう構成されている。なお、容
量測定器10には、高圧側(high)端子と低圧側(
low)端子とが必要になるため、これらも切換機構1
1によって切換えるよう構成されている。
In addition, the measurement unit 7 includes, as shown in FIG.
Voltage measuring device 8, current measuring device 9, capacity--1 regulator 10
These measuring devices 8 to 10 can be switched by an electrical switching mechanism 11 to measure voltage, current, and capacitance. Note that the capacitance measuring device 10 has a high voltage side (high) terminal and a low voltage side (
low) terminals are required, so these are also switching mechanism 1.
1.

上記構成のこの実施例の半導体DCパラメータ測定装置
では、測定を行う半導体ウェハ3を載置台4上の所定位
置に自動搬送装置あるいはマニュアル操作により位置決
めして載置する。そして、前述した如く、測定を実施す
るテスト用のチップの半導体ウェハ3上の位置を入力し
、載置台4を駆動して、テスト用のチップの電極パッド
に測定ピン5を接触させ、測定部1の測定ユニット7に
より、DCパラメータ、すなわち、電圧、電流、電気容
量の測定を行う。
In the semiconductor DC parameter measuring apparatus of this embodiment having the above configuration, the semiconductor wafer 3 to be measured is positioned and placed at a predetermined position on the mounting table 4 by an automatic transport device or manual operation. Then, as described above, the position of the test chip to be measured on the semiconductor wafer 3 is input, and the mounting table 4 is driven to bring the measurement pins 5 into contact with the electrode pads of the test chip. The measurement unit 7 of 1 measures DC parameters, that is, voltage, current, and capacitance.

なお、この測定結果は、従来の半導体DCパラメータ測
定装置等と同様に、例えばA/D変換器によってデジタ
ル信号に変換され、メモリー内に収容される。そして、
必要に応じて例えばプリンターからプリントアウトした
り、CRT等の表示装置に表示させたりすることができ
るよう構成されている。
Note that this measurement result is converted into a digital signal by, for example, an A/D converter and stored in a memory, as in a conventional semiconductor DC parameter measurement device. and,
It is configured so that it can be printed out from a printer or displayed on a display device such as a CRT, if necessary.

すなわち、この実施例の半導体DCパラメータ測定装置
では、各測定ピン5に対応して、それぞれ測定ユニット
7が設けられており、従来の半導体DCパラメータ測定
装置のように、例えば多数の機械的なリレーを組合せる
ことによって構成されたマトリクスが測定ピン5と測定
ユニット7の間に介在しない。
That is, in the semiconductor DC parameter measuring device of this embodiment, a measuring unit 7 is provided corresponding to each measuring pin 5, and unlike the conventional semiconductor DC parameter measuring device, for example, a large number of mechanical relays are provided. There is no matrix between the measuring pins 5 and the measuring unit 7.

したがって、マトリクスにおけるリーク電流の発生や、
電圧降下の発生がないため、従来に較べて測定精度を大
幅に向上させることができる。
Therefore, the occurrence of leakage current in the matrix,
Since there is no voltage drop, measurement accuracy can be significantly improved compared to conventional methods.

また、例えばテスト用のチップの構成等により、同時測
定が可能な場合、例えば電極パッドaと電極パッドbと
の間の電圧測定と、電極パッドCと電極パッドdとの間
の電圧測定(あるいは電流測定、容量測定)とを同時に
実施できる場合等は、複数の測定を同時(パラレル)に
実施することができるので、従来に較べて測定に要する
時間を大幅に短縮することが可能となり、スルーブツト
の大幅な向上を図ることができる。
In addition, if simultaneous measurement is possible due to the configuration of the test chip, for example, voltage measurement between electrode pad a and electrode pad B, and voltage measurement between electrode pad C and electrode pad d (or In cases where multiple measurements (current measurement, capacitance measurement) can be performed simultaneously, multiple measurements can be performed simultaneously (parallel), making it possible to significantly reduce the time required for measurement compared to conventional methods, and increase throughput. It is possible to achieve a significant improvement in performance.

[発明の効果] 以上説明したように、本発明の半導体DCパラメータ測
定装置によれば、従来のように、大規模なマトリクスが
、測定ピンと測定ユニットの間に介在しないので、マト
リクスにおけるリーク電流の発生や、電圧降下の発生を
防止することができ、従来に較べて測定精度の大幅な向
上を図ることができる。
[Effects of the Invention] As explained above, according to the semiconductor DC parameter measuring device of the present invention, a large-scale matrix is not interposed between the measurement pin and the measurement unit as in the conventional case, so that the leakage current in the matrix is reduced. It is possible to prevent the occurrence of voltage drop and voltage drop, and it is possible to significantly improve measurement accuracy compared to the conventional method.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例の半導体DCパラメータ測定
装置の構成を示す図、第2図は第1図の測定ユニットの
構成を示す図である。 1・・・・・・測定部、2・・・・・・プローブ部、3
・・・・・・半導体ウェハ、4・・・・・・載置台、5
・・・・・・測定ピン、6・・・・・・プローブカード
、7・・・・・・測定ユニット、8・・・・・・電圧測
定器、9・・・・・・電流測定器、10・・・・・・容
量測定器、11・・・・・・切換機構。 出願人  東京エレクトロン株式会社
FIG. 1 is a diagram showing the configuration of a semiconductor DC parameter measuring device according to an embodiment of the present invention, and FIG. 2 is a diagram showing the configuration of the measurement unit of FIG. 1. 1... Measuring section, 2... Probe section, 3
... Semiconductor wafer, 4 ... Mounting table, 5
...Measuring pin, 6...Probe card, 7...Measuring unit, 8...Voltage measuring device, 9... Current measuring device , 10... Capacity measuring device, 11... Switching mechanism. Applicant Tokyo Electron Ltd.

Claims (2)

【特許請求の範囲】[Claims] (1)複数の測定ピンを半導体ウェハに形成された半導
体素子の電極に接触させ、電気的測定手段により該半導
体素子のDCパラメータを測定する半導体DCパラメー
タ測定装置において、 前記測定ピン毎に、それぞれ前記電気的測定手段を設け
たことを特徴とする半導体DCパラメータ測定装置。
(1) In a semiconductor DC parameter measuring device in which a plurality of measurement pins are brought into contact with electrodes of a semiconductor element formed on a semiconductor wafer, and DC parameters of the semiconductor element are measured by an electrical measurement means, each of the measurement pins is A semiconductor DC parameter measuring device comprising the electrical measuring means.
(2)電気的測定手段は、電流測定手段と、電圧測定手
段と、電気容量測定手段とを具備したことを特徴とする
請求項1記載の半導体DCパラメータ測定装置。
(2) The semiconductor DC parameter measuring device according to claim 1, wherein the electrical measuring means comprises a current measuring means, a voltage measuring means, and a capacitance measuring means.
JP13219490A 1990-05-22 1990-05-22 Measuring device for dc parameter of semiconductor Pending JPH0427134A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13219490A JPH0427134A (en) 1990-05-22 1990-05-22 Measuring device for dc parameter of semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13219490A JPH0427134A (en) 1990-05-22 1990-05-22 Measuring device for dc parameter of semiconductor

Publications (1)

Publication Number Publication Date
JPH0427134A true JPH0427134A (en) 1992-01-30

Family

ID=15075598

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13219490A Pending JPH0427134A (en) 1990-05-22 1990-05-22 Measuring device for dc parameter of semiconductor

Country Status (1)

Country Link
JP (1) JPH0427134A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6345607B1 (en) 1994-07-25 2002-02-12 Hitachi, Ltd. Engine power train control method and control apparatus for a vehicle
US6879176B1 (en) 2003-11-04 2005-04-12 Solid State Measurements, Inc. Conductance-voltage (GV) based method for determining leakage current in dielectrics

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6345607B1 (en) 1994-07-25 2002-02-12 Hitachi, Ltd. Engine power train control method and control apparatus for a vehicle
US6879176B1 (en) 2003-11-04 2005-04-12 Solid State Measurements, Inc. Conductance-voltage (GV) based method for determining leakage current in dielectrics

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