JPH04267627A - D/a converter circuit - Google Patents

Abstract

PURPOSE:To improve sound quality sufficiently in a listening sense by relieving the load of an LPF to the utmost or omitting the LPF. CONSTITUTION:A differential arithmetic circuit 3 of a digital section 1 calculates a differential data Sn based on sampling output data Sn, Sn-1 of a digital signal processing circuit, the differential data Sn is outputted to a 1st D/A converter 9 of a D/A conversion section 2 and on the other hand, the sampling data Sn-1 is outputted to a 2nd D/A converter 10 synchronously with an output timing of the differential data Sn. The differential data Sn is converted into an analog current by a 1st D/A converter 9 and the sampling data Sn-1 is converted into an analog voltage by the 2nd D/A converter 10 on the other hand. The analog voltage is fed to a current integration circuit 12 when an analog switch 11 is turned off, that is, till a succeeding sampling start point of time, and the analog current is a current when an offset O is cancelled to charge 7 discharge a current integration circuit 12.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital/analog conversion circuit connected after a digital signal processing circuit in digital audio equipment.

0002

[Prior Art] Generally, this type of digital/analog conversion circuit converts sampling value output data at each sampling point of a digital signal processing circuit into a digital/analog conversion circuit using a ladder resistor type.
It is configured to convert into an analog signal (analog staircase wave, pulse width modulated wave, etc.) using an analog converter, and pass this analog output signal through an LPF (low pass filter) to remove high frequency components.

[0003] Techniques such as oversampling have been introduced to reduce the load on the LPF, thereby suppressing the deterioration in auditory sound quality caused by the LPF.

0004

[Problems to be Solved by the Invention] However, with conventional digital/analog conversion circuits, the output waveform is a staircase wave as shown by the broken line in Figure 2, so it is difficult to sufficiently improve the auditory sound quality. Met.

[0005] This invention solves the above problems and
An object of the present invention is to provide a digital/analog conversion circuit that can significantly reduce the burden on the user, or make it possible to omit the LPF, and can sufficiently improve the auditory sound quality.

[0006]

[Means for solving the problem] In order to solve the above problem,
The digital/analog conversion circuit according to the present invention includes a difference calculation circuit that calculates a difference value between sampling value data of adjacent sampling points based on sampling value output data of each sampling point of a digital signal processing circuit; a ladder resistance type first digital/analog converter that converts the differential value output data of the arithmetic circuit into an analog current; and a ladder resistance type converter that converts the sampling value output data of each sampling point of the digital signal processing circuit into an analog voltage. a second digital/analog converter; and an output side of the first digital/analog converter and the second digital/analog converter.
a current integral connected between the output side of the analog converter and charged with the analog output current of the first digital/analog converter and to which the analog output voltage of the second digital/analog converter is applied; circuit, and an analog switch connected in parallel to the current integrating circuit, and configured to turn on the analog switch for a minute time at the start of sampling every sampling period to instantaneously discharge the current integrating circuit. It is characterized by

[0007]

[Operations and Effects of the Invention] According to the digital/analog conversion circuit according to the present invention, the output waveform of the current integrating circuit is a continuous waveform component formed by connecting sampling values at adjacent sampling points with a straight line. In other words, since the output waveform of the current integration circuit is a smooth analog waveform, it is possible to obtain an analog output waveform in which high frequency components are not superimposed. Therefore, it is possible to reduce the burden on the LPF in the latter stage, improve the auditory sound quality, and improve the LPF.
It is also possible to omit PF.

[0008] Furthermore, in the output waveform of the current integrating circuit,
The waveform component corresponding to each sampling period is the analog output voltage of the second digital/analog converter, in other words:
Since it is formed by always including the sampling value output data of the digital signal processing circuit, the analog output current of the first digital/analog converter is small, the amount of voltage change of the current integrating circuit is small, and the DC level is Even signals in the low frequency range can be sufficiently reproduced.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

The digital/analog conversion circuit according to this embodiment includes a digital section 1 (FIG. 1A) connected to the output side of a known digital signal processing circuit (not shown) and an output side of the digital section 1. The digital/analog converter 2 (FIG. 1(B)) is connected to the digital/analog converter 2 (FIG. 1(B)).

■Digital unit 1 (FIG. 1(A)) The digital unit 1 extracts sampling value data Sn, Sn-1 of adjacent sampling points based on sampling value output data S of each sampling point of the digital signal processing circuit. It consists of a difference calculation circuit 3 that calculates difference value data ΔSn between.

The difference calculation circuit 3 includes a first register 4 of SIPO (serial in/parallel out) type, a second register 5 of SIPO type, a subtracter 6, and a third register of PISO (parallel in/serial out) type. 7 and a timing generator 8.

The first register 4 is set with sampling value output data Sn of the digital signal processing circuit.

When the sampling value data Sn is set in the first register 4, the second register 5 stores the sampling value data S previously set in the first register 4.
n-1 is set.

The subtracter 6 calculates difference value data ΔSn between sampling value data Sn and Sn-1 of adjacent sampling points.

The third register 7 contains difference value data ΔSn
is set, and the difference value data ΔSn is serially input to the first digital/analog converter 9 (FIG. 1(B)).

The sampling value data Sn-1 in the second register 5 is input to the second digital/analog converter 10 (FIG. 1(B)).

The timing generator 8 has first, second and third timing generators.
Timing signals are output to registers 4, 5, and 7, respectively, and the calculation of the difference value data △Sn as described above is performed.
In addition to making output possible, the output timing of the sampling value data Sn-1 and the difference value data △
The output timing of Sn is synchronized. The timing generator 8 also includes an analog switch 11 (described later).
A control signal CS for controlling the switch operation shown in FIG. 1(B)) is output.

■Digital/analog converter 2 (Fig. 1(B)
)) The digital/analog converter 2 includes a difference calculation circuit 3 (Fig. 1
A first digital/analog converter 9 of a ladder resistance type is provided for converting the differential value output data ΔSn of (A)) into an analog current. Further, a second digital/analog converter 1 of a ladder resistance type converts the sampling value output data Sn-1 of the second register 5 (FIG. 1(A)) into an analog voltage.
0. The first digital/analog converter 9 is configured to convert a digital value obtained by adding an offset value O to the difference value data ΔSn.

A current integrating circuit 12 consisting of a capacitor and a transistor 13 are connected between the output side of the first digital/analog converter 9 and the output side of the second digital/analog converter 10. The current integration circuit 12 is
The analog output voltage of the second digital/analog converter 10 is applied, and the battery is charged and discharged with the analog output current of the first digital/analog converter 9.

An analog switch 11 that operates according to a control signal CS from the timing generator 8 is connected in parallel to the current integration circuit 12. The current integrating circuit 12 is instantly discharged.

The electrode of the current integrating circuit 12 on the first digital/analog converter 9 side is provided with difference value data by reducing the current corresponding to the offset value O from the analog output current of the first digital/analog converter 9. A constant current source 14 is connected so that a current corresponding only to ΔSn flows through the current integrating circuit 12.

The output side of the current integration circuit 12 is connected to a buffer circuit 15, and the output side of the buffer circuit 15 is connected to an LPF 16. In addition, the reference numeral 17 in the figure
represents a bias transistor for maintaining the output potential of the first digital/analog converter 9 at a predetermined value.

Since the digital/analog conversion circuit of this embodiment has the above configuration, the difference calculation circuit 3 of the digital section 1 calculates the difference value based on the sampling value output data Sn, Sn-1 of the digital signal processing circuit. Data △Sn
is calculated, and this difference value data ΔSn is output to the first digital/analog converter 9 of the digital/analog converter 2, while the sampling value data Sn-1 is synchronized with the output timing of the difference value data ΔSn. and output to the second digital/analog converter 10.

[0025] The difference value data ΔSn is the first digital/
The analog converter 9 converts it into an analog current, while the second digital/analog converter 10 converts the sampling value data Sn-1 into an analog voltage. When the analog switch 11 is off, this analog voltage is
That is, until the start of the next sampling, the analog current is applied to the current integrating circuit 12, while the analog current is a current with the offset value O canceled, and the analog current is applied to the current integrating circuit 12.
Charge and discharge 2. Then, when the next sampling starts, the analog switch 11 is turned on for a short time, the current integrating circuit 12 is short-circuited, and is instantaneously discharged (reset), causing the second digital/analog converter 10 to generate an analog voltage. Therefore, as shown by the solid line waveform in FIG. 2, the output voltage of the current integration circuit 12 does not change stepwise as shown by the broken line, but instead changes to an analog waveform in which adjacent sampling points t1,...t9 are connected by straight lines. It becomes an approximation. Furthermore, when reproducing a DC level signal, the output voltage of the current integrating circuit 12 becomes an analog voltage value corresponding to the sampling value data Sn-1 when the analog switch 11 is switched from on to off, and is maintained at this analog voltage value. be done. The output voltage of the current integration circuit 12 is then input to the LPF 16 via the buffer circuit 15.

As is clear from the above description, according to the digital/analog conversion circuit according to this embodiment, the output waveform of the current integration circuit 12 is formed by connecting the sampling values of adjacent sampling points with a straight line. Since the waveform components are continuous, in other words, the output waveform of the current integration circuit 12 is a smooth analog waveform, it is possible to obtain an analog output waveform in which high frequency components are not superimposed. Therefore, the load on the LPF 16 at the subsequent stage can be reduced, the auditory sound quality can be improved, and the LPF 16 can be omitted.

Furthermore, the waveform components corresponding to each sampling period in the output waveform of the current integrating circuit 12 are the analog output voltage of the second digital/analog converter 10, in other words, the sampling value output data of the digital signal processing circuit, Since the analog output current of the first digital/analog converter 9 is small and the amount of voltage change of the current integrating circuit 12 is small, signals in the low frequency region including DC level can also be used. fully playable.

Furthermore, since the first digital/analog converter 9 performs conversion after adding an offset value to the difference value data, the first digital/analog converter 9
Zero cross distortion can be prevented.

In the above embodiment, the sampling value data is not subjected to the process of adding an offset value, but if the addition process is performed, the second
Zero cross distortion of the digital/analog converter 10 can be prevented.

[Brief explanation of the drawing]

FIG. 1 shows a digital/analog conversion circuit according to an embodiment, in which (A) is a configuration diagram of a digital section, and (B) is a configuration diagram of a digital/analog conversion section.

[Figure 2] Output waveform diagram of the current integration circuit of the digital/analog conversion section

[Explanation of symbols]

3 Difference calculation circuit 9 First digital/analog converter 10 Second digital/analog converter 11 Analog switch 12 Current integration circuit

Claims (1)

[Claims] 1. A difference calculation circuit that calculates a difference value between sampling value data of adjacent sampling points based on sampling value output data of each sampling point of a digital signal processing circuit, and a difference value output of the difference calculation circuit. a first digital/analog converter of a ladder resistance type that converts data into an analog current; and a second digital/analog converter of a ladder resistance type that converts the sampling value output data of each sampling point of the digital signal processing circuit into an analog voltage. a converter connected between an output side of the first digital-to-analog converter and an output side of the second digital-to-analog converter, the converter being charged with the analog output current of the first digital-to-analog converter; and a current integrating circuit to which the analog output voltage of the second digital/analog converter is applied; and an analog switch connected in parallel to the current integrating circuit; A digital/analog conversion circuit characterized in that the analog switch is turned on for a short period of time to instantly discharge the current integrating circuit.