JPH04264933A - Microcomputer - Google Patents

Abstract

PURPOSE:To connect a microcomputer independently of the difference of each supply voltage of an in-circuit emulator and a target system at the time of connection to the target system, and also to connect it to a C-MOS circuit. CONSTITUTION:At an evaluation chip 14 side, an open-drain type output circuit 11 and a poststage buffer 10 to be operated respectively by power supply from first power supply are installed as a level conversion circuit 6b from the target system 2, and the open-drain type output circuit 7 to be operated by the first power supply and the poststage buffer 8 connected to the output circuit 7 and to be operated by a second power supply from the target system 2 are installed as the level conversion circuit 6a to the target system 2.

Description

[Detailed description of the invention]

0001

[Field of Industrial Application] The present invention relates to a microcomputer including an evaluation chip (hereinafter referred to as an evaluation chip).
In particular, it relates to an evaluation chip that serves as an interface when the emulator and target system have different power supply voltages.

0002

[Prior Art] In a conventional microprocessor,
As shown in the connection diagram in Figure 2(a), there is a connection interface between the in-circuit emulator and the target system, and the emulator 1 and target system 2
are connected by a cable 5 via connectors 4 and 3. In-circuit emulator 1 output signal a
is input to the target system 2 as an input signal a1 via the buffer 15, the connector 4, the cable 5, and the connector 3. On the other hand, the output signal b1 of the target system 2 is supplied to the evaluation chip 14 of the in-circuit emulator 1 as an input signal b via the connector 3, the cable 5, and the connector 4 via the buffer 16.

In this case, the buffers 15 and 16 are as follows:
Usually, TTL or C-MOS buffers are used, and the power supply for these buffers uses the internal power supply of the in-circuit emulator 1, and usually 5V is supplied.

In this example, there are buffer circuits 15 and 16 between the evaluation chip 14 and the target system 2, but as shown in FIG. Sometimes these are connected directly without a buffer circuit. In this case as well, the power supply supplied to the evaluation chip 14 of the in-circuit emulator 1 and the power supply of the target are of the same power supply voltage, and normally a 5V power supply is also supplied.

[0005]

[Problems to be Solved by the Invention] Since the conventional interface circuit for connection with the target system described above uses the internal power supply of the in-circuit emulator 1, the power supply voltage of the target system 2 and the power supply of the in-circuit emulator 1 are different from each other. If the voltage was not the same as the voltage, the interface circuit would not work properly. For example, if the power supply voltage of the target system 2 is set to operate at 3V, the input and output levels of the interface buffers 15 and 16 will not match, and the system will not be able to match the target system 2 and will not operate.

On the other hand, as microprocessors have become faster and faster in recent years, there is a problem that if a buffer circuit is inserted between the evaluation chip and the target system, the transparency will deteriorate and high-speed operation will not be possible. It becomes necessary to connect the terminal directly to the target system. Further, as microprocessors become C-MOS, their operating power supply voltages have widened from 2.7V to 6.0V. As mentioned above, this type of microprocessor emulator requires limited constraints on the power supply voltage of the other party's target system, and therefore has the drawback of not being able to support C-MOS implementation of the microprocessor.

[0007] The purpose of the present invention is to eliminate such drawbacks,
It is an object of the present invention to provide a microcomputer in which an interface circuit operates normally regardless of the power supply voltage of a connected part and is also compatible with C-MOS.

[0008]

[Means for Solving the Problems] The configuration of the microcomputer of the present invention includes a first open-drain type output circuit that receives power from a first power supply voltage supply line and serves as a pre-stage buffer, and an input terminal connected to this output circuit. a first level conversion circuit including a first latter-stage buffer to which the input terminal is connected to the first power supply voltage supply line via a resistor; an interface from the target system side; a second open-drain type output circuit that receives power from the power supply voltage supply line and serves as a pre-stage buffer; and an input terminal is connected to this output circuit and receives power from the second power supply line from the target system. The present invention is characterized by having an evaluation chip including a second level conversion circuit including a second rear-stage buffer whose input end is connected to the receiving power supply line via a pull-up resistor.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a connection diagram of an in-circuit emulator mounted with an evaluation chip and a target system according to an embodiment of the present invention. In the figure, an in-circuit emulator 1 connects a connector 3 to a target system 2.
, 4 and cable 5, there is an evaluation chip 14, and this evaluation chip 14 has power supply lines 12, 13 and voltage level conversion circuits 6a, 6b.

These level conversion circuits 6a and 6b are constructed by connecting open drain buffers 7 and 11 in front of normal buffers 8 and 10.

Next, the conventional power supply VDD1 is connected to the evaluation chip 14.
5V and the power supply voltage of target system 2 VDD2
The operation when using 3V will be explained.

The output signal a in the in-circuit emulator 1 is equivalent to the signal at the output terminal of the evaluation chip 14, and is a C-MOS level signal with a low level of 0V and a high level of 5V as a signal a2 from inside the evaluation chip 14. The 5V power supply of the power supply voltage VDD of the in-circuit emulator 1 is inputted to the open drain buffer 7 supplied via the VDD1 terminal 12. This open drain buffer 7 is supplied with 5V of the power supply voltage VDD1, so when 5V is input to the input side, the output becomes high impedance, and when 0V is input, the output becomes 0V. The output of the open drain output buffer 7 is connected to the power supply VDD2 by a resistor R1, pulled up by 3V of the power supply voltage VDD of the target system 2, and connected to the input side of the buffer 8. The buffer 8 is supplied with power from the power supply voltage input terminal VDD2 from the target system 2, and the input level is 0.9V or less (0.3×VD
D2) For high level, 2.1V or more (0.7×VD
D2) Set above.

When the output of the open-drain buffer 7 is high impedance, a voltage at a level of 3V is input to the input of the buffer 8 by the resistor R1, so it is regarded as a high level, and the input of the buffer 8 is input to the input of the buffer 8. 3V for
A voltage at the level of is output. On the other hand, when the output voltage of the open drain buffer 7 is 0V, the input is considered to be at a low level, and the buffer 8 outputs a level voltage of 0V.

As described above, the output signal from the evaluation chip 14 of this embodiment is inputted to the target system 2 as the input signal a1 via the connector 3 and the cable 5 in accordance with the power supply voltage of the target system. In the opposite direction, if the output signal b1 from the target system 2 is input to the in-circuit emulator 1 and accepted as the input signal b to the evaluation chip 14, the high level
The output signal b1 of 0V at high level is output to the inside of the Eva chip by the level conversion circuit 6b of the target system interface in the same manner as the level conversion circuit 6a described above. It is input as an input signal b2 of 0V at the level.

[0015]

As explained above, the present invention enables the connection of the in-circuit emulator of a microprocessor with a predetermined target system, regardless of the difference in power supply voltage between the in-circuit emulator and the target system. C-
It has the advantage that it can be used as an interface for a wide range of power supply voltages of MOS microprocessors.

[Brief explanation of the drawing]

FIG. 1 is a connection diagram with a target system according to an embodiment of the present invention.

FIGS. 2(a) and 2(b) are connection diagrams with a conventional in-circuit emulator.

[Explanation of symbols]

1 In-circuit emulator 2 Target system 3, 4 Connector 5 Cable 6a, 6b Target interface level conversion circuit 7, 11 Open collector buffer 8, 10
, 15, 16 Buffer 9 Pull-up resistor 12 VDD1 (emulator internal power supply 5V) terminal 13 VDD2 (power supplied from target side)
Terminal 14 Eva chip

Claims (1)

[Claims] 1. A first open-drain output circuit that receives power supply from a first power supply voltage supply line and serves as a pre-stage buffer; an input terminal is connected to the output circuit, and this input terminal is connected to the first power supply voltage supply line; a first level conversion circuit including a first post-stage buffer connected to the voltage supply line via a resistor; a first level conversion circuit that serves as an interface from the target system side and receives power supply from the first power supply voltage supply line; A second open-drain output circuit is connected to the output circuit, and the input end is connected to the output circuit, and power is supplied from the second power supply line from the target system, and the input is input from this power supply line via a pull-up resistor. A microcomputer comprising an evaluation chip including a second level conversion circuit including a second post-stage buffer whose end is connected.