JPS60173639A - Interface circuit - Google Patents

Interface circuit

Info

Publication number
JPS60173639A
JPS60173639A JP59028644A JP2864484A JPS60173639A JP S60173639 A JPS60173639 A JP S60173639A JP 59028644 A JP59028644 A JP 59028644A JP 2864484 A JP2864484 A JP 2864484A JP S60173639 A JPS60173639 A JP S60173639A
Authority
JP
Japan
Prior art keywords
circuit
turned
development system
detecting
target system
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59028644A
Other languages
Japanese (ja)
Inventor
Tsunaaki Shidei
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP59028644A priority Critical patent/JPS60173639A/en
Publication of JPS60173639A publication Critical patent/JPS60173639A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26Functional testing
    • G06F11/261Functional testing by simulating additional hardware, e.g. fault simulation
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/004Error avoidance

Abstract

PURPOSE:To prevent the destruction of a development system using CMOSes by providing a variable impedance circuit between an in-circuit emiluator and a target system being the development system in place of the simple connection of them. CONSTITUTION:The variable impedance circuit 13 is connected between a connection terminal 11 connected to the development system and a connecting terminal 12 connected to the target system. Moreover, a control circuit 16 to change the impedance of the variable impedance circuit 13 is connected between the detecting terminal 14 detecting the power supply state of the development system and the detecting terminal 15 detecting the power state of the target system and a control output 17 is transmitted to the circuit 13. When both the power supplies of the target system and the development system are turned off or one of them is turned off, the circuit 13 is opened and when the both are turned on, the circuit 13 is short-circuited. Thus, the circuit is connected when both the systems are turned on so as to prevent the destruction of both the systems.
JP59028644A 1984-02-20 1984-02-20 Interface circuit Pending JPS60173639A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59028644A JPS60173639A (en) 1984-02-20 1984-02-20 Interface circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59028644A JPS60173639A (en) 1984-02-20 1984-02-20 Interface circuit

Publications (1)

Publication Number Publication Date
JPS60173639A true JPS60173639A (en) 1985-09-07

Family

ID=12254221

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59028644A Pending JPS60173639A (en) 1984-02-20 1984-02-20 Interface circuit

Country Status (1)

Country Link
JP (1) JPS60173639A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6318445A (en) * 1986-07-10 1988-01-26 Nec Corp Device for supporting development of microcomputer
JPH0644096A (en) * 1991-02-05 1994-02-18 Nec Ic Microcomput Syst Ltd In-circuit emulator

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6318445A (en) * 1986-07-10 1988-01-26 Nec Corp Device for supporting development of microcomputer
JPH0644096A (en) * 1991-02-05 1994-02-18 Nec Ic Microcomput Syst Ltd In-circuit emulator

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