JPH04262617A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To realize a semiconductor integrated circuit with a few pin number. CONSTITUTION:When the potential of an output pin 9 is pulled down, a transistor(TR) 10 is turned on and a TR 11 is turned off, and a 1st signal A inputted to the base of the TR 10 is outputted. When the potential of the output pin 9 is pulled up, the TR 10 is turned off and the TR 11 is turned on, and a 2nd signal B inputted to a base of the TR 11 is outputted, Thus, it is not required to provide a pin to which a selection signal is inputted and number of pins is reduced.

Description

[Detailed description of the invention]

0001

[Industrial Application Field] This invention provides two output pins with one output pin.
The present invention relates to a semiconductor integrated circuit that can output two signals.

0002

2. Description of the Related Art As semiconductor integrated circuits become more highly integrated, their performance becomes higher and more input/output pins are required. Therefore, in order to reduce the number of pins, a configuration has conventionally been adopted in which a plurality of signals inside a semiconductor integrated circuit are outputted by one output pin.

FIG. 4 is a diagram showing the configuration of a conventional output circuit of a semiconductor integrated circuit. In the figure, 1 is a first circuit block that generates a first signal A, and 2 is a second circuit block that generates a second signal B. 3 is a selector into which the first signal A and the second signal B are input, and selectively outputs one of the two signals according to the signal from the selection signal input pin 4; 5 is a selector from the selector 3; This is a buffer that receives and outputs signals. Buffer 5 is connected to power source 6, N
It consists of a PN transistor 7 and a constant current source 8. The transistor 7 has a collector connected to a power supply 6, an emitter connected to GND via a constant current source 8, and an output pin 9.
The base is connected to the selector 3.

Next, the operation will be explained. A signal from selection signal input pin 4 causes selector 3 to select the first and second
Either one of the signals A and B is selectively output. The selected signal is output from output pin 9 via buffer 5.

[0005]

As described above, the conventional output circuit requires the selection signal input pin 4 in addition to the output pin 9, which has the problem of increasing the number of pins.

The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to obtain a semiconductor integrated circuit with a small number of pins.

[0007]

[Means for Solving the Problems] A semiconductor integrated circuit according to the present invention includes a semiconductor integrated circuit of a first conductivity type in which a first signal is inputted to a control electrode and one electrode is connected to a first potential. A second signal is input to the first transistor and the control electrode, one electrode is connected to the other electrode of the first transistor,
a second transistor of a second conductivity type, each of which has its other electrode connected to a second potential; and an output pin connected to a common connection point between the other electrode of the first transistor and one electrode of the second transistor. By selectively pulling down or pulling up the potential of the output pin from outside the chip, one of the first and second transistors is selectively turned on; 1 and the second signal is selectively output.

[0008]

[Operation] In this invention, by selectively pulling down or pulling up the potential of the output pin from outside the chip, one of the first and second transistors is selectively turned on. Since either one of the first and second signals is selectively output, there is no need to provide a pin for inputting a selection signal as in the conventional case.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a diagram showing an embodiment of a semiconductor integrated circuit according to the present invention. In the figure, the differences from the conventional circuit shown in FIG. 5 are the selector 3, selection signal input pin 4,
Buffer 5 is eliminated and NPN transistor 10 and P
This is because the NP transistor 11 is newly provided. The transistor 10 has its base connected to the first circuit block 1, its collector connected to the power supply 100, and its emitter connected to the output pin 9. The transistor 11 has its base connected to the second circuit block 2, its emitter connected to the output pin 9, and its collector connected to GND. The first and second circuit blocks 1 and 2 and transistors 10 and 11 are provided within one chip.

FIG. 2 shows a pull-down circuit connected to the output pin 9 for pulling down the potential of the output pin 9 (the potential at the common emitter connection point of the transistors 10 and 11). 20 is a terminal connected to output pin 9, 21 is terminal 2
0 and GND, and 22 is an output terminal connected to the terminal 20.

FIG. 3 shows a pull-up circuit connected to the output pin 9 to pull up the potential of the output pin 9. 30 is a terminal connected to output pin 9, 31 is terminal 30
32 is an output terminal connected to the terminal 30.

Next, the operation will be explained. When it is desired to output the first signal A from the first circuit block, the pull-down circuit shown in FIG. 2 is connected to the output pin 9 from outside the chip. Then, the potential of output pin 9 (transistor 10,
11 emitter common connection point) is pulled down,
Transistor 10 is on, transistor 11 is off,
Only the first signal A is output via the output terminal 22.

On the other hand, if it is desired to output the second signal B from the second circuit block, the pull-up circuit shown in FIG. 3 is connected to the output pin 9. Then, the potential of the output pin 9 is pulled up, the transistor 10 is turned off, the transistor 11 is turned on, and only the second signal B is outputted via the output terminal 32.

As described above, by connecting a pull-down circuit or a pull-up circuit from outside the chip to the output pin 9, the potential of the output pin 9 is pulled down, and the transistor 1
0 and 11 are selectively turned on, and the first and second signals A and B are turned on.
Since it selectively outputs, there is no need to provide a selection signal input pin 4 (see FIG. 5) for inputting a selection signal as in the conventional case, and the number of pins is reduced.

FIG. 5 shows the first and second circuit blocks 1 and 2.
FIG. 2 is a circuit diagram illustrating a configuration example in which first and second circuit blocks 1 and 2 are differential amplifiers. The first circuit block 1 includes NPN transistors 40 and 41, a constant current source 4
2. Consisting of resistors 43 and 44. The emitters of the transistors 40 and 41 are commonly connected, and this common connection point is connected to GND via a constant current source 42. The collector of the transistor 40 is connected to the power supply 1 through a resistor 43.
Connected to 00. The collector of transistor 41 is connected to power supply 100 via resistor 44 and also to the base of transistor 10. The bases of transistors 40 and 41 are connected to other circuitry (not shown). The second circuit block 2 includes NPN transistors 50 and 51, a constant current source 52, and resistors 53 and 54. The connection relationship of these elements is similar to the connection relationship of the elements shown in the first circuit block. transistor 41,
50 collector voltages are input to the bases of transistors 10 and 11 as first and second signals A and B, respectively. By connecting the circuit of FIG. 2 or 3 to the output pin 9, the first or second signal A or B is selectively output as described above.

[0016]

As described above, according to the present invention, by selectively pulling down or pulling up the potential of the output pin from outside the chip, one of the first and second transistors Since the transistor is selectively turned on and one of the first and second signals is selectively output, there is no need to provide a pin to input the selection signal as in the past. As a result, there is an effect that the number of pins of the semiconductor integrated circuit is reduced.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of a semiconductor integrated circuit according to the present invention.

FIG. 2 is a circuit diagram showing a configuration example of a pull-down circuit.

FIG. 3 is a circuit diagram showing a configuration example of a pull-up circuit.

FIG. 4 is a circuit diagram showing an output circuit of a conventional semiconductor integrated circuit.

FIG. 5 is a circuit diagram showing an example of the configuration of first and second circuit blocks.

[Explanation of symbols]

9 Output pin 10 NPN transistor 11 PNP transistor 100 Power supply A First signal B Second signal

Claims (1)

[Claims] 1. A first transistor of a first conductivity type in which a first signal is input to a control electrode and one electrode is connected to a first potential, and a second signal is input to a control electrode in one chip. a second conductivity type second transistor in which one electrode is connected to the other electrode of the first transistor and the other electrode is connected to a second potential; and an output pin connected to a common connection point of one electrode of the second transistor, and by selectively pulling down or pulling up the potential of the output pin from outside the chip, A semiconductor integrated circuit, wherein one of the transistors is selectively turned on to selectively output one of the first and second signals.