JPH0426240B2 - - Google Patents
Info
- Publication number
- JPH0426240B2 JPH0426240B2 JP11121283A JP11121283A JPH0426240B2 JP H0426240 B2 JPH0426240 B2 JP H0426240B2 JP 11121283 A JP11121283 A JP 11121283A JP 11121283 A JP11121283 A JP 11121283A JP H0426240 B2 JPH0426240 B2 JP H0426240B2
- Authority
- JP
- Japan
- Prior art keywords
- powdered
- resin material
- circuit board
- resin
- curing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 229920005989 resin Polymers 0.000 claims description 41
- 239000011347 resin Substances 0.000 claims description 41
- 239000000463 material Substances 0.000 claims description 19
- 239000000945 filler Substances 0.000 claims description 15
- 239000003822 epoxy resin Substances 0.000 claims description 13
- 229920000647 polyepoxide Polymers 0.000 claims description 13
- 238000000576 coating method Methods 0.000 claims description 12
- 239000011248 coating agent Substances 0.000 claims description 11
- 239000003795 chemical substances by application Substances 0.000 claims description 7
- 238000000034 method Methods 0.000 claims description 7
- 150000004982 aromatic amines Chemical class 0.000 claims description 6
- 238000004519 manufacturing process Methods 0.000 claims description 5
- 238000002156 mixing Methods 0.000 claims description 2
- -1 phosphonium compound Chemical class 0.000 claims description 2
- 238000001723 curing Methods 0.000 description 18
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- 239000004065 semiconductor Substances 0.000 description 4
- 230000035939 shock Effects 0.000 description 4
- 239000003990 capacitor Substances 0.000 description 3
- 238000001879 gelation Methods 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- 229910002012 Aerosil® Inorganic materials 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 2
- IISBACLAFKSPIT-UHFFFAOYSA-N bisphenol A Chemical compound C=1C=C(O)C=CC=1C(C)(C)C1=CC=C(O)C=C1 IISBACLAFKSPIT-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000000227 grinding Methods 0.000 description 2
- 238000013007 heat curing Methods 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 150000008065 acid anhydrides Chemical class 0.000 description 1
- 239000011247 coating layer Substances 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000008602 contraction Effects 0.000 description 1
- 238000007872 degassing Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000004898 kneading Methods 0.000 description 1
- 239000010410 layer Substances 0.000 description 1
- 239000002075 main ingredient Substances 0.000 description 1
- 238000010422 painting Methods 0.000 description 1
- 238000011056 performance test Methods 0.000 description 1
- 150000004714 phosphonium salts Chemical class 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 239000011342 resin composition Substances 0.000 description 1
- 238000007665 sagging Methods 0.000 description 1
- 238000007873 sieving Methods 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 238000010186 staining Methods 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
Description
産業上の利用分野
本発明は、回路要素チツプを実装した混成集積
回路板の製造方法で、同回路要素チツプを樹脂物
によつて被覆処理する方法に関する。
従来例の構成とその問題点
抵抗器、コンデンサなどの電子部品を含む混成
集積化された回路装置の回路基板表面は、樹脂物
で被覆することが行なわれているが、この樹脂物
は薄く、しかも、均一に付着させることが不可欠
である。
ところが、例えば、タンタル電解コンデンサや
複合部品の実装回路板、あるいは半導体素子を実
装したハイブリツド回路板のように、素子の形状
が複雑、多岐であると、薄く、均一に塗装するこ
とがなかなかむつかしく、また、樹脂物に混入さ
せる充填材の含有量も、30重量%以下におさえな
いと、−65℃〜+150℃の範囲での通常の熱衝撃サ
イクルにも耐えない。
一方、被覆樹脂物に充填材を多く含ませると、
温度変化に対して、低伸縮変化率特性を付与する
うえで効果的であるが、粉末状樹脂物として利用
するには、粉末化の過程で困難を伴なうほか、ゲ
ル化時間および粘度の適値を得るのがむつかし
く、これらの要因が重なり合つて、樹脂被覆物の
不均質部分(例えば、「たれ」や「す」が発生し
た部分)ができ易い。したがつて、このような不
均質部分があると、熱衝撃サイクルによつて、ク
ラツクが生じたり、耐湿特性の劣化が甚だしく起
こるという問題がある。
発明の目的
本発明は、充填材とのなじみがよく、しかも、
粉末化が容易な樹脂組成物を用い、それを予備硬
化した後に、回路要素チツプを実装した回路板に
塗装し、その後熱処理することにより、上述の従
来例にみられた問題点を解消し、回路要素チツプ
を実装した回路板の樹脂物による安定、確実な被
覆処理技術を提供するものである。
発明の構成
本発明は、要約するに、回路要素チツプを実装
した回路板に、充填材含有量35〜70重量%の粉末
状エポキシ樹脂に、上記粉末状エポキシ樹脂とほ
ぼ等量の芳香族アミンアダクトを硬化剤として配
合した粉末状樹脂物を、上記粉末状樹脂物の硬化
温度より低い温度で予備硬化し、上記予備硬化さ
れた粉末状樹脂物を回路要素チツプを実装した回
路板に塗装し、その後上記塗装された粉末状樹脂
物を熱処理することによつて、回路板および回路
要素チツプの表面を樹脂で被覆するようにした混
成集積回路の製造方法であり、これにより、回路
要素チツプ、例えば、半導体素子チツプを安定、
確実に被覆処理することができる。
実施例の説明
以下、本発明を、図示の工程図によつて、詳し
くのべる。
エポキシ樹脂成分1として、シエルケミカル社
製の商品名828で知られるビスフエノールA型エ
ポキシを用い、これに、充填材2として、商品名
アエロジルで知られる無水シリカを35〜70重量%
の範囲で計量して混ぜ合わせ、配合工程3、混練
工程4および粉砕工程5を遂行する。次に、硬化
剤である芳香族アミンアダクト6として、日本合
成化工(株)製の商品名H−84を前記エポキシ樹脂成
分1とほぼ等量に配合し、さらに、硬化促進剤と
なる第四フオスフオニウム塩7を、前記エポキシ
樹脂成分1の芳香族アミンダクト6との混合物に
対して、1〜1.5重量%の範囲で適量混合する。
そして、これらを、再混合工程8、再粉砕工程
9、通篩工程10、予備硬化工程11を経た配合
物をハイブリツド回路板12の表面に塗装し、加
熱付着工程13および樹脂硬化過程14の一連の
工程によつて、樹脂被覆工程を完了し、樹脂被覆
回路板15を得る。
粉末状樹脂分を、ハイブリツド回路板の表面
に、薄く、均一に塗布するには、予め、加熱維持
された回路板上に粉末状樹脂を振り掛けて塗装す
る方式が簡便であり、実用されている。さらに、
この塗装樹脂層は、引き続いて、加熱硬化炉にお
いて150℃、10〜30分の熱硬化処理を施して、約
200μmの被覆層となる。
なお、図中の予備硬化工程11は、樹脂の硬化
温度より低い、35〜50℃の範囲で、10〜30時間程
度、静置することであり、この間に、充填材と樹
脂成分とのなじみをよくする。また、脱ガス化を
はかり、硬化物内に気泡の発生することを予防、
抑制することにも効用がある。さらに、ゲル化時
間および粘度のばらつきを少なくするにもこの予
備硬化工程が有効である。
実施例として、半導体ICチツプ(2.6mm×3.2
mm、24ピン)の2個を、厚さ0.64mmのアルミナ磁
器基板の片面に載置し、ダイボンドおよびワイヤ
ボンドを済ませ、さらに、基板の他部に、チツプ
型コンデンサ(1.6mm×3.2mm、高さ2.0mm)を10個
並べて、銀ペースト剤で配線導体部に接着した構
造のハイブリツド回路板を用い、その両面に前記
粉末状樹脂配合物を塗装して、加熱硬化処理して
仕上げたものの性能試験結果は、耐熱撃性、高温
耐湿性において、従来品とは格段に高い性能に高
い性能を示した。次表は、本発明の実施例とし
て、充填材の添加量を、(A)70重量%、(B)50重量
%、(C)35重量%に選んで、その製品の温度サイク
ルテストおよび2気圧、121℃でのプレツシヤー
クツカーテスト(PCT)を測定した結果であり、
これらの各測定値は、例えば、従来の樹脂封止形
半導体装置の性能値と同等である。なお、比較参
考例として、酸無水物系硬化剤配合エポキシ樹脂
の標準的仕様で得られるエポキシ樹脂を用い、こ
れに、充填材のアエロジル(無水シリカ)を30重
量%添加したものを挙げている。
INDUSTRIAL APPLICATION FIELD The present invention relates to a method of manufacturing a hybrid integrated circuit board on which circuit element chips are mounted, and a method of coating the circuit element chips with a resin material. Conventional configuration and its problems The surface of the circuit board of a hybrid integrated circuit device containing electronic components such as resistors and capacitors is coated with a resin material, but this resin material is thin and Moreover, it is essential that it be adhered uniformly. However, when the shapes of the elements are complex and diverse, such as circuit boards with tantalum electrolytic capacitors, composite parts, or hybrid circuit boards with semiconductor elements mounted, it is difficult to apply a thin, uniform coating. Furthermore, unless the content of the filler mixed into the resin material is kept below 30% by weight, it will not withstand normal thermal shock cycles in the range of -65°C to +150°C. On the other hand, if a large amount of filler is included in the coating resin,
It is effective in imparting low expansion/contraction change rate characteristics with respect to temperature changes, but in order to use it as a powdered resin, it is difficult in the powdering process, and the gelation time and viscosity have to be adjusted. It is difficult to obtain an appropriate value, and due to the combination of these factors, non-uniform areas of the resin coating (for example, areas where "sagging" or "staining" has occurred) are likely to occur. Therefore, if such a non-uniform portion exists, there is a problem in that cracks occur due to thermal shock cycles and moisture resistance deteriorates significantly. Purpose of the invention The present invention has good compatibility with fillers, and
By using a resin composition that can be easily powderized, pre-curing it, painting it on a circuit board on which circuit element chips are mounted, and then heat-treating it, the problems seen in the above-mentioned conventional example are solved. The present invention provides a stable and reliable coating technology for circuit boards mounted with circuit element chips using a resin material. Structure of the Invention To summarize, the present invention provides a circuit board on which circuit element chips are mounted, a powdery epoxy resin having a filler content of 35 to 70% by weight, and an aromatic amine in an amount approximately equivalent to the powdery epoxy resin. A powdered resin compounded with Adduct as a curing agent is precured at a temperature lower than the curing temperature of the powdered resin, and the precured powdered resin is applied to a circuit board on which circuit element chips are mounted. This is a method for manufacturing a hybrid integrated circuit, in which the surfaces of the circuit board and the circuit element chips are coated with resin by heat-treating the coated powdered resin material, whereby the circuit element chips, For example, to stabilize a semiconductor chip,
Enables reliable coating treatment. DESCRIPTION OF EMBODIMENTS The present invention will be described in detail below with reference to illustrated process diagrams. As the epoxy resin component 1, bisphenol A type epoxy known under the trade name 828 manufactured by Ciel Chemical Co., Ltd. is used, and as the filler 2, anhydrous silica known under the trade name Aerosil is used in an amount of 35 to 70% by weight.
The mixture is weighed and mixed within the range of 1, and then the blending step 3, the kneading step 4, and the grinding step 5 are carried out. Next, as the aromatic amine adduct 6, which is a curing agent, H-84 (trade name, manufactured by Nippon Gosei Kako Co., Ltd.) is blended in approximately the same amount as the epoxy resin component 1, and further, a fourth adduct, which is a curing accelerator, is added. The phosphonium salt 7 is mixed in an appropriate amount in the range of 1 to 1.5% by weight with respect to the mixture of the epoxy resin component 1 and the aromatic amine duct 6.
Then, the mixture that has undergone a remixing step 8, a repulverization step 9, a sieving step 10, and a precuring step 11 is applied to the surface of a hybrid circuit board 12, and a series of heating adhesion steps 13 and resin curing steps 14 are performed. Through the process, the resin coating process is completed and a resin coated circuit board 15 is obtained. In order to apply powdered resin thinly and uniformly to the surface of a hybrid circuit board, it is easy and practical to sprinkle the powdered resin on the heated circuit board in advance. . moreover,
This coating resin layer is then heat-cured in a heat-curing oven at 150°C for 10 to 30 minutes to approximately
It becomes a 200 μm coating layer. In addition, the preliminary curing step 11 in the figure is to leave it standing for about 10 to 30 hours at a temperature of 35 to 50°C, which is lower than the curing temperature of the resin. During this time, the filler and resin components become compatible. make things better. It also degasses and prevents bubbles from forming within the cured product.
Suppression is also effective. Furthermore, this preliminary curing step is also effective in reducing variations in gelation time and viscosity. As an example, a semiconductor IC chip (2.6mm x 3.2
Two chip capacitors (1.6 mm A hybrid circuit board with a structure in which 10 pieces (height 2.0 mm) are lined up and adhered to the wiring conductor part with silver paste is used, and the powdered resin compound is coated on both sides and finished by heat curing. Performance test results showed significantly higher performance than conventional products in terms of heat shock resistance and high temperature and humidity resistance. The following table shows, as an example of the present invention, the amount of filler added is selected as (A) 70% by weight, (B) 50% by weight, and (C) 35% by weight, and the temperature cycle test and This is the result of measuring the pressure test (PCT) at atmospheric pressure and 121℃.
Each of these measured values is, for example, equivalent to the performance value of a conventional resin-sealed semiconductor device. As a comparative reference example, an epoxy resin obtained according to standard specifications for epoxy resin containing an acid anhydride curing agent is used, and 30% by weight of Aerosil (anhydrous silica) as a filler is added to this. .
【表】
発明の効果
本発明によれば、充填材含有量35〜70重量%の
粉末状エポキシ樹脂を主剤とする粉末状樹脂物を
用いているため、充填材含有量30重量%以下の従
来の粉末状樹脂物に比べて、耐熱衝撃性、高温耐
湿性に優れた樹脂被膜を形成することができる。
しかも、本発明においては、充填材含有量35〜70
重量%の粉末状エポキシ樹脂に、これとほぼ等量
の芳香族アミンアダクトを硬化剤として配合して
いるため、粉末状樹脂物の熱軟化温度が高くな
り、電気特性が安定化する。さらに硬化促進剤と
してフオスフオニウム化合物を配合した場合に
は、硬化速度を一定化することができる。
また、本発明においては、このような粉末状樹
脂物を、その硬化温度より低い温度で予備硬化す
る工程を含んでいる。この予備硬化工程によつ
て、充填材と樹脂成分のなじみをよくすることが
でき、脱ガス化をはかり、ゲル化時間および粘度
のばらつきを少なくすることができる。
したがつて、本発明の混成集積回路板の製造方
法によれば、回路板およびそれに実装された回路
要素チツプの表面を、一様に薄く、均一で、しか
も安定な樹脂被膜で覆うことができる。[Table] Effects of the Invention According to the present invention, since a powdered resin material whose main ingredient is a powdered epoxy resin with a filler content of 35 to 70% by weight is used, conventional products with a filler content of 30% by weight or less are used. It is possible to form a resin coating with excellent thermal shock resistance and high temperature and humidity resistance compared to powdered resin materials.
Moreover, in the present invention, the filler content is 35 to 70
Since the aromatic amine adduct is blended as a curing agent in the weight percent of the powdered epoxy resin in an approximately equal amount, the thermal softening temperature of the powdered resin material becomes high and the electrical properties are stabilized. Furthermore, when a phosphonium compound is blended as a curing accelerator, the curing speed can be made constant. Further, the present invention includes a step of pre-curing such a powdered resin material at a temperature lower than its curing temperature. This preliminary curing step can improve the compatibility between the filler and the resin component, promote degassing, and reduce variations in gelation time and viscosity. Therefore, according to the method of manufacturing a hybrid integrated circuit board of the present invention, the surface of the circuit board and the circuit element chips mounted thereon can be covered with a uniformly thin, uniform, and stable resin coating. .
図は本発明の実施例を示す工程図である。
1……エポキシ(原料)、2……充填材、6…
…硬化剤、7……硬化促進剤、12……ハイブリ
ツド回路板、15……樹脂被覆回路板。
The figure is a process diagram showing an example of the present invention. 1... Epoxy (raw material), 2... Filler, 6...
...Curing agent, 7...Curing accelerator, 12...Hybrid circuit board, 15...Resin coated circuit board.
Claims (1)
樹脂に、上記粉末状エポキシ樹脂とほぼ等量の芳
香族アミンアダクトを硬化剤として配合した粉末
状樹脂物を、上記粉末状樹脂物の硬化温度より低
い温度で予備硬化し、上記予備硬化された粉末状
樹脂物を回路要素チツプを実装した回路板に塗装
し、その後上記塗装された粉末状樹脂物を熱処理
し、上記回路要素チツプおよび回路板の表面を樹
脂で被覆することを特徴とする混成集積回路板の
製造方法。 2 充填材含有量35〜70重量%の粉末状エポキシ
樹脂に、上記粉末状エポキシ樹脂とほぼ等量の芳
香族アミンアダクトを硬化材として配合し、さら
にフオスフオニウム化合物を硬化促進剤として配
合した粉末状樹脂物を、上記粉末状樹脂物の硬化
温度より低い温度で予備硬化し、上記予備硬化さ
れた粉末状樹脂物を回路要素チツプを実装した回
路板に塗装し、その後上記塗装された粉末状樹脂
物を熱処理し、上記回路要素チツプおよび回路板
の表面を樹脂で被覆することを特徴とする混成集
積回路板の製造方法。[Scope of Claims] 1. A powdered resin material prepared by blending a powdered epoxy resin with a filler content of 35 to 70% by weight and an aromatic amine adduct in an amount approximately equal to the amount of the powdered epoxy resin as a curing agent, Precuring at a temperature lower than the curing temperature of the powdered resin material, coating the precured powdered resin material on a circuit board on which circuit element chips are mounted, and then heat-treating the coated powdered resin material, A method for manufacturing a hybrid integrated circuit board, characterized in that the surfaces of the circuit element chip and the circuit board are coated with a resin. 2 Powdered epoxy resin with filler content of 35 to 70% by weight, blended with aromatic amine adduct in approximately the same amount as the above powdered epoxy resin as a curing agent, and further blended with a phosphonium compound as a curing accelerator. The resin material is precured at a temperature lower than the curing temperature of the powdered resin material, the precured powdered resin material is coated on a circuit board on which circuit element chips are mounted, and then the coated powdered resin material is cured at a temperature lower than the curing temperature of the powdered resin material. 1. A method for producing a hybrid integrated circuit board, which comprises heat-treating the product and coating the circuit element chips and the surfaces of the circuit board with a resin.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11121283A JPS603188A (en) | 1983-06-20 | 1983-06-20 | Method of producing hybrid integrated circuit board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11121283A JPS603188A (en) | 1983-06-20 | 1983-06-20 | Method of producing hybrid integrated circuit board |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS603188A JPS603188A (en) | 1985-01-09 |
JPH0426240B2 true JPH0426240B2 (en) | 1992-05-06 |
Family
ID=14555362
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11121283A Granted JPS603188A (en) | 1983-06-20 | 1983-06-20 | Method of producing hybrid integrated circuit board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS603188A (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6606468B2 (en) | 2001-01-30 | 2003-08-12 | Ricoh Company, Ltd. | Toner scatter preventing device and image forming apparatus using the same |
JP5074882B2 (en) * | 2006-10-24 | 2012-11-14 | 三井金属鉱業株式会社 | Multilayer printed wiring board manufacturing method and multilayer printed wiring board obtained by the manufacturing method |
JP6302264B2 (en) | 2013-08-28 | 2018-03-28 | 三菱重工業株式会社 | Cooling equipment and nuclear equipment |
-
1983
- 1983-06-20 JP JP11121283A patent/JPS603188A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS603188A (en) | 1985-01-09 |
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