JPH04256327A - Loop control mechanism of wire bonding apparatus - Google Patents

Loop control mechanism of wire bonding apparatus

Info

Publication number
JPH04256327A
JPH04256327A JP3017929A JP1792991A JPH04256327A JP H04256327 A JPH04256327 A JP H04256327A JP 3017929 A JP3017929 A JP 3017929A JP 1792991 A JP1792991 A JP 1792991A JP H04256327 A JPH04256327 A JP H04256327A
Authority
JP
Japan
Prior art keywords
loop control
wire
wire length
control mechanism
inner lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3017929A
Other languages
Japanese (ja)
Inventor
Keisuke Hidaka
啓介 日高
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Yamaguchi Ltd
Original Assignee
NEC Yamaguchi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Yamaguchi Ltd filed Critical NEC Yamaguchi Ltd
Priority to JP3017929A priority Critical patent/JPH04256327A/en
Publication of JPH04256327A publication Critical patent/JPH04256327A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/78—Apparatus for connecting with wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78—Apparatus for connecting with wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8512—Aligning
    • H01L2224/85148—Aligning involving movement of a part of the bonding apparatus
    • H01L2224/85169—Aligning involving movement of a part of the bonding apparatus being the upper part of the bonding apparatus, i.e. bonding head, e.g. capillary or wedge
    • H01L2224/8518—Translational movements
    • H01L2224/85181—Translational movements connecting first on the semiconductor or solid-state body, i.e. on-chip, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015—Shape
    • H01L2924/1016—Shape being a cuboid
    • H01L2924/10161—Shape being a cuboid with a rectangular active surface

Abstract

PURPOSE:To keep a wire shape and a loop height definite by a method wherein the change amount of a wire length caused at a die-bonding operation is detected and a loop control data is corrected according to a change in the wire length. CONSTITUTION:A wire length 5 is changed to a wire length 5a due to an irregularity in the position of a chip 1 which is die-bonded to an island 2. This change amount is detected at a recognition part and operated by an automatic correction loop control mechanism on the basis of this detection signal; a loop control data is corrected so as to correspond to the change amount; after that, a wire bonding operation is performed. On the other hand, when the wire length 5 is changed to the wire length 5a due to the deformation of an inner lead 3 at a multipin package, its deviation is detected when the inner lead 3 is recognized. Then, the deviation is operated according to the change amount of the wire length 5; the loop control data is corrected; after that, the wire bonding operation is performed.

Description

【発明の詳細な説明】[Detailed description of the invention]

【０００１】0001

【産業上の利用分野】本発明はワイヤーボンディング装
置のループコントロール機構に関し、特にワイヤー長の
変動に対してワイヤー形状・ループ高さを一定に保つル
ープコントロール機構に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a loop control mechanism for a wire bonding apparatus, and more particularly to a loop control mechanism that maintains a constant wire shape and loop height despite variations in wire length.

【０００２】0002

【従来の技術】従来のループコントロール機構は、図３
の動作説明図に示すように、アイランド２に固着された
チップ１の電極部４とインナーリード３との間をワイヤ
ーボンディングする際、ボンディングツールの電極部４
からリバース位置６までの上昇量、リバース量７、ボン
ディングツール上昇量８、インナーリード３へ移動する
経路９のスピードの各データ（以下これら４つデータを
総してループコントロールデータと呼ぶ）を最適値に設
定することにより、ワイヤー形状・ループ高さをコント
ロールしていた。これを図４の流れ図で説明すると、認
識部においてチップ１およびインナーリード３の位置を
認識した後、ループコントロール機構において上述の最
適値に設定されているループコントロールデータに従っ
てボンディングツールが移動し、ワイヤーボンディング
が行われる。[Prior Art] A conventional loop control mechanism is shown in Fig. 3.
As shown in the operation explanatory diagram, when wire bonding is performed between the electrode part 4 of the chip 1 fixed to the island 2 and the inner lead 3, the electrode part 4 of the bonding tool
Optimize each data of the amount of rise from to the reverse position 6, the amount of reverse 7, the amount of rise of the bonding tool 8, and the speed of the path 9 moving to the inner lead 3 (hereinafter, these four data are collectively referred to as loop control data). By setting the value, the wire shape and loop height were controlled. To explain this with the flowchart of FIG. 4, after the recognition unit recognizes the positions of the chip 1 and the inner leads 3, the bonding tool moves in accordance with the loop control data set to the above-mentioned optimum value in the loop control mechanism, and Bonding is performed.

【０００３】0003

【発明が解決しようとする課題】この従来のループコン
トロール機構では、ダイボンディング時のチップ位置精
度およびインナーリード位置精度に伴うワイヤー長（チ
ップの電極部からインナーリードまでの直線距離）の変
化に対して、同一のループコントロールデータのままで
ワイヤーボンディングを行っていたため、ワイヤー形状
・ループ高さが一定にならないという欠点があった。[Problems to be Solved by the Invention] This conventional loop control mechanism has problems with changes in wire length (linear distance from the chip electrode to the inner lead) due to chip position accuracy and inner lead position accuracy during die bonding. However, since wire bonding was performed using the same loop control data, there was a drawback that the wire shape and loop height were not constant.

【０００４】0004

【課題を解決するための手段】上述した従来のループコ
ントロール機構に対し、本発明はダイボンディング時に
生ずるワイヤー長の変化に対して、その変化量を認識部
にて検知し、この検知信号に基づいて演算し、ワイヤー
長の変化に応じてループコントロールデータを自動的に
補正することにより、ワイヤー形状・ループ高さを一定
に保つことができる自動補正ループコントロール機構を
有している。[Means for Solving the Problems] In contrast to the conventional loop control mechanism described above, the present invention detects the amount of change in wire length that occurs during die bonding using a recognition unit, and based on this detection signal. It has an automatic correction loop control mechanism that can maintain a constant wire shape and loop height by automatically correcting the loop control data according to changes in wire length.

【０００５】[0005]

【実施例】次に本発明について図面を参照して説明する
。図１は本発明の一実施例を説明する図で、同図（ａ）
はチップ側のずれを示す平面図、同図（ｂ）はインナー
リード側のずれを示す平面図である。同図（ａ）におい
て、アイランド２にダイボンディングされたチップ１の
位置のばらつきにより、ワイヤー長５が５ａ（点線で示
す）に変化する。この変化量｜５−５ａ｜を認識部にて
検知し、この検知信号に基づいて演算し、変化量に応じ
て自動的にループコントロールデータを補正し、ワイヤ
ー長が変化してもワイヤー形状・ループ高さは一定に保
たれるようにワイヤーボンディングがなされる。DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be explained with reference to the drawings. FIG. 1 is a diagram illustrating an embodiment of the present invention, and FIG.
is a plan view showing the deviation on the chip side, and FIG. 2(b) is a plan view showing the deviation on the inner lead side. In FIG. 2A, the wire length 5 changes to 5a (indicated by a dotted line) due to variations in the position of the chip 1 die-bonded to the island 2. This amount of change |5-5a| is detected by the recognition unit, and calculations are made based on this detection signal, and the loop control data is automatically corrected according to the amount of change, so that even if the wire length changes, the wire shape and Wire bonding is done so that the loop height remains constant.

【０００６】次に同図（ｂ）において、これは特に多ピ
ンパッケージのインナーリードの変形に対しワイヤー長
が変化した場合で、インナーリード認識時にインナーリ
ード３のずれ量を検知し、これに伴うワイヤー長５の変
化量｜５−５ａ｜に応じて演算し、自動的にループコン
トロールデータを補正し、ワイヤー長５が５ａ（点線）
に変化してもワイヤー形状・ループ高さは一定に保たれ
る。Next, in the same figure (b), this is especially the case where the wire length changes due to the deformation of the inner lead of a multi-pin package, and when the inner lead is recognized, the amount of deviation of the inner lead 3 is detected and The amount of change in wire length 5 |5-5a| is calculated, the loop control data is automatically corrected, and wire length 5 is 5a (dotted line).
Even if the wire shape and loop height change, the wire shape and loop height remain constant.

【０００７】図２は本実施例を説明する流れ図で、認識
部において、チップ１のずれ量およびインナーリード３
のずれ量を検知し、この検知信号に基づき自動補正ルー
プコントロール機構において演算し且つデータを補正し
、ワイヤーボンディングを行う。なお、本実施例は超音
波ボンディングに対しても、また熱圧着ボンディングに
対しても適用できる。FIG. 2 is a flowchart for explaining this embodiment, in which the recognition unit detects the amount of deviation of the chip 1 and the inner lead 3.
The amount of deviation is detected, and based on this detection signal, an automatic correction loop control mechanism calculates and corrects the data, and wire bonding is performed. Note that this embodiment can be applied to both ultrasonic bonding and thermocompression bonding.

【０００８】[0008]

【発明の効果】以上説明したように本発明は、ダイボン
ディング時のチップの位置精度およびインナーリードの
位置精度のばらつきによるワイヤー長の変化量を検知し
、検知信号に基づいて演算を行い、その変化量に応じて
ループコントロールデータを自動的に補正するループコ
ントロール機構を設けることにより、チップあるいはイ
ンナーリードの位置ずれによってワイヤー長が変化して
も、ワイヤー形状・ループ高さを一定に保つことができ
るという効果を有する。As explained above, the present invention detects the amount of change in wire length due to variations in chip position accuracy and inner lead position accuracy during die bonding, performs calculations based on the detection signal, and By providing a loop control mechanism that automatically corrects the loop control data according to the amount of change, the wire shape and loop height can be kept constant even if the wire length changes due to the positional deviation of the tip or inner lead. It has the effect of being able to.

【図面の簡単な説明】[Brief explanation of the drawing]

【図１】本発明の一実施例を説明する図で、同図（ａ）
はチップ側のずれを示す平面図、同図（ｂ）はインナー
リード側のずれを示す平面図である。FIG. 1 is a diagram illustrating an embodiment of the present invention, and FIG.
is a plan view showing the deviation on the chip side, and FIG. 2(b) is a plan view showing the deviation on the inner lead side.

【図２】本発明の一実施例を示す流れ図である。FIG. 2 is a flowchart illustrating one embodiment of the present invention.

【図３】ループコントロールの動作説明図である。FIG. 3 is an explanatory diagram of loop control operation.

【図４】従来のループコントロール機構の流れ図である
。FIG. 4 is a flow diagram of a conventional loop control mechanism.

【符号の説明】[Explanation of symbols]

１　　　　チップ ２　　　　アイランド ３　　　　インナーリード ４　　　　電極部 ５，５ａ　　　　ワイヤー長 ６　　　　リバース位置 ７　　　　リバース量 ８　　　　ボンディングツール上昇量 1 Chip 2 Island 3 Inner lead 4 Electrode part 5,5a Wire length 6 Reverse position 7 Reverse amount 8 Bonding tool rise amount

Claims (1)

【特許請求の範囲】[Claims] 【請求項１】　　ダイボンディング時のチップの位置ず
れ及びインナーリードの変形によるチップの電極部から
インナーリードまでの距離の変化量を検知する認識部と
、この検知信号に基づいて演算し、その変化量に対して
ワイヤー形状・ループ高さを一定に保つ様にループコン
トロールデータを補正する自動補正ループコントロール
機構とを備えることを特徴とするワイヤーボンディング
装置のループコントロール機構。1. A recognition unit that detects the amount of change in the distance from the electrode part of the chip to the inner lead due to the positional deviation of the chip and the deformation of the inner lead during die bonding, and a recognition unit that calculates based on this detection signal and detects the change A loop control mechanism for a wire bonding device, comprising an automatic correction loop control mechanism that corrects loop control data so as to keep the wire shape and loop height constant with respect to the amount.
JP3017929A 1991-02-08 1991-02-08 Loop control mechanism of wire bonding apparatus Pending JPH04256327A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3017929A JPH04256327A (en) 1991-02-08 1991-02-08 Loop control mechanism of wire bonding apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3017929A JPH04256327A (en) 1991-02-08 1991-02-08 Loop control mechanism of wire bonding apparatus

Publications (1)

Publication Number Publication Date
JPH04256327A true JPH04256327A (en) 1992-09-11

Family

ID=11957462

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3017929A Pending JPH04256327A (en) 1991-02-08 1991-02-08 Loop control mechanism of wire bonding apparatus

Country Status (1)

Country Link
JP (1) JPH04256327A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59210648A (en) * 1983-05-16 1984-11-29 Toshiba Corp Wire bonding method of semiconductor
JPS63232344A (en) * 1987-03-20 1988-09-28 Toshiba Corp Method and apparatus for wire bonding

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59210648A (en) * 1983-05-16 1984-11-29 Toshiba Corp Wire bonding method of semiconductor
JPS63232344A (en) * 1987-03-20 1988-09-28 Toshiba Corp Method and apparatus for wire bonding

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