JPH0425269U - - Google Patents

Info

Publication number
JPH0425269U
JPH0425269U JP6583090U JP6583090U JPH0425269U JP H0425269 U JPH0425269 U JP H0425269U JP 6583090 U JP6583090 U JP 6583090U JP 6583090 U JP6583090 U JP 6583090U JP H0425269 U JPH0425269 U JP H0425269U
Authority
JP
Japan
Prior art keywords
wiring
hole
layer
wiring board
lands
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6583090U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP6583090U priority Critical patent/JPH0425269U/ja
Publication of JPH0425269U publication Critical patent/JPH0425269U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
JP6583090U 1990-06-21 1990-06-21 Pending JPH0425269U (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6583090U JPH0425269U (de) 1990-06-21 1990-06-21

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6583090U JPH0425269U (de) 1990-06-21 1990-06-21

Publications (1)

Publication Number Publication Date
JPH0425269U true JPH0425269U (de) 1992-02-28

Family

ID=31598017

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6583090U Pending JPH0425269U (de) 1990-06-21 1990-06-21

Country Status (1)

Country Link
JP (1) JPH0425269U (de)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002071819A1 (fr) * 2001-03-07 2002-09-12 Sony Corporation Pastille de carte de circuit imprime, procede de fabrication de la carte de circuit imprime et procede de montage de ladite carte
WO2020026959A1 (ja) * 2018-07-31 2020-02-06 株式会社村田製作所 樹脂基板、および樹脂基板の製造方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63119596A (ja) * 1986-11-07 1988-05-24 日本電波工業株式会社 回路基板及びこれを使用した電子装置
JPS6361181B2 (de) * 1979-11-22 1988-11-28

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6361181B2 (de) * 1979-11-22 1988-11-28
JPS63119596A (ja) * 1986-11-07 1988-05-24 日本電波工業株式会社 回路基板及びこれを使用した電子装置

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002071819A1 (fr) * 2001-03-07 2002-09-12 Sony Corporation Pastille de carte de circuit imprime, procede de fabrication de la carte de circuit imprime et procede de montage de ladite carte
KR100887894B1 (ko) * 2001-03-07 2009-03-11 소니 가부시끼 가이샤 프린트 배선판의 랜드부, 프린트 배선판의 제조 방법, 및프린트 배선판 실장 방법
WO2020026959A1 (ja) * 2018-07-31 2020-02-06 株式会社村田製作所 樹脂基板、および樹脂基板の製造方法
JPWO2020026959A1 (ja) * 2018-07-31 2021-03-25 株式会社村田製作所 樹脂基板、および樹脂基板の製造方法
US11277919B2 (en) 2018-07-31 2022-03-15 Murata Manufacturing Co., Ltd. Resin substrate and method for producing resin substrate

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