JPH04245447A - Metal mold for semiconductor element resin sealing use - Google Patents

Metal mold for semiconductor element resin sealing use

Info

Publication number
JPH04245447A
JPH04245447A JP2942791A JP2942791A JPH04245447A JP H04245447 A JPH04245447 A JP H04245447A JP 2942791 A JP2942791 A JP 2942791A JP 2942791 A JP2942791 A JP 2942791A JP H04245447 A JPH04245447 A JP H04245447A
Authority
JP
Japan
Prior art keywords
gate
resin
sealing resin
thickness
resin layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2942791A
Other languages
Japanese (ja)
Inventor
Yoshihiko Matsumoto
松本 好彦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2942791A priority Critical patent/JPH04245447A/en
Publication of JPH04245447A publication Critical patent/JPH04245447A/en
Pending legal-status Critical Current

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  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

PURPOSE:To reduce the size of a resin foreign substance remaining in a sealing resin layer and to reduce the bent and left amount of a gate by a method wherein the thickness of a sealing resin in the contact part between the flow passage of the sealing resin arranged so as to come into contact with the gate part and the gate part is increased. CONSTITUTION:A gate 12 is formed at the lower side than the central part of the thickness of a sealing resin layer 10, i.e., at the contact part with the tip of a molten-resin flow passage 11. Although the molten-resin flow passage 11 is hollow, its tip is matched directly to the small-diameter gate 12. As a result, a slope 13 is formed; the lower end is formed to be linear with the lower end of the gate. At this time, a slope (a) is worked; the dimensional tolerance of E is changed from 0.17mm+ or -0.005mm to 0.20mm+0.05mm to 0.20-0mm. At this time, the angle formed by the gate 12 and by the slope 13 of the flow passage 11 is changed from 35 deg. in conventional cases to 40 deg. or higher and up to 90 deg.; the pressure of a molten resin at the gate 12 is increased; an equally thick part whose diameter is small is eliminated; the bent and left amount of the gate is reduced.

Description

【発明の詳細な説明】[Detailed description of the invention]

[発明の目的] [Purpose of the invention]

【0001】0001

【産業上の利用分野】本発明は樹脂封止型半導体装置の
樹脂封止技術に係わり、特に、トランスファー(Tra
nsfer)成型用金型に好適なものである。
FIELD OF INDUSTRIAL APPLICATION This invention relates to resin encapsulation technology for resin encapsulation type semiconductor devices, and in particular to transfer (Transfer) technology.
nsfer) is suitable for molding molds.

【0002】0002

【従来の技術】半導体素子を外部雰囲気と分離する手法
として金型を利用するトランスファー成形が広く使用さ
れており、専用の製造装置としてはいわゆるシングルポ
ット(Single  Pot)にタブレット(Tab
let)状の封止樹脂を投入して所定の圧力と加熱によ
り被封止半導体素子を処理するのが一般的である。この
封止工程を実施するのには、リードフレーム(Lead
  Frame)にマウント(Mount)された被封
止半導体素子を金型に配書するために複数のキャビティ
(Cavity)と、キャビティ内に封止樹脂を流入さ
せるゲート(Gate)と、ポット内で溶融し各キャビ
ティに向かう封止樹脂の流路が当然設置される。
[Prior Art] Transfer molding, which uses a mold, is widely used as a method for separating semiconductor elements from the external atmosphere.Special manufacturing equipment includes a so-called single pot and a tablet.
Generally, a semiconductor element to be sealed is processed by applying a molded sealing resin and applying a predetermined pressure and heat. A lead frame (Lead frame) is used to carry out this sealing process.
A plurality of cavities (Cavities) are provided to place the semiconductor device to be encapsulated mounted on the frame (Mount) in the mold, a gate (Gate) for allowing the sealing resin to flow into the cavity, and a gate (Gate) for allowing the encapsulation resin to flow into the cavity. Naturally, a passage for sealing resin toward each cavity is provided.

【0003】ところで、ポット内で溶融した封止樹脂は
一旦カル(Cal)に集められた後、流路に分散されて
各ゲートに流れ込み、樹脂の硬化が終わってから成型金
型から流路と樹脂封止型半導体装置が密着した状態で取
出し次に流路を固定した状態で樹脂封止型半導体装置を
手で剥し取っていた。また、自動樹脂成型機では樹脂封
止型半導体装置がマウントされたリードフレームを固定
した上で、治具で抜き落すことによって両者を分離して
いる。次にこのような樹脂封止工程における封止樹脂層
と流路の関係を説明する。
[0003] By the way, the sealing resin melted in the pot is once collected in Cal, then dispersed into the channel and flows into each gate, and after the resin has hardened, it is removed from the molding die into the channel. The resin-sealed semiconductor device was taken out in a state in which it was in close contact with the device, and then the resin-sealed semiconductor device was peeled off by hand while the flow path was fixed. Furthermore, in an automatic resin molding machine, a lead frame on which a resin-sealed semiconductor device is mounted is fixed, and then the two are separated by removing the lead frame with a jig. Next, the relationship between the sealing resin layer and the flow path in such a resin sealing process will be explained.

【0004】即ち、一対の金型を構成する上型に形成さ
れたキャビティには前記のようにリードフレームにマウ
ントした被封止半導体素子や、これに必要な電極に金属
細線をボンディング(Bonding)したり、更にパ
ッシベイション(Passivation)層などが形
成されているために、下型より厚さが大きく成型されて
いる。しかも一対の金型に封入樹脂を流入させるゲート
は両者の境界部分に小形に設置され更にこれに連続して
形成する流路の下端は当然ゲート下端と直線状に形成さ
れるために、上端とゲート間には傾斜面が形成されるこ
とになる。
That is, in the cavity formed in the upper die constituting the pair of molds, thin metal wires are bonded to the semiconductor element to be sealed mounted on the lead frame and the electrodes necessary therefor. In addition, since a passivation layer and the like are formed, the thickness is larger than that of the lower mold. Moreover, the gate that allows the encapsulating resin to flow into the pair of molds is installed in a small size at the boundary between the two, and the lower end of the flow path that is continuous with this gate is naturally formed in a straight line with the lower end of the gate, so that the upper end and An inclined surface will be formed between the gates.

【0005】このような樹脂封止工程によりいわゆるス
ーパミニトランジスタ(SuperMini  Tar
nsister)またはダイオード(Diod)用の超
小形外囲器(封止樹脂層が該当する)も形成されており
、その形状を図1の斜視図により示した。即ち長方形の
外囲器は全長が2.0mm、縦1.25mm、高さ0.
95mmと極めて小形であり、その側面には封止された
半導体素子と電気的に接続したリード端子2、3を導出
して他の機器との接続に備えている。このようにトラン
スファー成形に不可欠な流路とゲートの関係を図2乃至
図5を参照して説明する。図2及び図4は封止樹脂とゲ
ート先端部の分離前の状態を図1をY−Y′線により切
断することによって示した断面図、図3はゲートのある
面から見たゲート先端部分離後の側面図、図5は封止樹
脂とゲート先端部を分離した後の状態を、図1をY−Y
′線で切断することによって示した断面図である。とこ
ろで、樹脂封止型半導体装置用封止樹脂層1にはその厚
さの半分以下の場所即ち一対の金型である上型と下型の
境界部分でありしかもリードフレームが配置される場所
に対応する位置付近にゲート4が形成されるのは前記の
通りである。しかもゲート4は極めて小面積の孔で構成
されており縦E横Dにより断面を明らかにしている(図
3参照)。また封入樹脂正確には溶融樹脂が流入する流
路5をゲート4に連続して設置しなければならないし、
更に樹脂成型工程後には各図に明らかなように流路5と
ゲート4に連続した径小な等厚部6が形成される。更に
また図5では径小な等厚部6が折れて樹脂が残った状態
を示している。
[0005] Through such a resin sealing process, a so-called super mini transistor (SuperMini Tar) is manufactured.
An ultra-small envelope (corresponding to the sealing resin layer) for a diode or a diode is also formed, and its shape is shown in the perspective view of FIG. That is, the rectangular envelope has a total length of 2.0 mm, a length of 1.25 mm, and a height of 0.0 mm.
It is extremely small, measuring 95 mm, and has lead terminals 2 and 3 electrically connected to the sealed semiconductor element drawn out from its side surfaces for connection to other equipment. The relationship between the flow path and the gate, which is essential for transfer molding, will be explained with reference to FIGS. 2 to 5. 2 and 4 are cross-sectional views taken along the Y-Y' line in FIG. 1, showing the state before the sealing resin and the gate tip are separated, and FIG. 3 is the gate tip seen from the side with the gate. Figure 5 is a side view after separation, and Figure 5 shows the state after separating the sealing resin and the gate tip.
FIG. Incidentally, the encapsulating resin layer 1 for a resin-encapsulated semiconductor device has a portion less than half its thickness, that is, a boundary between a pair of molds, an upper mold and a lower mold, and a place where a lead frame is arranged. As described above, the gate 4 is formed near the corresponding position. Moreover, the gate 4 is composed of a hole with an extremely small area, and its cross section is defined by the length E and the width D (see FIG. 3). Furthermore, to be more precise, the passage 5 through which the molten resin flows must be installed continuously to the gate 4.
Further, after the resin molding process, as is clear from each figure, a small diameter equal thickness part 6 is formed which is continuous with the flow path 5 and the gate 4. Furthermore, FIG. 5 shows a state in which the small-diameter, equal-thickness portion 6 is broken and resin remains.

【0006】[0006]

【発明が解決しようとする課題】樹脂成型後の樹脂封止
型半導体装置の封止樹脂層と流路の分離作業にあっては
手作業、自動作業を問わず封止樹脂層にゲートの折れ残
りが付着して外囲器として異形状や寸法規格外れなどの
不都合が発生していた。
[Problems to be Solved by the Invention] When separating the sealing resin layer and flow path of a resin-molded semiconductor device after resin molding, gates may break in the sealing resin layer regardless of whether the work is done manually or automatically. The residue adhered to the envelope, causing inconveniences such as irregular shapes and dimensional deviations.

【0007】特に図1に示した超小形外囲器からなる樹
脂封止型半導体装置においては外囲器に対するゲート折
れ残り量の割合いが大きくなるために、ゲート折れ残り
量を小さくすることが強く求められていた。その対策と
しては封止樹脂層に接し流路5に連続して形成される径
小な等厚部6のE寸法即ちゲート4を小さくする手段が
採られてきたが、小さくし過ぎると樹脂巣や未充填など
の成形不良が発生するので、成型性の観点からゲート折
れ残り量が零になるまで小さくすることができなかった
。更に他の手段として図2の点線で示したように径小な
等厚部6とこれに連続する流路5の先端を結ぶ傾斜6’
を大きくしてゲート4の先端部に最大応力が加わるよう
にしても大きな効果は得られなかった。
In particular, in a resin-sealed semiconductor device having an ultra-small envelope shown in FIG. 1, the ratio of the amount of gate remaining bending to the envelope becomes large, so it is difficult to reduce the amount of remaining gate bending. It was strongly requested. As a countermeasure, measures have been taken to reduce the E dimension of the small-diameter, equal-thickness section 6 formed continuously in the flow path 5 in contact with the sealing resin layer, that is, to reduce the gate 4, but if it is made too small, resin cavities From the viewpoint of moldability, it has not been possible to reduce the amount of remaining gate folding to zero because molding defects such as unfilling and unfilling occur. Furthermore, as another means, as shown by the dotted line in FIG.
Even if the maximum stress was applied to the tip of the gate 4 by increasing the stress, no significant effect was obtained.

【0008】最大の難点は径小な等厚部6の発生である
。と言うのは成形金型にゲート部を製作する際には成型
性優先のためにゲート4のE寸法規格を基準値±5μm
に規制しているために、砥石によりこする工程を行って
おり、その結果径小な等厚部6がどうしても生じてゲー
トの折れ残り量を大きくする最大要因になっていること
が判明した。
[0008] The biggest difficulty is the occurrence of a uniform thickness portion 6 with a small diameter. This is because when manufacturing the gate part in the mold, the E dimension standard for gate 4 should be set to the standard value ±5μm in order to give priority to moldability.
It has been found that the process of scraping with a grindstone is performed because of the regulation, and as a result, a portion 6 of equal thickness with a small diameter inevitably occurs, which is the biggest factor in increasing the amount of unbent portion of the gate.

【0009】径小な等厚部6の存在により図5に示した
ような突起物が封止樹脂層に残り、その結果次工程にお
ける製造設備のトラブル(Trouble)の基となり
、出荷した際にはプリント(Print)基板への実装
工程ではピックアップ(Pick  Up)ミス(Mi
ss)が発生する。
Due to the presence of the small-diameter, equal-thickness portion 6, protrusions as shown in FIG. 5 remain on the sealing resin layer, which causes trouble in the manufacturing equipment in the next process, and causes problems when shipped. In the mounting process on the printed circuit board, there is a pickup (Pick Up) mistake (Mi
ss) occurs.

【0010】本発明はこのような事情により成されたも
ので、特に、ゲート折れ残り量を減少させることを目的
とするものである。
The present invention was developed in view of the above circumstances, and is particularly aimed at reducing the amount of gate bending remaining.

【0011】[発明の構成][Configuration of the invention]

【0012】0012

【課題を解決するための手段】一対の金型と、この一方
に形成し被樹脂封止半導体素子を配置するキャビティと
、前記キャビティに対応して設置し封入樹脂を流入する
ゲート部と、前記ゲート部に接触して配置する封入樹脂
流路を具備し、両者の接触部分における封入樹脂厚を向
上することにより封入樹脂層に残る樹脂異形物の大きさ
を極小とする点に本発明に係わる半導体素子樹脂封止用
金型の特徴がある。
[Means for Solving the Problems] A pair of molds, a cavity formed in one of the molds and in which a resin-sealed semiconductor element is disposed, a gate part installed corresponding to the cavity and into which a sealing resin flows, The present invention is characterized in that the size of resin irregularities remaining in the encapsulating resin layer is minimized by providing an encapsulating resin flow path disposed in contact with the gate portion and increasing the thickness of the encapsulating resin at the contact portion between the two. It has the characteristics of a mold for resin encapsulation of semiconductor elements.

【0013】[0013]

【作用】本発明では金型にゲート部を製作する際封止樹
脂層の径小な等厚部の発生を極限まで小さくできる形状
としたものである。即ち樹脂成型用金型にゲート部を形
成する際、先端部の厚さ寸法を従来のものの約1.18
倍に拡大し、長さを0.10mmから0mmに変更し加
えて流路を直接ゲート部に接触させる。しかもゲートよ
り径が大きい流路先端部の傾斜角度を増大させることに
より従来砥石によるみがき工程で形成されていた等厚部
が除去できる。この結果、成型性では樹脂巣不良及び樹
脂未充填不良が1000ppmから500ppmに半減
し、更に、ゲート折れ残りを持った樹脂封止型半導体装
置の発生率が従来の23%から2%とほぼ1/10に減
少し、ゲート折れ残り部の長さも最大値で0.25mm
から0.13mmに半減することが判明した。
[Operation] The present invention has a shape that can minimize the occurrence of small-diameter, equal-thickness portions of the sealing resin layer when manufacturing a gate portion in a mold. In other words, when forming a gate part in a resin molding mold, the thickness of the tip part is approximately 1.18 mm thick compared to the conventional one.
It is enlarged twice, the length is changed from 0.10 mm to 0 mm, and the channel is brought into direct contact with the gate part. Moreover, by increasing the inclination angle of the tip of the flow path, which has a larger diameter than the gate, it is possible to remove the equal thickness portion that was conventionally formed in the polishing process using a grindstone. As a result, in terms of moldability, resin void defects and non-resin filling defects have been halved from 1,000 ppm to 500 ppm, and the incidence of resin-sealed semiconductor devices with gate folds has been reduced from 23% to 2%, almost 1%. /10, and the maximum length of the unbent portion of the gate is 0.25 mm.
It was found that the diameter was halved from 0.13 mm to 0.13 mm.

【0014】[0014]

【実施例】本発明に係わる実施例を図6乃至図12によ
り説明するが、理解を助けるために従来技術と同一の部
品にも新番号を付ける。図6は本発明を施した封止樹脂
とゲートの分離前の状態を、図1をY−Y’線で切断す
ることによって示した断面図、図7は本発明を施した封
止樹脂とゲートの分離後の状態を、Y−Y’線によって
図1を切断することによって示した断面図、図8a、b
は流路と封止樹脂層が直線状に形成されていない状態を
示す断面図及び上面図、図9は樹脂成型金型構成部品で
ある封止樹脂、ゲート、流路の断面図、図10及び図1
1は樹脂成型金型のゲート部を従来技術と本発明を対称
的に示した断面図、図12は従来と本発明におけるゲー
ト折れ残り量の長さを示した図である。即ち、本発明に
係わる実施例により形成された樹脂封止型半導体装置は
例えば従来技術欄に示したスーパミニトランジスタやダ
イオードであり、一対の金型を使用するいわゆるトラン
スファー成形により形成される封止樹脂層10の寸法は
長さ2.0mm×幅1.25mm×厚さ0.95mmと
極めて小さい。この成形工程の先立つ組立工程ではいわ
ゆるリードフレームのベッド(Bed)部にマウントし
た被封止半導体素子の電極間やリードフレームに形成さ
れたリード間を公知のボンディング法により金属製細線
で結んで電気的な接続をしており、上型金型の厚さを下
型のそれより大きくせざるを得ない。また、このような
処理を施した被封止半導体素子を配置する上型金型に複
数個の各キャビティを設け、ここに溶融樹脂層を流入さ
せるには当然ゲート層が形成されなければならない。従
って一対の金型の境界部分言替えれば図6、図7に示す
ように封止樹脂層10の厚さの中心部分より下側即ち溶
融樹脂流路11の先端との接触部分にゲート12を形成
する。このようなトランスファ成形を行う専用機はマル
チポット型のものが最近使用されており、タブレット状
の封止樹脂を加熱しかつ所定の圧力と加熱により溶融さ
れた樹脂はカルに一旦集められてから各ゲート12に流
入する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment according to the present invention will be described with reference to FIGS. 6 to 12, and new numbers will be given to parts that are the same as those in the prior art to aid understanding. FIG. 6 is a sectional view taken along the Y-Y' line in FIG. 1, showing the sealing resin according to the present invention and the gate before separation, and FIG. 7 shows the sealing resin according to the present invention and the gate before they are separated. FIGS. 8a and 8b are cross-sectional views showing the state after separation of the gates by cutting FIG. 1 along the Y-Y'line; FIGS.
9 is a cross-sectional view and a top view showing a state in which the flow channel and the sealing resin layer are not formed in a straight line, FIG. 9 is a cross-sectional view of the sealing resin, gate, and flow channel that are the components of the resin molding mold, and FIG. 10 and Figure 1
1 is a cross-sectional view symmetrically showing the gate portion of a resin molding die in the prior art and the present invention, and FIG. 12 is a diagram showing the length of the gate unbent portion in the conventional technology and the present invention. That is, the resin-sealed semiconductor device formed according to the embodiment of the present invention is, for example, the super mini transistor or diode shown in the prior art section, and the resin-sealed semiconductor device is formed by so-called transfer molding using a pair of molds. The dimensions of the resin layer 10 are extremely small: length 2.0 mm x width 1.25 mm x thickness 0.95 mm. In the assembly process that precedes this molding process, the electrodes of the encapsulated semiconductor element mounted on the bed of the lead frame and the leads formed on the lead frame are connected using thin metal wires using a known bonding method. The thickness of the upper mold must be larger than that of the lower mold. Further, in order to provide a plurality of cavities in the upper mold in which the encapsulated semiconductor element subjected to such treatment is placed, and to allow the molten resin layer to flow into these cavities, a gate layer must naturally be formed. Therefore, the gate 12 is placed at the boundary between the pair of molds, in other words, at the bottom of the center of the thickness of the sealing resin layer 10, that is, at the contact area with the tip of the molten resin channel 11, as shown in FIGS. 6 and 7. Form. Recently, multi-pot type machines have been used specifically for transfer molding, which heat a tablet-shaped sealing resin and melt the resin under a certain pressure and heat, which is then collected in a cal. into each gate 12.

【0015】またリードフレームの材質としては鉄、鉄
ニッケル(Nickel)合金例えばファーニコやクラ
ッド(Clad)材更に銅や銅合金あるいは銅のクラッ
ド材などが利用でき、金属製細線材料にはAu、Al、
及び銅や銅合金あるいは銅のクラッド材用に銅合金を適
用する。ところで、溶融樹脂流路11は当然中空状に形
成されているが、その先端は小径のゲート12に直接合
致させるために傾斜面13が形成され、下端はゲートの
下端と直線状に形成する。ただし流路と封止樹脂層が直
線状でない場合として図8a、bの断面図及び上面図に
示した。図8bの点線はリードフレーム14の一部を想
定したものであり、図中の丸は位置決め用のピン(Pi
n)が挿入される孔であり、封止樹脂層1の他にインナ
ーリード18が示されている。
[0015] As the material for the lead frame, iron, iron-nickel alloys such as Farnico and Clad materials, copper, copper alloys, and copper clad materials can be used, and fine metal wire materials include Au, Al, etc. ,
and copper alloys for copper, copper alloys, or copper cladding materials. Incidentally, the molten resin flow path 11 is naturally formed in a hollow shape, but an inclined surface 13 is formed at its tip to directly match the small diameter gate 12, and its lower end is formed in a straight line with the lower end of the gate. However, the case where the flow path and the sealing resin layer are not linear is shown in the cross-sectional view and top view of FIGS. 8a and 8b. The dotted line in FIG. 8b is assumed to be a part of the lead frame 14, and the circle in the figure is a positioning pin (Pi
n) is a hole into which an inner lead 18 is shown in addition to the sealing resin layer 1.

【0016】ところで図9には上下金型の一部を明らか
にしているが、下型の番号は上型のそれに’を付けて示
した。即ち上下金型内内には被封止半導体素子をマウン
トしたリードフレーム14が配置されるのが当然として
、封止樹脂層10が形成されるキャビティ部の一部15
、15’を挟んでゲート12、12’の一部とリードガ
イド(Guide)部16、16’更にゲート12、1
2’に隣接して流路11の一部を構成するサブランナー
(Sub  Runner)17、17’が形成されて
いる。この図に書かれた矢印は溶融樹脂の流入方向を示
している。
By the way, FIG. 9 shows a part of the upper and lower molds, and the number of the lower mold is indicated by adding '' to that of the upper mold. That is, it is natural that the lead frame 14 on which the semiconductor element to be sealed is mounted is placed inside the upper and lower molds, and a portion 15 of the cavity portion where the sealing resin layer 10 is formed.
, 15', part of the gates 12, 12' and lead guide parts 16, 16', and further gates 12, 1.
Sub runners 17 and 17' forming a part of the flow path 11 are formed adjacent to the channel 2'. The arrow drawn in this figure indicates the direction in which the molten resin flows.

【0017】ところで封止樹脂層10との分離時に径小
な等厚部が発生するか否かを律するのはゲート12、1
2’の形状であり、金型の従来の製作段階では図10に
示すように傾斜面aを加工してEの寸法公差を0.17
mm±0.005mmと厳しい値以内にするのは非常に
困難であった。そこで、初め小さめに加工後b面を砥石
で削ってE寸法公差内に入るようにしていた。しかし、
図2、4、5に示したようにゲート12に0.02mm
から0.15mmの径小な等厚部が発生していた。しか
し、本発明ではE寸法公差を0.17mm±0.005
mmから0.20mm+0.05mm〜0.20mm−
0mmに変更した。この時流路11の下端はゲート12
、12’の下端と直線状に形成されており、ゲート12
と流路11の傾斜面13の成す角度を従来の35°から
40°以上90°までに変更して、ゲート12のおける
溶融樹脂の圧力を増大すると共に径小な等厚部を解消し
た(図11参照)。この結果図12に示すようにゲート
折れ残り量が減少してその発生率が大幅に改善できると
の事実が得られた。しかも樹脂巣や未充填などの樹脂整
形性に関しても改善される効果が得られ、従来のように
径小な等厚部が発生しないことが判明した。
By the way, it is the gates 12 and 1 that determine whether or not a uniform thickness portion with a small diameter is generated when separated from the sealing resin layer 10.
2' shape, and in the conventional manufacturing stage of the mold, as shown in Fig. 10, the inclined surface a is machined and the dimensional tolerance of E is 0.17.
It was very difficult to keep it within the strict value of mm±0.005 mm. Therefore, after machining it to be smaller at first, the B side was ground with a whetstone to bring it within the E dimension tolerance. but,
0.02mm on gate 12 as shown in Figures 2, 4 and 5.
An equal thickness part with a small diameter of 0.15 mm was generated. However, in the present invention, the E dimension tolerance is 0.17 mm ± 0.005
mm to 0.20mm+0.05mm~0.20mm-
It was changed to 0mm. At this time, the lower end of the flow path 11 is connected to the gate 12.
, 12', and is formed in a straight line with the lower end of the gate 12'.
The angle formed by the inclined surface 13 of the flow path 11 was changed from the conventional 35° to 40° or more and up to 90°, increasing the pressure of the molten resin at the gate 12 and eliminating the uniform thickness part with a small diameter ( (See Figure 11). As a result, as shown in FIG. 12, it was found that the amount of remaining gate bending was reduced and the occurrence rate could be significantly improved. Furthermore, it was found that the resin shaping properties such as resin voids and unfilled areas were improved, and that the same thickness portions with small diameters did not occur as in the conventional method.

【0018】図12は縦軸にゲートに発生した等厚部の
長さ、横軸に発生個数を従来例と本願に別けて示したも
ので、従来ではn=1000で236個に対して後者で
のゲート折れ残り量はn=1000で僅か21個に過ぎ
ず非常に顕著な改善が見られた。前記実施例ではゲート
と流路先端で形成する傾斜面の角度が40°の場合しか
示されていないが、90°以内であればよいことは言う
までもないことを付記しておく。
FIG. 12 shows the length of the uniform thickness portion generated in the gate on the vertical axis, and the number of generated portions on the horizontal axis for the conventional example and the present application. The amount of unbroken gates was only 21 at n=1000, which was a very significant improvement. In the above embodiment, only the case where the angle of the slope formed by the gate and the end of the flow path is 40 degrees is shown, but it should be noted that it goes without saying that the angle may be within 90 degrees.

【0019】[0019]

【発明の効果】本発明方法によると、■樹脂巣と未充填
発生率が従来の1000ppmから500ppmもと1
/2化に、■ゲート折れ残り発生率が23%から2%と
1/10化に、■ゲート折れ残り量(長さ)最大値0.
25mmmから0.13mmと約1/2化に大幅な向上
が達成された。
Effects of the Invention: According to the method of the present invention, the rate of occurrence of resin cavities and unfilling has been reduced from the conventional 1000 ppm to 500 ppm1.
/2, ■ The rate of occurrence of unbroken gates was reduced from 23% to 2% to 1/10, ■ The maximum amount of unbent gates (length) was 0.
A significant improvement was achieved, from 25 mm to 0.13 mm, about 1/2.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】  樹脂封止型半導体素子の斜視図である。FIG. 1 is a perspective view of a resin-sealed semiconductor element.

【図2】  従来の外囲器とゲート部の分離前の状態を
、図1をY−Y’線で切断して示した断面図である。
FIG. 2 is a cross-sectional view of FIG. 1 taken along line Y-Y', showing a state before separation of a conventional envelope and a gate portion.

【図3】  従来の外囲器をゲートのある面から見た先
端部を分離した後の側面図である。
FIG. 3 is a side view of a conventional envelope after the tip is separated, as seen from the side where the gate is located.

【図4】従来の外囲器とゲート部の分離前の状態を、図
1をY−Y’線で切断して示した断面図である。
FIG. 4 is a cross-sectional view of FIG. 1 taken along the line Y-Y', showing a state before separation of the conventional envelope and gate portion.

【図5】  従来の外囲器からゲート部を分離後の状態
を、図1をY−Y’線で切断して示した側面図である。
FIG. 5 is a side view of FIG. 1 taken along the line Y-Y' and showing the state after the gate part is separated from the conventional envelope.

【図6】  本発明を施した外囲器とゲート部の分離前
の状態を、Y−Y’線で切断して示した断面図である。
FIG. 6 is a cross-sectional view taken along the line Y-Y', showing the state of the envelope and gate portion according to the present invention before they are separated.

【図7】  本発明に係わる外囲器とゲート部の分離後
の状態を、Y−Y’線で切断して示した断面図である。
FIG. 7 is a cross-sectional view taken along the line YY' and showing the state after separation of the envelope and gate portion according to the present invention.

【図8】  図8aは流路と封止樹脂層が直線状に形成
されていない状態を示す断面図である。図8bは流路と
封止樹脂層が直線状に形成されていない状態を示す上面
図である。
FIG. 8a is a cross-sectional view showing a state in which the flow path and the sealing resin layer are not formed in a straight line. FIG. 8b is a top view showing a state in which the flow path and the sealing resin layer are not formed in a straight line.

【図9】  樹脂成型金型構成部品のゲート及び流路の
部分的断面図である。
FIG. 9 is a partial cross-sectional view of the gate and flow path of the resin mold component.

【図10】  従来と本発明に係わる樹脂成型金型のゲ
ート部を対照的に示した断面図である。
FIG. 10 is a sectional view showing a gate part of a conventional resin molding die and a gate part of a resin molding die according to the present invention in contrast.

【図11】  従来と本発明に係わる樹脂成型金型のゲ
ート部を対照的に示した断面図である。
FIG. 11 is a sectional view showing a gate part of a conventional resin molding die and a gate part of a resin molding die according to the present invention in contrast.

【図12】  ゲート折れ残り量の長さを従来と本発明
と示した図である。
FIG. 12 is a diagram showing the length of the remaining amount of gate bending in the conventional method and in the present invention.

【符号の説明】[Explanation of symbols]

1、10:封止樹脂 2、3:リード端子 4、12、12’:ゲート 5、11:流路 6:径小な等厚部 6’、13:傾斜面 14:リードフレーム 15、15’:キャビティ部 16、16’:ガイド部 17、17’:サブランナー 18:インナーリード 1, 10: Sealing resin 2, 3: Lead terminal 4, 12, 12': Gate 5, 11: Channel 6: Equal thickness part with small diameter 6', 13: Inclined surface 14: Lead frame 15, 15': Cavity part 16, 16': Guide part 17, 17': Sub runner 18: Inner lead

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】  一対の金型と、この一方に形成し被樹
脂封止半導体素子を配置するキャビティと、前記キャビ
ティに対応して設置し封入樹脂を流入するゲート部と、
前記ゲート部に接触して配置する封入樹脂流路を具備し
、両者の接触部分における封入樹脂厚を向上することに
より封入樹脂層を残る樹脂異形物の大きさを極小とする
ことを特徴とする半導体素子樹脂封止用金型。
1. A pair of molds, a cavity formed in one of the molds and in which a resin-sealed semiconductor element is disposed, and a gate part installed corresponding to the cavity and into which the encapsulating resin flows.
It is characterized by comprising an encapsulating resin flow path disposed in contact with the gate portion, and by increasing the thickness of the encapsulating resin at the contact portion between the two, the size of resin irregularities remaining in the encapsulating resin layer is minimized. Mold for resin encapsulation of semiconductor elements.
JP2942791A 1991-01-30 1991-01-30 Metal mold for semiconductor element resin sealing use Pending JPH04245447A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2942791A JPH04245447A (en) 1991-01-30 1991-01-30 Metal mold for semiconductor element resin sealing use

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2942791A JPH04245447A (en) 1991-01-30 1991-01-30 Metal mold for semiconductor element resin sealing use

Publications (1)

Publication Number Publication Date
JPH04245447A true JPH04245447A (en) 1992-09-02

Family

ID=12275841

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2942791A Pending JPH04245447A (en) 1991-01-30 1991-01-30 Metal mold for semiconductor element resin sealing use

Country Status (1)

Country Link
JP (1) JPH04245447A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0936157A (en) * 1995-07-25 1997-02-07 Samsung Electron Co Ltd Molding device for semiconductor package and molding method
JP2011104873A (en) * 2009-11-18 2011-06-02 Apic Yamada Corp Mold

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0936157A (en) * 1995-07-25 1997-02-07 Samsung Electron Co Ltd Molding device for semiconductor package and molding method
JP2011104873A (en) * 2009-11-18 2011-06-02 Apic Yamada Corp Mold

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