JPH04242430A - Operation program incorporated device - Google Patents

Operation program incorporated device

Info

Publication number
JPH04242430A
JPH04242430A JP1579891A JP1579891A JPH04242430A JP H04242430 A JPH04242430 A JP H04242430A JP 1579891 A JP1579891 A JP 1579891A JP 1579891 A JP1579891 A JP 1579891A JP H04242430 A JPH04242430 A JP H04242430A
Authority
JP
Japan
Prior art keywords
module
rom
program
address
operation program
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1579891A
Other languages
Japanese (ja)
Inventor
Taiji Asakawa
浅川 ▲泰▼司
Kenji Tokunaga
徳永 賢治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Computertechno Ltd
Original Assignee
NEC Computertechno Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Computertechno Ltd filed Critical NEC Computertechno Ltd
Priority to JP1579891A priority Critical patent/JPH04242430A/en
Publication of JPH04242430A publication Critical patent/JPH04242430A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To alter an operation program which has a bug without replacing a whole ROM having the bug by setting addresses) indicating the entrances of respective modules in the ROM, in a control table in a RAM. CONSTITUTION:The operation consisting of plural modules is stored in the ROM 2 for the operation program. A module after debugging among the modules of the program is prepared in a correction ROM and inserted into an IC receptacle 4. An address for module access can be stored in the module control table 5 since one program in the operation program calls the corrected module. When the module for operation having the bus is replaced with the corrected module, an address for accessing this corrected module is stored in the module control table 5 and the address of the old module is altered. The addresses in the table 5 are changed and the corrected ROM is only added for the debugging.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【技術分野】本発明は動作プログラムを読出専用記憶に
内蔵する装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a device that stores an operating program in a read-only memory.

【0002】0002

【従来技術】従来の動作プログラムを読出専用記憶(以
下ROM)に内蔵した装置は、このROMの他、プログ
ラム実行用のプロセッサ、ランダムアクセスメモリ(以
下RAM)及び周辺回路を備えている。
2. Description of the Related Art A conventional device in which an operating program is stored in a read-only memory (hereinafter referred to as ROM) includes, in addition to the ROM, a processor for executing the program, a random access memory (hereinafter referred to as RAM), and peripheral circuits.

【0003】従来のこのような装置ではモジュール管理
が不十分である。このため、あるモジュールでバグが発
生した場合、どんなに小さなモジュールであってもRO
M全体を交換しなければならないという欠点がある。ま
た、バグ修正においても、特定モジュールのみのデバッ
グにとどまらず、全プログラムに渡るデバッグが必要に
なるという欠点がある。
[0003] In such conventional devices, module management is insufficient. Therefore, if a bug occurs in a module, no matter how small the module is, the RO
The disadvantage is that the entire M must be replaced. Another disadvantage is that bug fixing requires debugging not only a specific module but also the entire program.

【0004】0004

【発明の目的】本発明の目的は、バグのある動作プログ
ラムを格納したROM全体を交換する必要がなく、バグ
の動作プログラムを変更できるようにした動作プログラ
ム内蔵装置を提供することである。
OBJECTS OF THE INVENTION An object of the present invention is to provide a device with a built-in operating program that allows a buggy operating program to be changed without having to replace the entire ROM that stores the buggy operating program.

【0005】[0005]

【発明の構成】本発明の装置は、複数のモジュールから
なる動作プログラムを記憶する動作プログラム記憶手段
と、この動作プログラム記憶手段内の各モジュールをア
クセスするためのアドレスを格納し、該アドレスの修正
ができるモジュール管理テーブル手段と、このモジュー
ル管理テーブル手段からの修正アドレスにより特定され
るバグ修正ずみのモジュールを記憶する修正用読出専用
記憶手段とを含むことを特徴とする。
SUMMARY OF THE INVENTION The apparatus of the present invention includes an operation program storage means for storing an operation program consisting of a plurality of modules, an address for accessing each module in the operation program storage means, and a modification of the address. The present invention is characterized in that it includes a module management table means capable of performing the following: and a correction read-only storage means for storing a bug-corrected module specified by a correction address from the module management table means.

【0006】[0006]

【実施例】次に本発明の一実施例について図面を参照し
て詳細に説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, an embodiment of the present invention will be described in detail with reference to the drawings.

【0007】図1を参照すると、本発明の一実施例は、
中央処理装置(以下CPU)1を備えている。このCP
U1はアドレスバス6及びデータバス7に接続されてい
る。これらバス6及び7は、動作プログラム用ROM2
、修正用ROMのためのICソケット4及びモジュール
管理テーブル5を含むRAM3にそれぞれ接続されてい
る。ROM2には、動作プログラムが格納されている。 ICソケット4にはバグ発生時修正用のROMが挿入さ
れる。本発明の一実施例の特徴の1つであるモジュール
管理テーブル5にはROM2内の各モジュールの入口を
示すアドレスが設定されている。
Referring to FIG. 1, one embodiment of the present invention includes:
A central processing unit (hereinafter referred to as CPU) 1 is provided. This CP
U1 is connected to address bus 6 and data bus 7. These buses 6 and 7 are connected to the operating program ROM 2.
, an IC socket 4 for a modification ROM, and a RAM 3 containing a module management table 5, respectively. The ROM 2 stores operating programs. A ROM for correcting bugs when they occur is inserted into the IC socket 4. In the module management table 5, which is one of the features of the embodiment of the present invention, addresses indicating the entrance of each module in the ROM 2 are set.

【0008】また、本発明の一実施例の特徴の他の1つ
であるROM2内のプログラム構造は以下の通りである
。すなわち、プログラム内で他のモジュールを使用した
い場合、管理テーブル5の参照によりモジュールのアド
レスが特定され、そのモジュールが呼び出される。
The program structure in the ROM 2, which is another feature of an embodiment of the present invention, is as follows. That is, when it is desired to use another module within a program, the address of the module is specified by referring to the management table 5, and that module is called.

【0009】図2を参照すると、図1に示される一実施
例におけるRAM3に格納されたモジュール管理テーブ
ル5には、動作プログラム用ROM2に記憶されたモジ
ュール0,1,……,nに対する入口を示すアドレスが
それぞれ記憶されている。いまモジュール1にバグがみ
つかり、このバグを修正するための修正用ROMがIC
ソケット4に挿入される。この場合、修正用ROMには
新モジュール1が格納されているため、RAM3のモジ
ュール管理テーブル5には新モジュール1の入口を示す
アドレスが旧モジュール1の入口を示すアドレスの上に
重書きされる。
Referring to FIG. 2, the module management table 5 stored in the RAM 3 in the embodiment shown in FIG. The indicated addresses are stored respectively. A bug has now been found in module 1, and the correction ROM to fix this bug is an IC.
It is inserted into socket 4. In this case, since the new module 1 is stored in the modification ROM, the address indicating the entrance of the new module 1 is overwritten on the address indicating the entrance of the old module 1 in the module management table 5 of the RAM 3. .

【0010】この結果、動作プログラムの構成要素の1
つであるモジュール0がモジュール管理テーブル5の新
モジュール1のアドレスを索引することにより、バグの
修正された新モジュール1を呼出すことができる。
As a result, one of the constituent elements of the operating program
By indexing the address of the new module 1 in the module management table 5, the module 0 that is the module 0 can call the new module 1 in which the bug has been corrected.

【0011】[0011]

【発明の効果】本発明は、ROM2内の各モジュールの
入口を示すアドレスをRAM3の内の管理テーブル5に
設定することにより、テーブル5内のアドレスを変更し
バグ修正ずみモジュールを記憶したROMを追加するだ
けでバグのある動作プログラムを変更できるという効果
がある。
[Effects of the Invention] The present invention sets the address indicating the entrance of each module in the ROM 2 in the management table 5 in the RAM 3, thereby changing the address in the table 5 and storing the bug-corrected module in the ROM. The effect is that a program with a bug can be changed simply by adding it.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】本発明の一実施例の構成を示す図である。FIG. 1 is a diagram showing the configuration of an embodiment of the present invention.

【図2】図1のROM2内のモジュールと管理テーブル
5内のアドレスとの関係を示す図である。
FIG. 2 is a diagram showing the relationship between modules in the ROM 2 and addresses in the management table 5 in FIG. 1;

【図3】図1の修正用ROM内のモジュールと管理テー
ブル5内のアドレスとの関係を示す図である。
3 is a diagram showing the relationship between modules in the correction ROM in FIG. 1 and addresses in the management table 5. FIG.

【符号の説明】[Explanation of symbols]

1  CPU 2  動作プログラム用ROM 3  RAM 4  ICソケット 5  モジュール管理テーブル 6  アドレスバス 7  データバス 1 CPU 2 ROM for operation program 3 RAM 4 IC socket 5 Module management table 6 Address bus 7 Data bus

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】  複数のモジュールからなる動作プログ
ラムを記憶する動作プログラム記憶手段と、この動作プ
ログラム記憶手段内の各モジュールをアクセスするため
のアドレスを格納し、該アドレスの修正ができるモジュ
ール管理テーブル手段と、このモジュール管理テーブル
手段からの修正アドレスにより特定されるバグ修正ずみ
のモジュールを記憶する修正用読出専用記憶手段とを含
むことを特徴とする動作プログラム内蔵装置。
1. Operation program storage means for storing an operation program consisting of a plurality of modules, and module management table means for storing addresses for accessing each module in the operation program storage means and capable of modifying the addresses. and correction read-only storage means for storing a bug-corrected module specified by the correction address from the module management table means.
JP1579891A 1991-01-16 1991-01-16 Operation program incorporated device Pending JPH04242430A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1579891A JPH04242430A (en) 1991-01-16 1991-01-16 Operation program incorporated device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1579891A JPH04242430A (en) 1991-01-16 1991-01-16 Operation program incorporated device

Publications (1)

Publication Number Publication Date
JPH04242430A true JPH04242430A (en) 1992-08-31

Family

ID=11898863

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1579891A Pending JPH04242430A (en) 1991-01-16 1991-01-16 Operation program incorporated device

Country Status (1)

Country Link
JP (1) JPH04242430A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998024021A1 (en) * 1996-11-29 1998-06-04 Hitachi, Ltd. Microcomputer control system

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0268624A (en) * 1988-09-02 1990-03-08 Nec Corp Program correcting circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0268624A (en) * 1988-09-02 1990-03-08 Nec Corp Program correcting circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998024021A1 (en) * 1996-11-29 1998-06-04 Hitachi, Ltd. Microcomputer control system
US6496978B1 (en) * 1996-11-29 2002-12-17 Hitachi, Ltd. Microcomputer control system in which programs can be modified from outside of the system and newer versions of the modified programs are determined and executed
US7174537B2 (en) 1996-11-29 2007-02-06 Hitachi, Ltd. Microcomputer control system in which programs can be modified and newer versions of the modified programs being detected and executed

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