JPH0423463A - Amorphous semiconductor memory - Google Patents

Abstract

PURPOSE:To attain a large capacity by providing second and first thin-film metal electrodes in the directions intersecting perpendicularly each other on the upper and lower sides of an amorphous semiconductor part of an extremely thin film formed of first and second amorphous semiconductor layers, respectively. CONSTITUTION:A plurality of first parallel thin-film metal electrodes 2 are formed on an insulative substrate 1 and a first amorphous semiconductor layer 3 is formed on the first thin-film metal electrodes 2. A second amorphous semiconductor layer 4 is formed on the first amorphous semiconductor layer 3 and a plurality of second thin-film metal electrodes 5 are formed on the second amorphous semiconductor layer 4, in the direction of intersecting the first thin- film metal electrodes 2 perpendicularly substantially. Then at least one Schottky barrier diode is formed in the direction perpendicular to the plane of these semiconductor layers, so as to obtain an element as a unit memory element. By putting the first and second thin-film metal electrodes 2 and 5 on the opposite surfaces of the amorphous semiconductor parts 3 and 4 in a matrix, according to this constitution, a large-capacity memory can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION (A) Industrial Application Field The present invention relates to an amorphous semiconductor memory, and more specifically, it is composed of a matrix metal electrode and two amorphous semiconductor layers sandwiched between the electrodes, and includes at least one amorphous semiconductor layer. This relates to an amorphous semiconductor memory in which a Schottky barrier diode is formed from a pair of electrodes and a semiconductor layer, which enables simple and large-capacity b.(b) Prior art As large-capacity memories, ROM-related IC memories using Si single crystal substrates, or storage systems using magnetic disks, magneto-optical disks, CDs, etc., are used. The above-mentioned non-volatile memory is used as external memory for computers and related devices, but as technology advances in the computer field, various types of memory are being used depending on the purpose of use.

(c) Problems to be Solved by the Invention External memory for computers often requires a large-capacity storage device, and when using an IC memory made from a Si single-crystal substrate, it is extremely expensive. , its uses are limited.

Currently, magnetic disks are the main type of external memory commonly used for computers, but magneto-optical disks, CDs, and the like are being used to increase capacity. However, when using an external memory that uses these disks, it is necessary to rotate the disk, so a dedicated playback device is required to perform mechanical rotation and drive the read head. Because of the mechanical mechanism, its operating speed is considerably slower than that of IC memory, which poses problems such as lowering the utilization efficiency of computers and related devices. An object of the present invention is to solve the problems of conventional memories used for external storage, etc., and to provide an external memory that can easily be increased in capacity and driven at high speed.

(d) Means and operation for solving the problem This invention includes:
A plurality of parallel first thin film metal electrodes formed on a substrate whose surface is at least insulating, a first amorphous semiconductor layer formed on the first thin film metal electrodes, and a first amorphous semiconductor layer formed on the first thin film metal electrodes; a second amorphous semiconductor layer formed on the crystalline semiconductor layer; and a plurality of thin film metal electrodes formed on the second amorphous semiconductor layer in a direction substantially perpendicular to the first thin film metal electrode formed on the second amorphous semiconductor layer. two thin film metal electrodes, at least one Schottky barrier diode is formed between the first and second thin film metal electrodes facing each other with the first and second amorphous semiconductor layers interposed therebetween; Writing by applying a voltage that destroys the Noyotky barrier diode to a selected intersection of the opposed first and second thin film metal electrodes, and reading by applying a voltage to the intersection that does not destroy the Noyotky barrier diode. This is an amorphous semiconductor memory characterized by:

That is, the present invention provides second and first thin film metal electrodes that are disposed in mutually perpendicular directions on the upper and lower surfaces of an ultrathin amorphous semiconductor portion made up of first and second amorphous semiconductor layers, respectively. The first . 7 of the second thin film metal electrode
This is Otsu's attempt to obtain a large amount of memory by converting it into a Torinotas.

In this invention, the combination of the first and second amorphous semiconductor layers includes: (1) For example, as shown in FIG. 1, an n-type layer of hydrogenated amorphous silicone (a-3i:11) (11) A combination of a p-type layer to which a minimal amount of boron B is added and a type layer, (iii) a combination of I)-type layer and a small amount of phosphorus P. did n
- List the combinations of type layers. (iv) In place of the n-type layer of a-Si:H in (i) above, a p-type layer of aSi; It is better to use shinobu with added.

Regarding the layer thickness of the first and second amorphous semiconductor layers (thickness in the stacking direction at the time of layer formation), the n-type of the first amorphous semiconductor layer (1) located on the substrate side Layer 3 layer [d
, [Refer to Figure 1, the thickness of the p-type layer in (iiXiii) or the p-type layer in (1v) is preferably several hundreds\01j or more preferably around several tens, and specifically, = lO~100
preferably 60 to 80 people, more preferably 70 people
It is more preferable to set it to a person.

Regarding the layer thickness of the second amorphous semiconductor layer formed on the first amorphous semiconductor layer, the layer thickness d2 of the n-type layer 4 in (i) [see Figure 1] and (iiXiii The n-type layer of ) or the 1-type layer of (Iν) is preferably +oooA or less,
Furthermore, 600~1()[)0. Preferably 800
It is more preferable to set it to a person.

In this invention, the first thin film metal electrode located between the substrate and the first amorphous semiconductor layer is made of (
iXii) and (iii) a-5i: H n-type layer, a-3i; H p-type layer, (iv) a-3i; H
A metal that can form a Schottky barrier by contact with the p-type layer of a-3i: Mg is preferable for the - type layer and the p-type layer.As shown in Fig. 1, an Al electrode that does not form a barrier between the first amorphous semiconductor layer and the first amorphous semiconductor layer is used as the first thin film metal electrode. In this case, it is necessary to form a Linyotsky barrier by contacting the second thin film metal electrode and the second amorphous semiconductor layer, as will be described below.

In this invention, the second thin film metal electrode may be made of a type 1 layer of (iXii) a-3i;H or (ii
a-3i of i); metals that can form a novel barrier by contact with the n-type layer of H are preferred, such as Pd, Au,
Preferred metals include Pt. Further, a Mushottky barrier can be obtained by contacting a metal such as Mg with the L-type layer of a-3i;

The thickness of the first and second thin film metal electrodes (thickness in the stacking direction of each electrode layer) is set to be thicker than that of the first thin film metal electrode. The thickness of the first thin film metal electrode is 800 to 1200. The thickness of the second thin film metal electrode is preferably from 400 to 600. For example, in case B shown in FIG. 1, the thickness of the first thin film metal electrode [Al electrode (
2)] The thickness should be set to about 1000 people, and the thickness should be set to about 500 people.

Also, 1st. In the second thin film metal electrode, the pitch l(, and I−+ 2 (one period of a plurality of electrode groups)) and the electrode widths W1 and W2 (see FIG. 1) are (+)[
(preferably 6,000 to 10,000 people, 8
000 people is more preferable.

(2) Regarding W, 3,000 to 5,000 people are preferable, and 4,000 people are more preferable.

(3) Regarding H2 - Preferably 6000 to too many people, more preferably 8000 people.

(Regarding Ow: 3000 to 5000 people is preferable, 4000 people is more preferable.

In this invention, the first and second amorphous semiconductor layers are
It can be created using well-known methods. That is, plasma CVD
It can be produced using a method such as a method, a photo-CVD method, or a sputtering method. The produced first and second amorphous semiconductor films have the advantage that their conductivity types can be easily controlled by adding impurities. For example, the above-mentioned hydrogenated amorphous semiconductor such as rcomi-3i:H. This amorphous semiconductor film can be formed at a temperature of about 200°C. Therefore, the substrate only needs to have a heat resistance of about 200° C., and since there is no problem with crystallinity, an inexpensive substrate can be used.

Moreover, in the present invention, a-Si +-tGex:tl and a
An amorphous semiconductor film such as -3it-xCxII can also be used.

As the substrate in this invention, it is desirable to use a highly rigid and insulating substrate such as glass, but depending on the application, a substrate with an insulating film formed on a metal substrate may also be used.

The unit memory element of the memory of the present invention has a simple structure of a Nyosotoky barrier diode consisting of an extremely thin amorphous semiconductor layer and a matrix of metal electrodes provided on both sides of the amorphous semiconductor layer. For example, in FIG. 1, the unit memory element denoted by 6 has its length T, WhE, and height K.
are 4000 to 4000A and 2370 people respectively. Therefore, compared to conventional rC memory, the area of
It is possible to form a large memory element and increase the capacity.

Furthermore, since the memory of the present invention can be driven using conventional IC memory methods, high-speed driving is possible.

Memory of the present invention: An element in which a non-crystalline barrier diode is formed in the direction perpendicular to the film surface by an amorphous semiconductor part consisting of two amorphous semiconductor thin film layers and metal electrodes sandwiching this from both sides is used as a unit memory element. By forming the metal electrodes on both sides into a plurality of electrodes orthogonal to each other, it is possible to easily form a large-capacity memory by forming a matrix.

Writing to the memory described above may be performed by applying a reverse bias voltage from electrodes on both sides of the matrix at an intersection point selected from the matrix to destroy the characteristic of the barrier diode. A unit memory element to which such a reverse bias voltage is applied becomes almost short-circuited.

Reading from the recorded memory is performed by scanning by applying an inverse pressure that destroys the barrier barrier, and detects whether the current value is 3 (r; The above method of applying a forward bias voltage for readout is possible, but there are advantages to applying a reverse bias voltage or increasing the contrast of readout current values corresponding to the presence or absence of diode breakdown. .

As can be seen from the above explanation, the memory of the present invention can be written relatively easily and can be programmed/readed only once.
Only memory (FROM).

(e) Examples The present invention will be explained in detail below.

First Embodiment FIG. 1 is a perspective view schematically showing a first embodiment, which is the basic configuration of the present invention.

In FIG. 1, about 1000 AQ thin films are formed by sputtering on a glass insulating substrate I, and then a plurality of electrodes 2 arranged in parallel at a pitch of 1 μm or less are formed by photo-etching. Hydrogenated amorphous silicon (a-3
After sequentially laminating an n-type layer 3 and a type layer 4 of i:H), and further forming about 500 Pd thin films by electron beam evaporation, electrodes 2 are formed with a pitch of 1 um or less by photolithography.
A plurality of electrodes 5 are formed parallel to the direction perpendicular to the direction.

The 1-type layer 4 of aSl·I and the electrode 5 form a Schottky barrier, while the n-type layer 3 of a-3i:H and the electrode 2 do not form a Schottky barrier.

Note that the stacking order may be reversed to that in FIG. 1, with a Pd thin film, an a-3i:H(1') i-type layer, an a-5i:11 n-type layer, and an Aρ thin film on the glass substrate.

In addition, the n-type layer 3 has a high resistance and is made into a thin film in order to prevent crosstalk, which is lateral current leakage when a memory is configured.
It is desirable that the film thickness be approximately 0.000 mm or less. Also,
In order to prevent the above-mentioned crosstalk, the distance between the AQ electrodes must be approximately several thousand.

In FIG. 1, in order to explain the present invention in detail, the shape is expanded in the film thickness direction, but in reality, the spacing between the AQ electrodes or the Pd electrodes is larger than the film thickness of the amorphous semiconductor layer. .

In the above configuration, the hatched portions indicated by reference numeral 6, which are the intersections of the electrodes 2 and 5, are unit memory elements.

Note that as the substrate, in addition to the glass substrate used in the above embodiments, a ceramic substrate, a metal substrate with an insulating film formed on the surface, etc. can be used.

In addition to Pd, the electrodes forming the Schottky barrier include Au,
Pt or the like can be used.

Furthermore, the band gap can be controlled by forming the amorphous semiconductor layer by mixing not only Si but also germanium (Ge), carbon (C), or the like.

AQ electrodes and Pd electrodes do not degrade memory performance due to accuracy such as linearity or line width, other than keeping the spacing above a certain level, and are easier to manufacture than conventional IC memory. There is.

In this way, this example has an example of a Schottky barrier, and it is possible to create an element that acts as a blocking barrier for holes and electrons, and it can be used as a memory element that utilizes element destruction due to the application of a bias voltage. be able to. Since this element uses a p-type layer and an n-type layer, crosstalk can be reduced.

FIG. 2 shows an outline of the plasma CVD apparatus used for producing the hydrogenated amorphous silicon layer shown in FIG.

7 is a preparation room, 8 is an n-type layer production room, 9 is an i-type layer production room,
IO is a p-type layer production chamber, and 11 is an extraction chamber. A partition valve 12 is provided between these chambers to pass the substrate 14 through each chamber to form a predetermined amorphous semiconductor film and transfer it to another chamber, and to maintain a constant gas composition in each deposition chamber. Used to maintain Each film-forming chamber has gas sources 15 to 19.
CH gas, SiH4 gas, 82H gas, H2 gas, and PH3 gas were controlled and sent through pipes and valves as gas sources shown in , and the gas composition in each chamber was set as shown in Table 1 to form a film. did.

Table 1 In this example, the substrate 14 is
An RF electric field was applied from an RF power source of 2° between the electrode 13 and the cathode electrode 13, and the gas therebetween was plasma decomposed, thereby forming an n-type layer and an i-type layer on the substrate.

Next, the operation of the memory configured as shown in FIG. 1 will be explained. Applying a reverse bias of about IOV to the Noyotki barrier diode formed at the intersection 6 of the selected electrodes 2 and 5,
Writing a signal means destroying the diode characteristics and creating a short circuit. Programming of the memory is completed by this arrangement of the write diode and a normal diode that does not write. For reading, scanning is performed by sequentially applying a reverse bias voltage of about 1 V to each unit element 6, and it is detected that no current flows in the normal diode part, but current flows in the written part, and it is synchronized with the timing signal. and output it.

As described above, when the pitch of the opposing electrodes is set to about 1 μm or less, it is possible to form an amorphous semiconductor layer on an area of several cm square, thereby making it possible to form a memory with extremely large capacity.

Although not shown in this embodiment, peripheral circuits for scanning the voltage applied to the memory section and detecting signals are provided on the same substrate as the amorphous semiconductor memory, as in conventional IC memory. By using an amorphous film or a polycrystalline S1 film, it is possible to reduce the number of external connection terminals from the memory element, thereby avoiding the problem of connecting all electrodes by bonding, etc. It has the advantage of being easy to put into practical use.

Next, an example in which the structure of the amorphous semiconductor memory of the present invention is improved will be described.

Second Embodiment FIG. 3 is a plan view showing a second embodiment of the present invention. The structure of this embodiment is such that the memories of the first embodiment are stacked in two layers, thereby making the memory capacity per unit area higher than that of the first embodiment.

In the configuration of this embodiment, a plurality of parallel electrodes 21 are formed on an insulating substrate similarly to the first embodiment.

Subsequently, a Schottky barrier diode is constructed by forming an n-type layer and an i-type layer of a-Si:F according to the method and film thickness of the first embodiment, and a plurality of electrodes 22 parallel to the direction orthogonal to the electrode 21. do. Further, on the electrode 22, a-
3i:H i-type layer, n-type layer, and a plurality of electrodes 23 parallel to the direction orthogonal to the electrode 22 are formed to constitute a Schottky barrier diode.

In the second embodiment with the above configuration, if electrodes 21 and 22 are selected, the diode layer on the substrate side is used as a memory, and if electrodes 22 and 23 are selected, the second diode layer is used as a memory. Will be using it. Since the above two diode layers can be used independently, the storage capacity per unit area is doubled.

As explained above, the amorphous semiconductor memory of the present invention has a simple structure and can be formed extremely thin, so that the memory capacity can be further increased by stacking several diode layers.

Is it possible to uniformly form the amorphous semiconductor thin film of the present invention over a large area? Since the access time becomes long when forming a large area memory, methods such as dividing it into blocks as appropriate to shorten the access time may be used. You can do it.

(F) Effects of the Invention The present invention provides a memory unit element that can be extremely simple and miniaturized by using an amorphous semiconductor thin film and a thin metal electrode that can be formed uniformly over a large area and whose conductivity type can be controlled by impurities. Since it can be formed, there is an effect that a large-capacity FROM can be easily manufactured.

[Brief explanation of the drawing]

FIG. 1 is a perspective view showing the configuration of a first embodiment of the amorphous semiconductor memory of the present invention, FIG. 2 is a diagram schematically showing the plasma CVD film forming apparatus in the above embodiment, and FIG. FIG. 7 is a plan view for explaining a second embodiment of the invention. l 3... 4 6... Substrate, 2, 21.23... N-type amorphous silicone layer,... I-type amorphous silicone layer, 22... Pd electrode , ・Unit memory element.・・A electrode,

Claims (1)

[Claims] 1. A plurality of parallel first thin film metal electrodes formed on a substrate whose surface is at least insulating, a first amorphous semiconductor layer formed on the first thin film metal electrodes, and a first amorphous semiconductor layer formed on the first thin film metal electrodes; a second amorphous semiconductor layer formed on the amorphous semiconductor layer;
a plurality of second thin film metal electrodes formed in a direction substantially perpendicular to the first thin film metal electrode formed on the amorphous semiconductor layer of the first and second amorphous semiconductor layers; at least one Schottky barrier diode is formed between the first and second thin film metal electrodes facing each other with a layer in between;
Writing by applying a voltage that destroys the Schottky barrier diode to a selected intersection of the opposing first and second thin film metal electrodes, and reading by applying a voltage that does not destroy the Schottky barrier diode to the intersection. An amorphous semiconductor memory characterized by: