JPH0423416B2 - - Google Patents

Info

Publication number
JPH0423416B2
JPH0423416B2 JP56088394A JP8839481A JPH0423416B2 JP H0423416 B2 JPH0423416 B2 JP H0423416B2 JP 56088394 A JP56088394 A JP 56088394A JP 8839481 A JP8839481 A JP 8839481A JP H0423416 B2 JPH0423416 B2 JP H0423416B2
Authority
JP
Japan
Prior art keywords
etching
semiconductor substrate
thin film
etched
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP56088394A
Other languages
English (en)
Japanese (ja)
Other versions
JPS57202734A (en
Inventor
Juro Yasui
Hideaki Shimoda
Juichi Edamatsu
Masaru Sasako
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP8839481A priority Critical patent/JPS57202734A/ja
Publication of JPS57202734A publication Critical patent/JPS57202734A/ja
Publication of JPH0423416B2 publication Critical patent/JPH0423416B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)
JP8839481A 1981-06-09 1981-06-09 Method and device for manufacturing of semiconductor Granted JPS57202734A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8839481A JPS57202734A (en) 1981-06-09 1981-06-09 Method and device for manufacturing of semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8839481A JPS57202734A (en) 1981-06-09 1981-06-09 Method and device for manufacturing of semiconductor

Publications (2)

Publication Number Publication Date
JPS57202734A JPS57202734A (en) 1982-12-11
JPH0423416B2 true JPH0423416B2 (de) 1992-04-22

Family

ID=13941574

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8839481A Granted JPS57202734A (en) 1981-06-09 1981-06-09 Method and device for manufacturing of semiconductor

Country Status (1)

Country Link
JP (1) JPS57202734A (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6030887A (en) * 1998-02-26 2000-02-29 Memc Electronic Materials, Inc. Flattening process for epitaxial semiconductor wafers
WO1998044549A1 (en) * 1997-04-03 1998-10-08 Memc Electronic Materials, Inc. Flattening process for epitaxial semiconductor wafers
US6200908B1 (en) 1999-08-04 2001-03-13 Memc Electronic Materials, Inc. Process for reducing waviness in semiconductor wafers
JP2005209809A (ja) * 2004-01-21 2005-08-04 Murata Mfg Co Ltd エッチング装置およびこれを用いたエッチング方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5179650A (ja) * 1975-01-08 1976-07-12 Hitachi Ltd Supatsutaetsuchingusochi
JPS557646U (de) * 1978-06-29 1980-01-18

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5179650A (ja) * 1975-01-08 1976-07-12 Hitachi Ltd Supatsutaetsuchingusochi
JPS557646U (de) * 1978-06-29 1980-01-18

Also Published As

Publication number Publication date
JPS57202734A (en) 1982-12-11

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