JPH04226080A - Manufacture of thin film transistor - Google Patents

Abstract

PURPOSE:To form an insulator provided on the side wall of a semiconductor layer with ease and reproducibility in a manufacture of a thin film transistor of successive deposits a semiconductor layer and a gate insulating layer without exposure to atmospheric air. CONSTITUTION:After a laminated film of a semiconductor layer 3, a gate insulating film 4, and a lower layer gate electrode 5a on a first insulator 2 is processed into an island patterned, the whole substrate is filmed with a second insulator, which is then anisotropically etched, thereby making an insulator 6 remain only on the side wall of the island pattern. A selective etching is made by utilizing the etching selection ratio of the second insulator and the lower layer gate electrode 5a. Making the first and second insulators of different materials allows the etching time to be controlled by observing variation in plasma spectral characteristics during anisotropic etching.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a thin film transistor that can be manufactured by a low-temperature process and can be used for display devices, image sensors, etc.

0002

[Prior Art] Thin film transistors used to drive liquid crystal display devices, image sensors, etc. are conventional ICs.
It was made by a process. In conventional IC processes, it is necessary to convert liquid crystals, form insulating films, and activate impurities at high temperatures close to 1000°C, and when a translucent substrate is required, the substrate material is limited to a quartz substrate, resulting in a large area. was difficult. In recent years, methods of lowering the process temperature have been proposed,
Methods are being considered that use an amorphous or polycrystalline film as a starting material and crystallize it by low-temperature solid phase growth, laser annealing, or the like.

By the way, since thin film transistors are generally field effect transistors, their characteristics are greatly influenced by the state of the interface between the gate insulating layer and the semiconductor layer. For this reason, in conventional high-temperature processes, the interface between the gate insulating layer and the semiconductor layer is created inside the semiconductor layer using a thermal oxidation method to maintain a good interface state. On the other hand, in a low-temperature process, the gate insulating layer must also be formed at a low temperature, so the above thermal oxidation method cannot be used. Therefore, after processing the semiconductor film into a predetermined shape, the surface is cleaned using hydrofluoric acid or the like, and then a gate insulating film is formed using sputtering or CVD. However, the interface state density has not been sufficiently reduced. Therefore, a method has been proposed in which after forming a semiconductor film, a gate insulating film is continuously formed without exposing the semiconductor film to the atmosphere.

0004

[Problems to be Solved by the Invention] In order to improve the characteristics of thin film transistors by low-temperature processing, it is essential to improve the interface state between the semiconductor layer and the gate insulating layer. For this reason, it is ideal to form the gate insulating layer continuously after forming the semiconductor layer without exposing it to the atmosphere. However, in this method, when the gate insulating layer and the semiconductor layer are processed into a predetermined shape, the side walls of the semiconductor layer are exposed, so when the gate electrode is formed afterwards, the gate electrode and the exposed side wall of the semiconductor layer come into contact with each other. Leakage current will increase. Therefore, it is necessary to cover the sidewalls of the semiconductor layer with an insulator before forming the gate electrode, and it is necessary to have a structure as shown in FIG. 10. However, when a commonly used SiO2 film is used as the gate insulating layer 4, it is necessary that the insulating film 9 covering the sidewalls of the semiconductor layer 3 can be etched selectively with the SiO2 film. If the insulating film 9 covering the semiconductor sidewall is the same SiO2 film as the gate insulating film 4, or if S
If an i3N4 film or the like is used, the gate insulating film will also be etched at the same time unless the etching time is strictly controlled during etching. Usually, as an insulating film with etching selectivity with SiO2 film,
PSG in which SiO2 is doped with P is known, and it is said that the greater the amount of P doped, the higher the selectivity. However, if the side walls of the semiconductor layer are covered with PSG, there is a risk that P will diffuse from the PSG to the semiconductor layer side and adversely affect transistor characteristics.

[0005] Another method for forming an insulating film on the sidewalls of a pattern is to form an insulating film on the entire surface of the substrate and then perform anisotropic etching to leave the insulating film only on the stepped portions of the pattern. is sometimes taken, but
If the etching time during anisotropic etching cannot be controlled, the amount of remaining insulating film cannot be controlled. The easiest way to manage etching time is to calculate the etching time from the film thickness of the material based on data on the etching rate of the material to be etched, but the reproducibility of etching is not very good. It is difficult to control the amount left behind.

The present invention has been made in view of the above-mentioned problems, and includes a method for successively forming a semiconductor layer and a gate insulating film.After processing the semiconductor layer into a predetermined shape, the semiconductor layer, Another object of the present invention is to easily form an insulator on the side wall of a semiconductor layer with good reproducibility without adversely affecting a gate insulating film.

[0007]

[Means for Solving the Problems] In order to achieve the above object, the present invention forms a laminated film by sequentially forming a semiconductor layer, a gate insulating film, and a lower gate electrode thin film on a first insulator. After forming and processing into an island-like pattern, a second insulator is formed on the sidewalls of the island-like pattern, and then a thin film for the upper layer gate electrode is formed, and the thin films for the upper and lower gate electrodes are formed using the same resist pattern. It is characterized by being etched and used as a gate electrode. Furthermore, as a method of forming a second insulator on the sidewalls of the island pattern, a second insulator film is formed on the entire surface of the substrate, and then anisotropic etching is performed using dry etching using plasma to form the island pattern. The second insulating film is left only on the side walls of the second insulating film, and the second insulating film is etched using the etching selectivity between the second insulating film and the lower gate electrode thin film thereunder. . Furthermore, when the first insulator and the second insulator are made of different materials and the above-mentioned anisotropic etching is performed, the plasma spectral characteristics during etching of the second insulator film and the etching progress, The etching time is controlled by detecting the difference in plasma spectral characteristics when the first insulator is exposed.

[0008]

[Operation] As described above, in the present invention, by using the upper surface of the island pattern as a thin film for the lower layer gate electrode, it is possible to use the thin film for forming the gate electrode on the side wall of the island pattern. There is no need for selective etching of P, which may have an adverse effect on transistor characteristics.
There is no need to use an SG film.

Another method for forming an insulator on the side walls of an island pattern is to form an insulator film over the entire surface of the substrate and then perform anisotropic etching to leave the insulator film only on the side walls of the island pattern. This can be done by a simple method such as At this time, selective etching can be performed using the etching selectivity between the insulating film formed over the entire surface of the substrate and the lower layer gate electrode thin film therebelow. Furthermore, since the etching time can be controlled accurately by performing plasma spectroscopic analysis during etching, the shape of the insulator to be left on the sidewalls of the island pattern can always be stably produced.

0010

Embodiments Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 shows a plan view of a thin film transistor manufactured by the manufacturing method of the present invention, and FIGS. 2 to 8 are cross-sectional views showing the manufacturing process of the thin film transistor of the example. b) is AA' in Figure 1
A cross section and a BB' sectional view are shown. First, a SiN film 2 having a thickness of about 3000 angstroms is formed on the surface of a cleaned glass substrate 1 by sputtering or a plasma CVD apparatus. Next, amorphous S is deposited on the SiN film 2 using a plasma CVD device.
Form an i film. Film forming conditions are substrate temperature 400-600℃
SiH4 gas diluted with H2 is decomposed by heat and plasma to deposit approximately 1000 angstroms. Next, amorphous S
In order to polycrystallize the i film, annealing is performed at 600° C. for about 50 hours in a vacuum or in an inert gas atmosphere to form a polycrystalline Si film 3. Subsequently, a SiO2 film 4, which will become a gate insulating film, is formed to a thickness of about 1000 angstroms using a sputtering device. In the above steps, the glass substrate is moved from the plasma CVD apparatus to the annealing furnace and from the annealing furnace to the sputtering apparatus through a load lock chamber maintained in vacuum or in an inert gas atmosphere. Next, a polycrystalline Si film having a thickness of about 1000 angstroms, which will become the first gate electrode 5a, is formed using a low pressure CVD apparatus, resulting in the laminated film shown in FIG. S obtained as above
Each layer of the three layers on the iN film is etched using the same resist pattern to form an island-like pattern as shown in FIG. Each layer was etched using a reactive ion etcher, and anisotropic etching was performed so that the cross-sectional shape after etching was perpendicular to the substrate. In addition, polycrystalline Si
For etching, a mixed gas of SF6 and CCl4 is used.
CHF3 was used as an etching gas for O2 etching.

Next, as shown in FIG. 4, a SiO2 film 6 of about 5000 angstroms is formed over the entire surface of the substrate using a sputtering device or an atmospheric pressure CVD device. Thereafter, the SiO2 film 6 is anisotropically etched using a reactive ion etcher to leave the SiO2 film 6' only on the sidewalls of the island pattern, as shown in FIG. FIG. 9 shows the temporal change in the emission intensity from immediately after the start of etching for 388 nm, which is the spectrum of CN caused by the etching gas CHF3 and the SiN film 2, among the plasma emission spectra during reactive ion etching. The emission intensity increases rapidly at a certain point, and it can be determined that the SiN film 2 is exposed at that point. After confirming that the emission intensity has increased and stabilized at a certain level, the etching is finished and the SiO2 film 6' remains on the sidewalls of the island pattern.
The size of can always be formed stably. Furthermore, in order to stably leave the SiO2 film 6' on the sidewalls of the island pattern, etching is performed using the etching selectivity between the gate electrode 5a and the SiO2 film 6 formed to cover it. It is also possible by For this purpose, as described above, the SiO2 film 6 is formed on the gate electrode 5a made of polycrystalline Si. Note that the insulator formed on the sidewalls of the island pattern is not limited to the above-mentioned SiO2 film, but may be Si as long as it does not adversely affect the semiconductor layer.
Other insulating materials such as 3N4 film may also be used.

Thereafter, a polycrystalline Si film having a thickness of about 2000 angstroms, which will become the second gate electrode 5b, is formed using a low-pressure CVD apparatus, and a resist pattern is formed to process the gate electrode into a predetermined shape as shown in FIG. The first gate electrode 5a and the second gate electrode 5b are simultaneously etched using a reactive ion etcher.

Thereafter, ions are implanted into the entire surface and activation annealing is performed to lower the resistance of the polycrystalline Si films of the first and second gate electrodes, as well as the polycrystalline Si films that will become the source and drain portions.

Next, as shown in FIG. 7, PSG was doped with SiO2 or P on the entire surface of the substrate using an atmospheric pressure CVD apparatus.
A contact hole is formed in a part, and an interlayer insulating film 7 is formed. At this time, holes are also made in the gate insulating film at the same time so that the source and drain parts are connected to the Al electrodes that will be formed later. Note that contact holes are formed not only in the illustrated source and drain portions, but also in the film 7 on the gate electrode 5 connected to the subsequently formed Al wiring (not shown).

Next, approximately 5000% of Al was applied using a sputtering device.
As shown in FIG. 8, an angstrom film was formed and processed into a predetermined shape to form a source electrode 8a and a drain electrode 8b, and a thin film transistor and wiring around the thin film transistor were fabricated.

Through the above steps, a thin film transistor according to an embodiment of the present invention whose plan view is shown in FIG. 1 is formed.

When forming the insulating layer on the side wall of the island pattern as in the above embodiment, since the materials constituting the insulating layer and the gate electrode are different, the conventional problem is eliminated, and furthermore, the insulating layer and the gate electrode are made of different materials. It can be easily processed by performing selective etching using the etching selectivity with respect to the gate electrode. In addition, the method of forming an insulating layer on the sidewalls of the island pattern is to form an insulating film on the entire surface of the substrate and then perform anisotropic etching using a reactive ion etcher. This is a simple method of leaving the insulating film remaining, and it is also possible to control the amount of remaining insulating film with good reproducibility by controlling the etching time by checking the temporal changes in the spectral characteristics of the plasma during reactive ion etching. .

Although the present invention has been described above with reference to examples, the present invention is not limited to the examples. For example, the present invention is not limited to the examples. It is obvious that it is possible to use the material of the body in a configuration opposite to that in the example, and even if the first and second insulators are made of other materials, the difference in spectral characteristics will be noticed during etching. If approved, the same can be implemented. Furthermore, although a polycrystalline Si film was used for the gate electrode in the example, metals such as Ti and W may also be used depending on the manufacturing conditions.
The gate electrode can also be combined with silicide or the like.

Furthermore, the method of manufacturing the thin film transistor of the present invention and its shape can be changed depending on the purpose.

[0021]

Effects of the Invention In the method for manufacturing a thin film transistor of the present invention, since the upper surface of the island-like pattern with a laminated structure formed in the transistor forming part is used as the gate electrode material, the insulating layer formed on the side wall of the island-like pattern and By utilizing the etching selectivity with respect to the gate electrode material, the insulating layer formed on the sidewalls of the island pattern can be easily formed by selective etching. Furthermore, the method of forming an insulating layer on the sidewalls of the island-like pattern utilizes anisotropic etching, and the first insulator, which is the substrate surface, and the second insulating layer to be provided on the sidewalls of the island-like pattern are used. By using a different material for the insulator, it is possible to check temporal changes in plasma spectral characteristics during anisotropic etching, and the size of the second insulator to be left on the sidewall of the island pattern can be constantly checked. It can be formed with good reproducibility. Therefore, it has much higher mobility than thin film transistors using amorphous silicon,
Furthermore, thin film transistors having a large area can be manufactured with high yield.

[Brief explanation of the drawing]

FIG. 1 is a plan view showing an embodiment of a thin film transistor of the present invention.

FIG. 2 is a cross-sectional view showing the manufacturing process of the example, (a)
1 is the AA' cross section in FIG. 1, and (b) is the BB' cross section in FIG.

FIG. 3 is a cross-sectional view showing the manufacturing process of the example, (a)
1 is the AA' cross section in FIG. 1, and (b) is the BB' cross section in FIG.

FIG. 4 is a cross-sectional view showing the manufacturing process of the example, (a)
1 is the AA' cross section in FIG. 1, and (b) is the BB' cross section in FIG.

FIG. 5 is a cross-sectional view showing the manufacturing process of the example, (a)
1 is the AA' cross section in FIG. 1, and (b) is the BB' cross section in FIG.

FIG. 6 is a cross-sectional view showing the manufacturing process of the example, (a)
1 is the AA' cross section in FIG. 1, and (b) is the BB' cross section in FIG.

FIG. 7 is a cross-sectional view showing the manufacturing process of the example, (a)
1 is the AA' cross section in FIG. 1, and (b) is the BB' cross section in FIG.

FIG. 8 is a cross-sectional view showing the manufacturing process of the example, (a)
1 is the AA' cross section in FIG. 1, and (b) is the BB' cross section in FIG.

FIG. 9 is a characteristic diagram showing temporal changes in emission intensity at 388 nm.

FIG. 10 is a cross-sectional view of a thin film transistor of a comparative example.

[Explanation of symbols]

1 Glass substrate 2 First insulator (SiN) 3
Semiconductor layer (polycrystalline Si film) 4
Gate insulating film 5 Gate electrode (polycrystalline Si) 6, 6'
Second insulator (SiO2) 7 Interlayer insulating layer 8 Al electrode

Claims (5)

[Claims] 1. At least the surface of a substrate on which a thin film transistor is to be formed is a first insulator, and a semiconductor layer, a gate insulating film, and a lower gate electrode thin film are sequentially formed on the first insulator. forming an island-like pattern of the multilayer film by removing a portion of the multilayer film other than a thin film transistor formation portion; and forming a second insulator on the sidewall of the island pattern. A method for manufacturing a thin film transistor, comprising: a step of forming a thin film for an upper layer gate electrode; and a step of forming a gate electrode by etching the thin films for the upper and lower gate electrodes using the same resist pattern. . 2. The method of manufacturing a thin film transistor according to claim 1, wherein the first insulator and the second insulator are different materials. 3. When forming a second insulator on the sidewalls of the island pattern, the second insulator film is formed on the entire surface of the substrate,
2. The method of manufacturing a thin film transistor according to claim 1, wherein the second insulator is left only on the sidewalls of the island pattern by anisotropic etching. 4. The anisotropic etching is performed by plasma etching, and plasma spectroscopic analysis is performed to determine the plasma spectral characteristics during etching of the second insulator and the plasma spectral characteristics when the etching progresses and the first insulator is exposed. 2. The method of manufacturing a thin film transistor according to claim 1, wherein the etching time is controlled by detecting a difference in characteristics. 5. When performing the anisotropic etching, the etching selectivity between the second insulating film formed on the entire surface of the substrate and the lower gate electrode thin film formed thereunder is utilized. 4. The method for manufacturing a thin film transistor according to claim 3.