JPH04133428A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To enhance the initial breakdown strength and the reliability of the underneath silicon oxide film of a polycrystal silicon thereby enabling the high yield to be gained in the device manufacture by a method wherein, after the deposition of polysilicon on an insulating film and before performing the impurity doping step, the whole body is heat-treated at the temperature exceeding the deposition temperature of polycrystal silicon. CONSTITUTION:After the deposition of a polycrystal silicon 3 on an insulating film 4 and before performing the impurity doping step, the whole body is heat-treated at the temperature exceeding the deposition temperature of the polycrystal silicon 3. For example, after the formation of a silicon oxide film 2 for element separation on a silicon substrate 1 by selective oxidation process, the gate oxidation step is performed to form the underneath gate oxide film 4. Next, the polycrystal silicon film 3 is deposited on the silicon oxide film 2 and the underneath oxide film 4 at 600 deg.C-850 deg.C. Later, after the heat treatment at 1000 deg.C for 2 hours in nitrogen atmosphere, phosphorus is diffused on the polycrystal silicon 3. Next, the polycrystal silicon 3 is patterned by dry-etching step. Through these procedures, since the stress on the oxide films is relieved by the heat treatment, the deterioration in the oxide film characteristics due to the stress can be restrained.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a method for manufacturing a semiconductor device. After forming a silicon oxide film for the silicon oxide film, gate oxidation is performed to form a base gate oxide film. After that, polycrystalline silicon is deposited on the silicon oxide film and the base gate oxide film, and impurity (phosphorus) is immediately diffused without heat treatment. In the conventional method for manufacturing an MO8 type semiconductor device configured as described above, a desired pattern is obtained by dry etching. In view of this problem, the present invention has had the problem that the underlying gate oxide film is significantly degraded by the oxidation treatment of the polycrystalline silicon deposited resistor before impurity diffusion. The purpose of the present invention is to provide a method for manufacturing semiconductor devices that can obtain high yields in device manufacturing by improving the initial breakdown voltage and reliability of the silicon oxide film underlying polycrystalline silicon by adding a heat treatment step to the process. Means for Solving the Problems The present invention improves the yield in the device manufacturing process by performing heat treatment after polycrystalline silicon deposition and before impurity diffusion. Hiro
Introducing a heat treatment process before impurity diffusion improves the initial breakdown voltage and reliability of the silicon oxide film underlying polycrystalline silicon. As a result, it is possible to improve the yield in the semiconductor device manufacturing process.Embodiment (Example 1) FIG. 1 is a process diagram showing a method for manufacturing an MO8 type semiconductor device in Example 1 of the present invention. The manufacturing method of this embodiment differs from the prior art in that before depositing polycrystalline silicon on an insulating film and doping with impurities, heat treatment is performed at a temperature equal to or higher than the polycrystalline silicon deposition temperature.

The method for manufacturing the semiconductor device of this example will be described below with reference to FIGS. 1 and 3. In process 10, a silicon oxide film 2 for element isolation is formed by selective oxidation, and in process 11, gate oxidation is performed. Then, a base gate oxide film 4 is formed (see FIG. 3(a)).

Next, in process 12, polycrystalline silicon 3 is deposited on silicon oxide film 2 and base gate oxide film 4 at 600 DEG C. to 850 DEG C. (see FIG. 3(b)). Thereafter, in process 13, heat treatment is performed in a nitrogen atmosphere at 1000\2 hours. Thereafter, in process 14, polycrystalline silicon 3-heline diffusion is performed.

Next, in process 15, the polycrystalline silicon 3 is patterned into a desired shape by dry etching (see FIG. 3(C)).

With this method, even if the stress in the oxide film generated at the interface between the polycrystalline silicon and the oxide film is alleviated by heat treatment before phosphorus diffusion, the stress in the oxide film will reduce the breakdown voltage.
According to this example, it is possible to suppress the deterioration of the oxide film characteristics caused by the stress applied to the oxide film.4 Figures 4 and 5 show the effect. FIG. 3 is a diagram showing a conventional manufacturing method;

Figure 4 shows the defective rate in the oxide film reliability test, and in all three different post-treatments, Example 1 had a lower defective rate than the conventional manufacturing method. Although the effect is clear, Figure 5 shows the amount of traps generated in the F-N injection test, and even though the amount of traps generated in this example is smaller in any post-processing than in the conventional manufacturing method, this The difference in the amount of traps generated is thought to be due to changes in the stress applied to the oxide film, and the formation of phosphorus-containing compounds at the polycrystalline silicon-oxide film interface can be suppressed by performing heat treatment before phosphorus diffusion. The accompanying deterioration of oxide film quality can also be suppressed. Therefore, the initial breakdown voltage and reliability of the underlying gate oxide film 4 are improved, and as a result, the yield in the semiconductor device manufacturing process is improved! - According to this embodiment, it is possible to improve the yield in the semiconductor device manufacturing process (Example 2) Fig. 2 is a process diagram showing a method for manufacturing an MO3 type semiconductor device in Example 2 of the present invention. However, the manufacturing method in this example is as follows: After depositing the polycrystalline silicon on the insulating film, the first impurity diffusion is performed, and then the heat treatment is performed (X, followed by the second
The manufacturing method of the semiconductor device of this embodiment will be explained below with reference to FIG. 2 and FIG. After forming the oxide film 2, gate oxidation is performed in process 21 to form a base gate oxide film 4 (see FIG. 3(a)).
.

Next, in process 22, polycrystalline silicon 3 is deposited on silicon oxide film 2 and underlying gate oxide film 4 at 600 DEG C. to 850 DEG C. (see FIG. 3(b)).

Next, in process 23, first impurity diffusion is performed at 900°C for 5 minutes in row 1. X, heat treatment in a nitrogen atmosphere for 2 hours at 1000 tons in subsequent treatment 24, and 900\ in treatment 25
Perform a second impurity diffusion for 25 minutes.

Next, in step 26, the polycrystalline silicon 3 is patterned into a desired shape by dry etching (see FIG. 3(c)).

By performing the first impurity diffusion 23 using such a method, grain growth of polycrystalline silicon in the subsequent heat treatment 24 becomes much faster than when no grain growth is performed. As a result, after the second impurity diffusion 25 is performed and the desired impurity concentration is reached, grain growth of the polycrystalline silicon is reduced, and thinning and deformation of the oxide film due to grain growth are suppressed. Therefore, the breakdown voltage and reliability of the gate oxide film are improved, and as a result, the yield in the semiconductor device manufacturing process is improved.

In this example, it was possible to promote the grain growth of polycrystalline silicon and the improvement of the interface between polycrystalline silicon and the underlying silicon oxide film compared to Example 1 by performing the first impurity diffusion. Although it is possible to enhance the effect, as described above, even better effects can be expected compared to Example 1.As described above, according to this example, it is possible to improve the yield in the semiconductor device manufacturing process. In this example, it is also possible to divide the impurity diffusion into three or more stages and perform one or two or more stages of heat treatment between them. It goes without saying that similar effects can be obtained by applying the present invention to the case where polycrystalline silicon deposited on a general insulating film is doped with impurities. By improving the breakdown voltage and reliability of the underlying oxide film of polycrystalline silicon, it is possible to improve the yield in the semiconductor device manufacturing process, and its practical effects are significant.

[Brief explanation of the drawing]

1 is a process diagram showing a method for manufacturing a semiconductor device according to a first embodiment of the present invention. FIG. 2 is a process diagram showing a method for manufacturing a semiconductor device according to a second embodiment of the present invention. FIG. The process cross-sectional diagram shown in FIG.
The figure is a diagram plotting the amount of trap formation in the F-N injection test in the conventional manufacturing method and Example 1. 1... Silicon substrate, 2... Silicon oxide A 3
...Polycrystalline silicon, 4...Underlying gate oxidation trap Name of agent Patent attorney Akira Okaji and two others Fig. 1 Fig. Processing j Fig. No Rofur -7 Ni-ru Tomorrow processing 2 Description ff, li Fig. Fig. Fig. Processing j! 4 lower grip Kate bladder C yen 19 no 1 full Aichi no fixed P12 Processing 3

Claims (2)

[Claims] (1) A method for manufacturing a semiconductor device, which comprises performing heat treatment at a temperature equal to or higher than the polycrystalline silicon deposition temperature after depositing polycrystalline silicon on an insulating film and before doping with impurities. (2) A method for manufacturing a semiconductor device, which comprises depositing polycrystalline silicon on an insulating film, performing first impurity diffusion, then heat treatment, and then performing second impurity diffusion.