JPH0422052B2 - - Google Patents

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Publication number
JPH0422052B2
JPH0422052B2 JP24934483A JP24934483A JPH0422052B2 JP H0422052 B2 JPH0422052 B2 JP H0422052B2 JP 24934483 A JP24934483 A JP 24934483A JP 24934483 A JP24934483 A JP 24934483A JP H0422052 B2 JPH0422052 B2 JP H0422052B2
Authority
JP
Japan
Prior art keywords
waveguide
parallel
electro
light
optical
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP24934483A
Other languages
Japanese (ja)
Other versions
JPS60139027A (en
Inventor
Minoru Kyono
Itsupei Sawaki
Hiroki Nakajima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP24934483A priority Critical patent/JPS60139027A/en
Publication of JPS60139027A publication Critical patent/JPS60139027A/en
Publication of JPH0422052B2 publication Critical patent/JPH0422052B2/ja
Granted legal-status Critical Current

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  • Optical Communication System (AREA)

Description

【発明の詳細な説明】 (a) 発明の技術分野 本発明は有限桁数の信号を直列に配列してなる
デジタル電気信号から、各桁毎に並列に配列して
なる光信号に変換するシリアルパラレル変換器に
関する。
[Detailed Description of the Invention] (a) Technical Field of the Invention The present invention relates to a serial method for converting a digital electrical signal formed by arranging a finite number of digits in series into an optical signal formed by arranging each digit in parallel. Regarding parallel converters.

(b) 技術の背景 光通信技術の発展に伴つて各種の光デバイスが
開発され、この技術を各種の分野に応用しようと
する傾向が強く、また機能面でも従来の電気回路
では実現が困難とされていた分野を、光の特性を
生かして容易に実現するための研究が進められて
いる。例えば情報処理装置等においては有限桁数
の信号を直列に配列してなるデジタル信号から、
有限桁数の信号を各桁毎に並列に配列してなるデ
ジタル信号に変換する等の処理は各所で行われて
いる。これらの処理は一般に電気的に行われてい
るが数GHz〜数十GHzの高い周波数領域の信号に
なることを処理する装置の構成が極めて困難にな
る。そこでかかる高速度で入力されるデジタル信
号を、光の特性を生かして直列配列から、並列配
列に容易に変換できるシリアルパラレル変換器の
開発が望まれている。
(b) Background of the technology With the development of optical communication technology, various optical devices have been developed, and there is a strong tendency to apply this technology to various fields. Research is underway to easily realize this field by taking advantage of the properties of light. For example, in information processing equipment, digital signals consisting of signals of a finite number of digits are arranged in series.
Processing such as converting a signal with a finite number of digits into a digital signal in which each digit is arranged in parallel is performed in various places. These processes are generally performed electrically, but it is extremely difficult to configure a device that processes signals in a high frequency range of several GHz to several tens of GHz. Therefore, it is desired to develop a serial-to-parallel converter that can easily convert digital signals input at such high speed from a serial array to a parallel array by taking advantage of the characteristics of light.

(c) 従来技術と問題点 第1図は従来よりデジタル信号を直列配列から
並列配列に変換する手段として一般に用いられて
いるシフトレジスタの回路構成例、第2図は直列
配列の信号例である。図においてFはフリツプ・
フロツプ回路、Dは信号の1桁分即ち1クロツク
パルス時間だけの遅延時間をもつ遅延回路を表
す。入力端子Iに入力された直列配列信号はフリ
ツプ・フロツプ回路の列を左から右へ空間的にシ
フトしてゆき、第2図に示した直列配列信号の最
初の信号(1)が第1図のe点に到達した瞬間を考え
ると、並列配列の信号出力端子e,d,c,b,
aにはそれぞれ1桁だけずれた信号、すなわち第
2図に示した直列配列信号の(1),(2),(3),(4),(5)
が同時に現れていることになる。したがつて時間
的に配列された直列配列信号は空間的に配列され
た並列配列信号に変換される。
(c) Prior art and problems Figure 1 shows an example of the circuit configuration of a shift register, which has conventionally been commonly used as a means of converting digital signals from a serial arrangement to a parallel arrangement, and Fig. 2 shows an example of a series arrangement of signals. . In the figure, F is a flip
The flop circuit D represents a delay circuit having a delay time of one digit of the signal, that is, one clock pulse time. The series array signal input to the input terminal I spatially shifts the column of the flip-flop circuit from left to right, so that the first signal (1) of the series array signals shown in FIG. Considering the moment when point e is reached, the parallel array of signal output terminals e, d, c, b,
a is a signal that is shifted by one digit, that is, (1), (2), (3), (4), (5) of the series array signals shown in Figure 2.
appear at the same time. The time-aligned serial array signals are thus converted into spatially aligned parallel array signals.

しかし対象とする周波数が数GHz〜数十GHzの
高い周波数領域になると、その速い速度に追従で
き、且つ安定に動作するフリツプ・フロツプ回路
の構成、1クロツクパルス時間だけの遅延時間を
もつ遅延回路の構成は極めて困難になり装置が高
価になる。
However, when the target frequency becomes a high frequency range from several GHz to several tens of GHz, it is necessary to construct a flip-flop circuit that can follow the high speed and operate stably, and a delay circuit that has a delay time of one clock pulse time. The construction becomes extremely difficult and the equipment expensive.

(d) 発明の目的 本発明の目的は数GHz〜数+GHzの高い周波数
領域のデジタル信号を、光の特性を生かして直列
配列から、並列配列に容易に変換できるシリアル
パラレル変換器を提供することにある。
(d) Purpose of the Invention The purpose of the present invention is to provide a serial-to-parallel converter that can easily convert digital signals in the high frequency range from several GHz to several + GHz from a series arrangement to a parallel arrangement by taking advantage of the characteristics of light. It is in.

(e) 発明の構成 そしてこの目的は同一電気光学基板上に並列に
形成された複数個の光変調器を、それぞれ電気光
学基板の片面に形成されたX字状導波路と、導波
路の露出面を覆う絶縁層の上に形成された電極と
で構成し、遅延用ケーブルを介して複数の電極を
直列に接続することにより、電極に印加される直
列デジタル信号の時間的ピツチと、並列に配置さ
れた光変調器の空間的配列ピツチを合致せしめ、
電気光学基板の一方の側面に開口する各導波路の
端面を光入射端、電気光学基板の反対側の側面に
開口する各導波路の端面を光出射端とし、直列デ
ジタル信号のパルスがそれぞれの電極を通過する
間だけ、各導波路のいずれか一方の光入射端に光
パルスをパラレルに入射せしめ、直列デジタル信
号に対応して各導波路のいずれか一方の光出射端
から、パラレルに出射される光パルスを並列デジ
タル信号として取り出すことで達成している。
(e) Structure of the invention The purpose of this invention is to connect a plurality of optical modulators formed in parallel on the same electro-optic substrate, each with an X-shaped waveguide formed on one side of the electro-optic substrate, and an exposed waveguide. By connecting multiple electrodes in series via a delay cable, the temporal pitch of the serial digital signal applied to the electrodes can be adjusted in parallel. Matching the spatial arrangement pitch of the arranged optical modulators,
The end face of each waveguide that opens on one side of the electro-optic board is the light input end, and the end face of each waveguide that opens on the opposite side of the electro-optic board is the light output end. Light pulses are made to enter one of the light input ends of each waveguide in parallel only while passing through the electrodes, and are output in parallel from one of the light output ends of each waveguide in response to the serial digital signal. This is achieved by extracting the optical pulses generated as parallel digital signals.

(f) 発明の実施例 以下添付図により本発明の実施例を説明する。
第3図は本発明になるシリアルパラレル変換器を
構成する光変調器の詳細図、第4図は本発明にな
るシリアルパラレル変換器の一実施例を表す平面
図である。図において1は電気光学基板、2は導
波路、2aは導波路の入力端、2cおよび2dは
導波路の出力端、3は絶縁層、4は電極、5は遅
延用導体、6は光吸収帯、7aは直列配列信号入
力端子の共通端子、7bは直列配列信号入力端子
の信号端子、8の矢印は光、9は並列配列光信号
出力端子を示す。
(f) Embodiments of the invention Examples of the invention will be described below with reference to the accompanying drawings.
FIG. 3 is a detailed view of an optical modulator constituting the serial-to-parallel converter according to the present invention, and FIG. 4 is a plan view showing an embodiment of the serial-to-parallel converter according to the present invention. In the figure, 1 is an electro-optical substrate, 2 is a waveguide, 2a is an input end of the waveguide, 2c and 2d are output ends of the waveguide, 3 is an insulating layer, 4 is an electrode, 5 is a delay conductor, and 6 is an optical absorption 7a is a common terminal of the serially arranged signal input terminals, 7b is a signal terminal of the serially arranged signal input terminals, arrows 8 are optical, and 9 is a parallelly arranged optical signal output terminal.

第3図に示した光変調器はバイポーラ形光スイ
ツチと称されているもので、LiNbO3からなる電
気光学基板1の片面にTiを拡散せしめてX字状
に交叉する導波路2を形成し、導波路2の上を絶
縁層3(A12O3またはSiO2)で覆つた後、絶縁層
3の上に電極4を設けている。この光変調器の導
波路2の一端2aから矢印8に示す光を入射する
と、その光は導波路2を通過する途中で分岐され
導波路2の他の一端2cまたは2dから出射され
るが、電極4に電圧を印加されている場合と印加
されていない場合とでは2cまたは2dに分岐さ
れる分岐比が異なる 本発明はかかる光変調器の特性を利用してシリ
アルパラレル変換器を構成したもので、第4図に
示した如くLiNbO3からなる電気光学基板1の片
面にTiを拡散せしめて、デジタル信号の桁数に
対応する数のX字状に交叉する導波路2を形成
し、導波路2の上を絶縁層3(A12O3または
SiO2)で覆つた後、絶縁層3の上に電極4を設
けている。そして電極4の一方は並列に接続して
直列配列信号入力端子の共通端子7aに接続さ
れ、電極4の他の一方は該直列デジタル信号の時
間的ピツチと電極の空間的配列ピツチが合致する
ように電極間に遅延用ケーブル5を介して直列に
接続し、直列配列信号入力端子の信号端子7bに
接続されている。そして電極4に電圧を印加しな
い状態で導波路2の一端2aから矢印8に示す光
を入射すると、その光は導波路2を通過する途中
で分岐され導波路2の他の一端2cから出射する
ように構成されており、導波路の上に直接金属の
層を設けると光はそこで吸収され導波路を通つて
前方に進むことは勿論、そこで反射されて後戻り
することもないという特性を利用して、導波路2
cの上には金属からなる光吸収帯6が設けられて
いる。したがつて電極4に電圧を印加しない状態
で導波路2の一端2aから矢印8に示す光を入射
してもその光は光吸収帯6に吸収される。一方電
極4に電圧が印加された状態で導波路2の一端2
aから矢印8に示す光を入射するとその光は導波
路2dを通つて並列配列光信号出力端子9から出
射する。
The optical modulator shown in Fig. 3 is called a bipolar optical switch, in which Ti is diffused on one side of an electro-optic substrate 1 made of LiNbO 3 to form a waveguide 2 that intersects in an X-shape. After covering the waveguide 2 with an insulating layer 3 (A1 2 O 3 or SiO 2 ), an electrode 4 is provided on the insulating layer 3. When the light shown by the arrow 8 enters from one end 2a of the waveguide 2 of this optical modulator, the light is branched while passing through the waveguide 2 and is emitted from the other end 2c or 2d of the waveguide 2. The branching ratio for branching into 2c or 2d is different depending on whether a voltage is applied to the electrode 4 or not.The present invention utilizes the characteristics of such an optical modulator to construct a serial-parallel converter. As shown in Fig. 4, Ti is diffused on one side of an electro-optical substrate 1 made of LiNbO 3 to form waveguides 2 that intersect in an X-shape, the number of which corresponds to the number of digits of the digital signal. An insulating layer 3 (A1 2 O 3 or
After covering with SiO 2 ), an electrode 4 is provided on the insulating layer 3. One side of the electrodes 4 is connected in parallel to the common terminal 7a of the serially arranged signal input terminals, and the other side of the electrodes 4 is connected in parallel so that the temporal pitch of the serial digital signal matches the spatial arrangement pitch of the electrodes. are connected in series between the electrodes via a delay cable 5, and connected to a signal terminal 7b of the series array signal input terminal. When the light shown by arrow 8 enters from one end 2a of the waveguide 2 with no voltage applied to the electrode 4, the light is branched while passing through the waveguide 2 and exits from the other end 2c of the waveguide 2. It takes advantage of the property that if a metal layer is placed directly on top of the waveguide, the light will not only be absorbed there and travel forward through the waveguide, but will also not be reflected there and go back. , waveguide 2
A light absorption band 6 made of metal is provided above c. Therefore, even if the light shown by the arrow 8 is incident from one end 2a of the waveguide 2 with no voltage applied to the electrode 4, the light will be absorbed by the light absorption band 6. On the other hand, with voltage applied to the electrode 4, one end 2 of the waveguide 2
When the light shown by the arrow 8 is incident from a, the light passes through the waveguide 2d and is emitted from the parallel array optical signal output terminal 9.

かかる構成のシリアルパラレル変換器の直列配
列信号入力端子7a,7b間に第2図に示した直
列配列信号を印加し、直列配列信号の最初の信号
(1)が第4図のe点に到達した瞬間を考えると、
e,d,c,b,aの各点にはそれぞれ1桁だけ
ずれた信号、すなわち第2図に示した直列信号の
(1),(2),(3),(4),(5)が同時に現れていることにな
る。そこで電極を前記信号の一つが通過する間だ
け導波路2の一端2aから矢印8に示す光を入射
すると、電極4に電圧が印加された状態の並列配
列光信号出力端子9からのみ光が出射する。した
がつて時間的に配列された直列電気信号は空間的
に配列された並列光信号に変換される。この並列
光信号をそのまま次の回路に入力することも、ま
たこれを光検知器で電気信号に変換して次の回路
に入力することも可能である。
The serial array signal shown in FIG. 2 is applied between the serial array signal input terminals 7a and 7b of the serial-parallel converter having such a configuration, and the first signal of the series array signals is
Considering the moment when (1) reaches point e in Figure 4,
Each point e, d, c, b, and a has a signal shifted by one digit, that is, the serial signal shown in Figure 2.
(1), (2), (3), (4), and (5) appear simultaneously. Therefore, when the light shown by the arrow 8 is incident from one end 2a of the waveguide 2 only while one of the signals passes through the electrode, the light is emitted only from the parallel array optical signal output terminal 9 with voltage applied to the electrode 4. do. A temporally arranged series electrical signal is thus converted into a spatially arranged parallel optical signal. This parallel optical signal can be input to the next circuit as it is, or it can be converted into an electrical signal by a photodetector and input to the next circuit.

本発明になるシリアルパラレル変換器は、有限
桁数の信号の1ブロツクに対して1個の光パルス
を発するだけで直列配列信号が並列配列光信号に
変換されるため、特殊な素子を必要とせず高速度
の信号に追従でき、しかも構造が簡単で安価に実
現できる。
The serial-to-parallel converter of the present invention converts a serially arranged signal into a parallelly arranged optical signal by simply emitting one optical pulse for one block of a signal with a finite number of digits, so it does not require any special elements. It can follow high-speed signals, has a simple structure, and can be realized at low cost.

(g) 発明の効果 以上述べたように本発明によれば、数GHz〜数
十GHzの高い周波数領域のデジタル信号を、光の
特性を生かして直列配列から、並列配列に容易に
変換できるシリアルパラレル変換器を提供するこ
とができる。
(g) Effects of the Invention As described above, according to the present invention, digital signals in the high frequency range from several GHz to several tens of GHz can be easily converted from serial array to parallel array by taking advantage of the characteristics of light. A parallel converter can be provided.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のシリアルパラレル変換器(シフ
トレジスタ)の回路構成例、第2図は直列配列の
信号例、第3図は本発明になるシリアルパラレル
変換器を構成する光変調器の詳細図、第4図は本
発明になるシリアルパラレル変換器の一実施例を
表す平面図である。 図において1は電気光学基板、2は導波路、2
aは導波路の入力端、2cおよび2dは導波路の
出力端、3は絶縁層、4は電極、5は遅延用ケー
ブル、6は光吸収帯、7aは直列配列信号入力端
子の共通端子、7bは直列配列信号入力端子の信
号端子、8の矢印は光、9は並列配列光信号出力
端子を示す。
Figure 1 is an example of the circuit configuration of a conventional serial-to-parallel converter (shift register), Figure 2 is an example of serially arranged signals, and Figure 3 is a detailed diagram of an optical modulator that constitutes the serial-to-parallel converter of the present invention. , FIG. 4 is a plan view showing an embodiment of the serial-parallel converter according to the present invention. In the figure, 1 is an electro-optic substrate, 2 is a waveguide, 2
a is the input end of the waveguide, 2c and 2d are the output ends of the waveguide, 3 is an insulating layer, 4 is an electrode, 5 is a delay cable, 6 is an optical absorption band, 7a is a common terminal of series-arrayed signal input terminals, Reference numeral 7b indicates a signal terminal of a serially arranged signal input terminal, arrow 8 indicates light, and 9 indicates a parallelly arranged optical signal output terminal.

Claims (1)

【特許請求の範囲】 1 同一電気光学基板上に並列に形成された複数
個の光変調器を、それぞれ該電気光学基板の片面
に形成されたX字状導波路と、該導波路の露出面
を覆う絶縁層の上に形成された電極とで構成し、 遅延用ケーブルを介して複数の該電極を直列に
接続することにより、該電極に印加される直列デ
ジタル信号の時間的ピツチと、並列に配置された
該光変調器の空間的配列ピツチを合致せしめ、 該電気光学基板の一方の側面に開口する該導波
路の端面を光入射端、該電気光学基板の反対側の
側面に開口する各導波路の端面を光出射端とし、 該直列デジタル信号のパルスがそれぞれの電極
を通過する間だけ、各導波路のいずれか一方の光
入射端に光パルスをパラレルに入射せしめ、 該直列デジタル信号に対応して各導波路のいず
れか一方の光出射端から、パラレル出射される光
パルスを、並列デジタル信号として取り出すこと
を特徴とするシリアルパラレル変換器。
[Claims] 1. A plurality of optical modulators formed in parallel on the same electro-optic substrate, each having an X-shaped waveguide formed on one side of the electro-optic substrate, and an exposed surface of the waveguide. By connecting a plurality of the electrodes in series via a delay cable, the temporal pitch of the serial digital signal applied to the electrodes can be The spatial arrangement pitch of the optical modulators arranged in the electro-optical substrate is matched, and the end face of the waveguide which is opened on one side of the electro-optic substrate is used as a light input end, and the end face of the waveguide is opened on the opposite side of the electro-optic substrate. The end face of each waveguide is used as a light output end, and only while the pulse of the series digital signal passes through each electrode, a light pulse is made to enter one of the light input ends of each waveguide in parallel, and the series digital signal is A serial-to-parallel converter characterized in that optical pulses emitted in parallel from one of the light emitting ends of each waveguide in response to a signal are extracted as parallel digital signals.
JP24934483A 1983-12-27 1983-12-27 Serial/parallel converter Granted JPS60139027A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24934483A JPS60139027A (en) 1983-12-27 1983-12-27 Serial/parallel converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24934483A JPS60139027A (en) 1983-12-27 1983-12-27 Serial/parallel converter

Publications (2)

Publication Number Publication Date
JPS60139027A JPS60139027A (en) 1985-07-23
JPH0422052B2 true JPH0422052B2 (en) 1992-04-15

Family

ID=17191623

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24934483A Granted JPS60139027A (en) 1983-12-27 1983-12-27 Serial/parallel converter

Country Status (1)

Country Link
JP (1) JPS60139027A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11266149A (en) * 1998-03-18 1999-09-28 Advantest Corp High speed switching circuit

Also Published As

Publication number Publication date
JPS60139027A (en) 1985-07-23

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