JPH0421149Y2 - - Google Patents

Description

[Detailed explanation of the idea] [Technical field of invention] This invention relates to a display control device.

[Prior Art] It has become common for consultation counters of financial institutions such as banks to use display devices to provide consultations and explanations to customers. A single display device is shared by customers and consultants, and the display screen is rotated 180 degrees each time they explain materials. At this time, the conventional technique for rotating the display screen was to convert the contents of the screen memory using a software program.

[Problems with the prior art] These conventional screen rotation techniques are highly flexible because they are processed by software, but the processing speed is slow and the screen cannot be rotated instantaneously as needed. First, there was a problem that customer consultation was not carried out smoothly. In addition, since the contents of the screen memory are converted and rotated, rewriting the screen display contents while the screen is rotated takes more time, slows down the rewriting speed, and makes the explanation less convincing. There was a problem.

[Purpose of the invention] This invention was made in view of the above-mentioned circumstances, and its purpose is to create a display control that can instantly rotate the screen being displayed without using sophisticated software programs. The aim is to provide equipment.

[Main points of the invention] In order to achieve the above-mentioned purpose, this invention
An address counter that specifies the screen memory address by up-counting or down-counting it, and a parallel counter that converts the parallel data read from the screen memory in the specified address order into serial data and reads the serial data in the forward or reverse direction. and a serial conversion circuit, the counting direction of the address counter is switched by operation of the switching control circuit, and the serial data reading direction of the parallel-to-serial conversion circuit is switched, so that the display screen displayed on the display means is inverted. The main points are the main points.

[Example] This invention will be described below based on an example shown in the drawings. FIG. 1 is a block circuit diagram of a display control device according to the present invention, and numeral 1 in the figure is a bitmap memory, that is, a screen memory consisting of RAM. Screen memory 1 is the raster (scanning line) of the CRT screen, which will be described later.
As shown in Figure 2, one screen can be
Image data composed of 192 rasters is stored. Each image data consists of, for example, 8 bits, and is assigned an address from 0 to 6143, and one raster line is made up of 32 consecutive image data groups. Therefore address 0
-31 constitute the first raster, 32-63 constitute the second raster, and so on, and addresses 6112-6143 constitute the 192nd raster, respectively.

2 is an address counter, and the address counter 2 normally outputs an address by counting up in the incremental direction from address 0 to address 6143. Its output address is given to multiplexer (MPX) 3. The multiplexer (MPX) 3 uses this address to designate the address of the data to be read in the screen memory 1.

Further, the address counter 2 can previously input an address address, such as the final address 6143 of the 192nd raster, etc. from the preset value memory 4. Address counter 2 is at this address
6143 is accepted from the preset value memory 4 when the flip-flop (F/F) 5 is triggered and outputs a Hi signal, and it counts down (subtracts) by 1 from address 6143 toward address 0. .

Multiplexer 3 is connected to a CPU (not shown) via an address bus, and screen memory 1 is
It also receives addressing from the CPU. The timing controller 6 provides a switching signal for this purpose to the multiplexer 3, and the multiplexer 3 receives an addressing signal from either the CPU or the address counter 2. This switching signal is also inverted and outputted from the inverter 7 to prevent the image data read out to the bus driver 8 from being sent to the CPU side.

The image data in the screen memory 1 is read out as a parallel signal (8 bits in this case) and input to a parallel/serial (P/S) conversion circuit 9. The parallel/serial conversion circuit 9 receives a parallel signal of image data from the screen memory 1, converts it into a serial signal, and outputs it to the video controller 10, and is constituted by a shift register.

Further, this parallel/serial conversion circuit 9 receives shift/load (S/LOAD) signals from the timing controller 6.
L) Signal and shift clock (dot clock)
is given, and flip-flop 5 outputs the same Hi or
A signal of L ₀ is given.

The parallel/serial conversion circuit 9 accepts and loads the parallel signal from the screen memory 1 into the built-in shift register using the S/L signal, and if the output signal from the flip-flop 5 is _L0 , the shift clock changes the inside of the shift register. By sequentially shifting (scanning) in the positive direction, the image binary signals are serially read out dot by dot and output to the video controller 10.

On the other hand, if there is a Hi output signal from the flip-flop 5, the parallel/serial conversion circuit 9 switches the shift direction of the shift register to the reverse direction, sequentially shifts the contents of the shift register in the reverse direction, and
The data is read out serially one dot at a time and outputted to the video controller 10.

The video controller 10 is supplied with image data serially from the parallel/serial conversion circuit 9, and receives display timing signals and horizontal synchronization signals (HSYN) input from the timing controller 6.
The image data is controlled by a vertical synchronizing signal (VSYN) and displayed as an image on the screen of the CRT 11.

12 is a display changeover switch (SW), this display changeover switch 12 is connected to one input terminal of an AND gate 13, and a vertical synchronization signal is input from the timing controller 6 to the other input terminal of the AND gate 13. . Display changeover switch 12
The input terminal of is held at Hi potential, and when the display changeover switch 12 is pressed, the AND gate 13 provides one trigger to the flip-flop 5 in synchronization with the vertical synchronization signal. And the output signal of flip-flop 5 goes from Hi to L ₀ (or from L ₀ to Hi
), and the status signal is sent to address counter 2.
and is applied to the parallel/serial conversion circuit 9.

[Operation of the Embodiment] Next, the operation of the present invention will be described with reference to FIGS. 1, 2, and 3, A and B.

By operating a predetermined key, data is read out from the screen memory 1 via the multiplexer 3, and the data is converted into an image on the CRT 11 via the parallel/serial conversion circuit 9 and the video controller 10, as shown in FIG. Displayed as shown.

In this state, the address counter 2 normally starts from address 0 and continues up to addresses 1, 2...6143.
It is counting up in the forward direction. This address address is finally given to the multiplexer 3, and the multiplexer 3 sequentially reads out the image data at the designated address from the screen memory 1 in the direction A shown in FIG. 2 as a parallel signal.

This read parallel signal is
The signal is input to the shift register of the serial conversion circuit 9. The contents of this shift register are controlled by the shift clock from the timing controller 6.
The signal is shifted in the B direction shown in the figure and read out, and the parallel signal is converted into a serial signal and sent to the video controller 10. And CRT11
On the screen, the image is scanned in the direction C in Fig. 3A and displayed as shown in Fig. 3A.

To rotate the screen here, the display changeover switch 12 is pressed, a trigger is output from the AND gate 13, the flip-flop 5 is set, and a Hi signal is input to the address counter 2. Then, the preset value 6143 is inputted to the address counter 2 from the preset value memory 4.
Then, the address counter 2 starts counting down to address 0, using 6143 as the starting address. This address address is finally given to the multiplexer 3, and the multiplexer 3 reads out the image data at the designated address from the screen memory 1 in the X direction shown in FIG. 2 in the opposite direction as a parallel signal.

This read parallel signal is
It is input to the serial conversion circuit 9. Here, the Hi signal from the flip-flop 5 is also given to the parallel/serial conversion circuit 9. Then, the parallel/serial conversion circuit 9 shifts the contents of the shift register in the Y direction and reads them out in the reverse direction, as shown in FIG. A reverse serial image signal is output from the parallel/serial conversion circuit 9 and sent to the video controller 10. Therefore, on the screen of the CRT 11, the image is scanned in the direction C in FIG. 3 and displayed as shown in FIG.

To return to the original screen again, press the display changeover switch 12. Then, the flip-flop 5 is reset and its output becomes _L0 . This L ₀
The signal changes the count direction of the address counter 2 to up count and sets the count start value to 0. Also, the shift direction of the parallel/serial conversion circuit 9 is set to the original positive direction. Therefore CRT
As mentioned above, the original screen shown in FIG. 3A is displayed on the screen 11. In this way, rotation display switching of the display screen is quickly performed.

It goes without saying that this embodiment can be used not only for consultation services but also for video games, etc., and may be replaced with a changeover switch to automatically invert the screen after input is completed.

[Effects of the invention] According to the invention, since it is composed of a simple hardware circuit, the screen can be rotated 180 degrees instantly, and there is no burden on the software program, so writing on the screen during rotation can be done quickly. It is done. Therefore, for example, consultation work for customers can proceed smoothly.

[Brief explanation of drawings]

FIG. 1 is a block circuit diagram of an embodiment of the present invention.
FIG. 2 is a block diagram of the screen memory, and FIG. 3 is a diagram for explaining the operation of the present invention. 1...Screen memory, 2...Address counter,
3... Multiplexer, 4... Preset value memory, 5... Flip-flop, 6... Timing controller, 9... Parallel/serial conversion circuit, 10... Video controller, 11...
CRT, 12...Display changeover switch.

Claims (1)

[Scope of utility model registration request] A screen memory for storing display data displayed on the display means, an address counter for specifying an address of this screen memory by up-counting or down-counting, and means for storing an initial address value when the display screen is rotated 180 degrees. , a parallel-to-serial conversion circuit that converts parallel data read from the screen memory into serial data in the order of addresses specified by the address counter and reads the serial data in the forward or reverse direction; a switching control circuit that sets an initial address value in the address counter, switches its counting direction, switches the read direction of serial data of the parallel-serial converter circuit, and rotates the display screen displayed on the display means by 180 degrees; A display control device equipped with.