JPH04210781A - Inverter unit - Google Patents

Abstract

PURPOSE:To suppress fluctuation of output current by producing ON and OFF drive signals for a switching element in synchronism with rising and falling of a voltage induced in a secondary winding and applying respective drive signals on the switching element with predetermined time lags behind rising and falling of the voltage. CONSTITUTION:ON and OFF drive signals for a switching element Q1 are produced in synchronism, respectively, with rising and falling of a voltage induced in a secondary winding n2 mounted on an inductance element L and applied on the switching element Q1 with predetermined time lags behind rising and falling of the voltage. Consequently, a sufficiently long ON interval can be ensured for the switching element Q1 and a steep reverse bias current can be fed upon turn OFF of the switching element Q1. According to the constitution, fluctuation of storage time of the switching element Q1 does not cause considerable fluctuation of ON interval resulting in suppression of output current fluctuation due to fluctuation of the switching element Q1.

Description

[Detailed description of the invention]

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an inverter device that supplies high-frequency power to a load by alternately turning on and off a pair of switching elements connected in series. [0002]

2. Description of the Related Art FIG. 5 shows a conventional example of this type of inverter device. The operation of this inverter device is as follows. First, in the inverter circuit 3, when the control circuit 2 detects that the voltage across the resistors R1 and R2 connected to the DC power supply E via the diode D1 has become approximately zero,
The control circuit 2 applies an on drive signal to the switching element Q2 consisting of a power MO3FET to turn it on,
A current is passed through a DC power source E, a parallel circuit of a resistor R3 and a capacitor C1, and a resonant circuit consisting of a discharge lamp 1, a resistor R4, a capacitor C2, and a primary winding n+ of an inductance element. The on period of this switching element Q2 is fixed by an internal timer of the control circuit 2, etc., and turns off after a certain period of time. [0003] During the ON operation of the switching element Q2, a voltage is generated in the secondary winding n2 of the inductance element, but a reverse bias voltage is applied between the base and emitter of the switching element 1 consisting of a bipolar transistor. The secondary winding n2 is wound with a polarity of
Therefore, the switching element Q maintains an off state. [0004] When the switching element Q2 is turned off, the train current of the switching element Q2 decreases, so that the residual inductance of the inductance element generates an induced voltage in the opposite direction, and the oscillating current flowing through the inductance element flows in the same direction. Since the current tends to flow, the diode D1 becomes conductive. In addition, the primary winding n1 of the inductance element generates an induced voltage in the opposite direction.
A voltage indicated by an arrow a is generated from the next winding n2, and forward biases the switching element Q1. Therefore, an on-drive signal is applied to the base of the switching element Qh via the resistor R5 and the capacitor 3, and the switching element Q1
is in the on state. [0005] When the current in the diode D1 becomes zero, a current Ic flows through the switching element Q1 as shown in the figure, using the accumulated charge in the capacitor C1 as a power source, and at this time, an oscillating voltage is generated across the inductance element. The base current of the switching element Q1, which is approximately in phase with this oscillating voltage, decreases as the oscillating voltage decreases, and eventually the switching element Q1
By cutting off the collector current of I, the switching element Q is turned off. Even after the switching element Q is turned off, the oscillating current flowing through the inductance element tends to flow in the same direction, so the parasitic internal diode connected in antiparallel to the switching element Q2 becomes conductive, and the resonant circuit, capacitor C1, A current Id flows through the path of the DC power source E as shown. [0006] When the internal diode of the switching element Q2 becomes conductive, the voltage across the switching element Q2 becomes zero, so the divided voltage output of the resistors R1 and R2 also becomes zero, and the control circuit 2 detects the fall of the voltage. An on-drive signal is applied to the switching element Q2. By repeating the above operations, the switching elements Q, Q2 are alternately turned on and off, and the discharge lamp 1 is lit at high frequency. [00071 Figure 6 shows the waveforms of each part during the above operation, where (a) shows the gate-source voltage of switching element Q2, and (b) shows the drain current of switching element Q2. C) is the voltage across the resistor R2, (d) is the voltage across the secondary winding n2 of the inductance element, and (e) is the collector current of the switching element Q and the forward current of the diode D+. shows. [0008]

[Problems to be Solved by the Invention] By the way, the operation of the switching element Q1 in the conventional example shown in FIG. As the oscillating voltage decreases, the base current also decreases, and this decrease cuts off the collector current, turning off the switching element Q. By passing a steep reverse bias current through the base, It's not something that can be turned off. Therefore, in the case of such a base bias method, the on-period of the switching element Q1 changes significantly due to variations in the switching element Q (particularly turn-off time, storage time, etc.) or temperature characteristics, and this change causes a significant change in the output current. There was a problem with fluctuations in the [00091] The present invention has been made in view of the above-mentioned problems, and its object is to provide an inverter device that reduces fluctuations in output current due to variations in characteristics of switching elements.

[Means for Solving the Problems] In order to achieve the above-mentioned object, the present invention connects a DC power supply E, a series circuit of a first switching element Q1 and a second switching element Q2 to the above-mentioned DC power supply. Both switching elements Q, C2 are alternately turned on and off to supply high-frequency power to an oscillating circuit that is connected to a power source E and includes an inductance element and a load that are connected in parallel to the first switching element Q. an inverter device comprising an inverter circuit 3, which detects that the first switching element Q is turned off, and applies an on drive signal to the second switching element Q2 for a predetermined period of time; A drive that detects the rise and fall of the voltage generated in the secondary winding n2 of the element and applies an on drive signal and an off drive signal to the first switching element Q after a fixed time delay with respect to each detection signal. The means are provided. [00111

[Function] According to the present invention, in synchronization with the rise and fall of the voltage generated in the secondary winding n2 provided in the inductance element, the ON drive signal and OFF drive signal of the switching element Q1 are generated, and Since each driving signal is applied to the switching element Q1 with a certain delay time for falling and rising, it is possible to secure a sufficient length as the ON period of the switching element Q1, and also when the switching element Q1 is turned off. Therefore, due to variations in the storage time of the switching element Q, the on period does not change significantly, and the switching element Q
This makes it possible to suppress fluctuations in the output current due to variations in the output current. [0012] [0012] The present invention will be explained below with reference to Examples. (Embodiment 1) FIG. 1 shows the circuit configuration of Embodiment 1 of the present invention. This embodiment circuit differs from the conventional example in the configuration of the driving means for the switching element Q, and the basic configuration is the same as that of the conventional example. It is similar to a circuit. [00131 That is, the secondary winding n of the inductance element
Connect capacitor C6 to 2 via diode D2,
A series circuit of a resistor R7 and a transistor Q3 is connected to this capacitor C6, and the collector of this transistor Q3 is connected to the base of a switching element Q via an inverter gate Gl and a parallel circuit of a capacitor C3 and a resistor R5. Furthermore, a resistor R6 and a capacitor C are connected to the secondary winding n2.
Connect the parallel circuit of 4 and the series circuit of capacitor 5,
The base and emitter of a transistor Q3 are connected to both ends of this capacitor C5, thereby forming driving means for the switching element Q1. [0014] In this embodiment, when the voltage across the secondary winding n2 of the inductance element becomes higher than zero V as shown in FIG. It turns on a little later than the rise of the voltage of the winding n2. Then, as shown in Fig. 2(b), the input of the inverter gate G1 becomes °゛L'°L'°
The output of the inverter circuit h G + is shown in Figure 2 (
As shown in C), the level becomes H'', and the switching element Q is turned on. [0015] The voltage across the secondary winding n2 of the inductance element gradually decreases, and eventually the transistor Q1 turns off. Then, Due to the time constant determined by the resistor R7 and the input capacitance of the inverter gate G1, the input voltage of the inverter gate G1 gradually increases until the input level reaches °H°.
When the level VH, which is regarded as 0°, is reached, the output of the inverter gate Gl becomes the `L°° level, turning off the switching element Q1. At this time, the charge stored in the capacitor C3 is rapidly discharged, causing a steep reverse bias current to flow through the switching element Q as shown in Figure 2 (d).
, so that the switching element Q1 is abruptly turned off. [0016] The diode D2 and the capacitor C6 are used to create a power source for providing a stable voltage to the inverter gate Gl. As described above, in this embodiment circuit, the ON drive signal and OFF drive signal of the switching element Q are respectively generated in response to the rise and fall of the voltage generated in the secondary winding n2 provided in the inductance element. Since each drive signal is applied to the switching element Q1 with a certain delay time for rising and falling, it is possible to secure a sufficient size as the on period of the switching element Q1, and at the same time, the switching element Q1 Since it is possible to supply a steep reverse bias current when the switch is turned off, the on period does not change significantly due to variations in the storage time of the switching element Q, as in the conventional example, and therefore the output current due to variations in Ql does not change significantly. Fluctuations can be suppressed. [0017] Note that the operations of the circuits other than those described above are similar to those of the conventional example, so explanations thereof will be omitted. (Example 2) FIG. 3 shows a circuit of this example, in which a power MOS transistor is used instead of a bipolar transistor as the switching element Q1, and the switching element Q1 is Variations in characteristics due to switching time and temperature of Q1 are small, and fluctuations in output current due to switching element Q can be suppressed. Note that in place of the diode D+ in the circuit of the first embodiment, a parasitic diode of a power MOS transistor is used in this embodiment. Further, the output of the inverter gate Gl is directly connected to the gate of the switching element Q1. [0018] The other circuits are constructed in the same manner as in the first embodiment, and the same elements are given the same numbers and symbols. (Embodiment 3) FIG. 4 shows a circuit of this embodiment, in which an inverter G2 is used instead of the transistor Q3 provided as a driving means for the switching element Q in Embodiment 1.2. A series circuit of inverter gate G2 and resistor R8 is connected between the contact point of capacitors C4 and C5 and the input terminal of inverter gate G1, and a series circuit of inverter gate G2 and resistor R8 is connected between the cathode of diode D2 and capacitors CI and C3. A resistor R9 is connected between the connection point and the connection point. [0019] Then, when the switching element Q2 is turned off and the voltage across the secondary winding n2 of the inductance element rises in the direction of the arrow shown in the figure, the input voltage of the inverter gate G2 becomes 'H' level, and its The output becomes 'L' level. Therefore, the input of the inverter gate Gl is input to the inverter gate G2 through the resistor R9.
The output becomes °L with a slight delay from the °" output (the reason for this is due to the time constant of the resistor R8 and the input capacitance of the inverter gate GI).

Then, the output of the inverter gate Gl is '
. When Hlj is reached, the switching element Q1 is turned on. On the other hand, when the voltage across the secondary winding n2 of the inductance element decreases thereafter, the inverter gate G2
When the input level of the inverter gate G2 decreases and reaches a voltage that is considered to be the "L" level, the output of the inverter gate G2 becomes the "H1l level. Then, due to the time constant of the resistor R8 and the input capacitance of the inverter gate G2, When the input level of the inverter gate G1 gradually rises and the input of the inverter gate G+ reaches a value considered as the IHT level, the output of the inverter gate Gl becomes the ``L level'', so that the switching element Q suddenly changes. Turn off. [00211 The state is detected by resistors R1 and R2,
An on-drive signal is applied from the control circuit 2 to the switching element Q2. When the switching element Q2 is turned off after the ON drive signal is applied to the switching element Q2 for a period determined by the control circuit 2, the voltage across the secondary winding n2 of the inductance element is generated again in the direction of the arrow shown in the figure. , the above operations are repeated.

[0022] According to the present invention, in the inverter device configured as described above, by detecting that the first switching element is turned off, an on-drive signal is applied to the second switching element for a predetermined period of time. The control circuit detects the rise and fall of the voltage generated in the secondary winding of the inductance element, respectively, and outputs an on drive signal and an off drive signal after a fixed time delay with respect to each detection signal.
drive means for the switching element is provided.
It is possible to secure a sufficient size as the ON section of the first switching element, and also to turn off the switching element sharply when the first switching element is turned off. This has the effect of suppressing fluctuations in output current due to variations in characteristics and temperature changes, and ensuring stable operation.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing a first embodiment of the present invention.

FIG. 2 is a waveform diagram for explaining the operation of FIG. 1;

FIG. 3 is a circuit diagram showing a second embodiment of the present invention.

FIG. 4 is a circuit diagram showing a third embodiment of the present invention.

FIG. 5 is a circuit diagram showing a conventional example.

FIG. 6 is a waveform diagram for explaining the operation of FIG. 5;

[Explanation of symbols]

1 Discharge lamp 2 Control circuit 3 Inverter circuit Q, first switching element G2 Second switching element L Inductance element nz secondary winding G3 transistor G1 Inverter gate

[Figure 1]

Claims (1)

[Claims] 1. A DC power supply, a series circuit of a first switching element and a second switching element connected to the DC power supply, and comprising an inductance element and a load connected in parallel to the first switching element. In an inverter device comprising an inverter circuit that supplies high-frequency power to a load circuit by alternately turning on and off both switching elements, the second switching element is switched off by detecting that the first switching element is turned off. a control circuit that applies an on-drive signal for a predetermined period of time; and a control circuit that detects the rise and fall of the voltage generated in the secondary winding of the inductance element, respectively, and outputs an on-drive signal and an off-drive signal after a fixed time delay with respect to each detection signal. An inverter device comprising: drive means for applying a signal to the first switching element.