JPH04207033A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To fill a via hole well, to flatten an interconnection layer and to form a plug by a method wherein a first conductive film is deposited by one out of a high-temperature and high-bias sputtering method, a high-temperature sputtering method and a selective metal CVD method and, after that, a second conductive film is deposited by an ordinary sputtering method or a vapor deposition method. CONSTITUTION:A first insulating layer 2a and an interconnection layer 5 are formed on a substrate 1; after that, a second insulating film 2b in which a via hole 4 has been made is formed; a first conductive film 3a composed of Al is first deposited in the via hole 4 by a high-temperature and high-bias sputtering method. The first conductive film 3a is not deposited on a sidewall means of the deposition method, but it can be deposited on the bottom part with good efficiency. The first conductive film 3a formed on the surface of the second insulating film 2b is deposited so as to be a taper shape. In addition, a second conductive film 3b composed of Al is deposited by an ordinary sputtering method. The second conductive film 3b cannot be deposited on the bottom part efficiently, but, when the via hole is shallow, it can be deposited on its sidewall.

Description

[Detailed Description of the Invention] [Summary] Regarding technology for filling via holes and technology for forming plugs in via holes, the purpose of this invention is to deposit a continuous conductive film on the inner wall of the via hole, and to deposit a continuous conductive film on the inner wall of the via hole. a step of depositing a first conductive film in the provided via hole; a step of depositing a second conductive film at least on the periphery of the via hole including the inner wall of the via hole; and applying energy to the second conductive film. The second conductive film is melted by irradiation with a beam, and the via hole is filled with the melted second conductive film.

[Industrial application field]

The present invention relates to a technique for flattening wiring layers formed in a semiconductor device and burying via holes formed to connect wiring layers, and a technique for forming plugs in the via holes.

This is particularly useful when laser melting technology is used for flattening and plug formation. With this technology, a conductive film pattern (
The metal cap) is irradiated with pulsed laser light to melt and transfer materials to simultaneously form a conductive film and fill a via hole (laser flattening method), or to form a plug (
Laser plug formation method). A simple explanatory diagram of FIGS. 4 and 5 is shown, respectively.

In interconnects used in integrated circuits, step coverage of conductive films deposited by conventional methods (evaporation, sputtering) is poor, and this worsens as via holes become smaller. This problem arises because the amount of conductive film attached to the sidewall of the via hole is reduced due to the shadow effect.

If this via hole could be filled with a conductive material (plug formation), this problem would be solved. Furthermore, flattening the wiring layer is advantageous when forming multilayer wiring.

This is because problems such as depth of field problems during exposure and restrictions on the arrangement of via holes connected to upper layers can be avoided.

[Conventional technology]

In the conventional laser flattening technology and laser plug forming technology, as shown in FIGS. 4 and 5, the S electrical film is usually deposited by either sputtering or vapor deposition, and then laser melted. was going on.

[Problem to be solved by the invention]

In the method described above, as either the via size narrows or the via hole depth increases, either singly or simultaneously, voids occur in the via holes located in these areas, causing wiring defects.

[Means for solving the problem] After depositing the first conductive film by one of the high temperature/high bias sputtering method, the high temperature sputtering method, and the selective metal CVD method, the first conductive film is deposited by the normal sputtering method or the vapor deposition method. Depositing a second conductive film.

[Effect]

The laser plug forming technique requires a state in which the conductive film is continuously attached to the side wall of the via hole, as shown in FIG. This is because, as shown in Figure 7, if this is in a discontinuous state, part or all of the conductive film on the side wall will move to the top or bottom of the via hole when it is in a molten state, resulting in voids. This is because they place orders.

On the other hand, when a conductive film is deposited using normal sputtering or vapor deposition methods, discontinuities tend to occur on the sidewalls of the via hole as the via size decreases and the via hole depth increases because the adhesion rate to this area decreases. This is to do so.

In the present invention, as shown in FIG. 1, a first conductive film is formed at the bottom of the via hole by high temperature/high bias or high temperature sputtering method or selective metal CVD method on the bottom of the via hole where a discontinuous film is formed by the normal spunter method. was deposited, and then a second conductive film was deposited by ordinary sputtering and evaporation methods, thereby realizing a state in which the second conductive film was continuously attached to the side wall of the via hole.

〔Example〕

In all of the Examples, laser irradiation was performed by focusing XeCl excimer laser light at a pulse energy density of 0.6 J/cm''.

First Embodiment Here, an example is shown in which AI (aluminum) is first deposited as a conductive film thinner than the hole depth by high temperature/hole bias sputtering, and then Al is deposited overlyingly by normal sputtering.

FIG. 2 shows an example in which through holes (via holes) connecting the first and second AI wiring layers are filled.

Refer to FIG. 2(a) In this figure, after forming a first insulating layer 2a and a wiring layer 5 on a substrate 1, a second insulating layer 2 with via holes 4 is formed.
b shows the state in which it is formed.

(See Figure 2) This figure shows a state in which a first conductive film 3a made of, for example, Al is deposited in the via hole 4 by a high temperature, high bias sputtering method.

In this deposition method, as shown in the figure, the first conductive film 3a
is not deposited on the side walls, but can be deposited efficiently on the bottom. Note that the first conductive film 3a formed on the surface of the second insulating layer 2b is deposited in a tapered shape.

Refer to FIG. 2(C) This figure further shows that, for example, AI is formed by the normal sputtering method.
This shows the state in which a second conductive film 3b consisting of is deposited.

Although this deposition cannot efficiently deposit on the bottom, the second conductive film 3b can be deposited on the sidewall when the via hole is shallow. Therefore, by combining the features of the two deposition methods and using them as described above, the second conductive film 3 can be formed from the top of the via hole to the sidewalls and the bottom, as shown in this figure.
A state in which b is continuously deposited can be realized.

See FIG. 2(d) By forming such a state, as shown in this figure, good embedding and planarization of the wiring layer could be performed by laser irradiation.

Second Embodiment Here, an example will be shown in which W (tungsten) is first deposited as a conductive film thinner than the depth of the via hole by selective CVD, and then A1 is overlaid by normal sputtering.

FIG. 3 shows an example in which via holes connecting the first and second AI wiring layers are filled.

Refer to FIG. 3(a). In this figure, after forming a first insulating layer 2a and a wiring layer 5 on a substrate 1, a second insulating layer 2 with via holes 4 is formed.
b shows the state in which it is formed.

Refer to FIG. 3(b). This figure shows a state in which a first conductive film 3a made of, for example, W is deposited on the bottom of the via hole 4 by selective CVD.

Refer to FIG. 3(C) This figure further shows that, for example, AI is
This shows the state in which a second conductive film 3b consisting of is deposited.

In this state, the depth of the via hole 4 becomes substantially shallow due to the selective growth of W, so that a state in which the second conductive film 3b is continuously deposited from the top to the sidewalls and bottom of the via hole 4 can be realized.

See FIG. 3(d) By forming such a state, as shown in this figure, good embedding and planarization of the conductive film 3b could be performed by laser irradiation. Note that the advantage of this method is that selection C
The throughput is improved compared to a method in which via holes are filled only by the VD method.

Third Embodiment In this embodiment, Ti (titanium) is deposited before depositing the first conductive film 3a by high temperature/high bias sputtering or selective CVD as shown in the first and second embodiments. An example will be shown in which good contact characteristics can be obtained by depositing a film.

This Ti deposition provides good metal-to-metal connection.

Fourth Embodiment In the three embodiments described above, the second conductive film 3b is patterned before laser irradiation, and the second conductive film 3b is left only on the via ball 4 and its surroundings. Can be formed.

[Effects of the Invention] As described above, according to the present invention, it is possible to perform excellent filling of via holes, planarization of wiring layers, and formation of plugs.

[Brief explanation of the drawing]

Figure 1 is an illustration of the basic principle of the present invention. Figure 2 is an explanatory diagram showing the first embodiment of the present invention in the order of manufacturing steps. Figure 3 is an illustration of the second embodiment of the present invention in the order of the manufacturing steps. 4 is an explanatory diagram showing the conventional laser flattening method in the order of steps. FIG. 5 is an explanatory diagram showing the conventional laser plug forming method in the order of steps. FIG. 7 is an explanatory diagram showing a state in which the conductive film is discontinuously formed. In the figure, 1. , , ,Substrate, 2, ,Insulating layer, 2a00. first insulating layer, 2b0. , second insulating layer, 3, , conductive film, 3a0. , first conductive film, 3b, second conductive film, 4, via hole, 5, wiring layer. Figure 1 (α) (b) Basic diagram of the present invention Figure 1 (α) (b) Figure 1
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Claims (1)

[Claims] 1. Depositing a first conductive film (3a) in a via hole (4) provided in an insulating layer (2) formed on a substrate (1); 4) Depositing a second conductive film (3b) at least on the peripheral portion of the via hole (4) including the inner wall, and depositing the second conductive film (3b) on the second conductive film (3b) by A method for manufacturing a semiconductor device, comprising the steps of: melting a second conductive film (3b) and filling the via hole (4) with the melted second conductive film (3b). 2. The method of manufacturing a semiconductor device according to claim 1, wherein the first conductive film is deposited by high temperature/high bias or high temperature sputtering. 3. The method of manufacturing a semiconductor device according to claim 1, wherein the first conductive film is deposited by selective metal CVD. 4. The insulating layer (2) is formed on the wiring layer (5), the via hole (4) is connected to the wiring layer (5), and the wiring layer (5) and the first conductive film Claims 1 to 3, characterized in that a metal layer is provided between (3a) and (3a).
A method for manufacturing a semiconductor device.