JPH0420247B2 - - Google Patents

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Publication number
JPH0420247B2
JPH0420247B2 JP1560383A JP1560383A JPH0420247B2 JP H0420247 B2 JPH0420247 B2 JP H0420247B2 JP 1560383 A JP1560383 A JP 1560383A JP 1560383 A JP1560383 A JP 1560383A JP H0420247 B2 JPH0420247 B2 JP H0420247B2
Authority
JP
Japan
Prior art keywords
multilayer ceramic
glass
manufacturing
silver
ceramic capacitor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1560383A
Other languages
Japanese (ja)
Other versions
JPS59141215A (en
Inventor
Kenji Kusakabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP1560383A priority Critical patent/JPS59141215A/en
Publication of JPS59141215A publication Critical patent/JPS59141215A/en
Publication of JPH0420247B2 publication Critical patent/JPH0420247B2/ja
Granted legal-status Critical Current

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  • Ceramic Capacitors (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Description

【発明の詳細な説明】[Detailed description of the invention]

産業上の利用分野 本発明は端子電極の接着強度及び素子強度を改
善した積層セラミツクコンデンサの製造方法に関
するものである。 従来例の構成とその問題点 従来より小型大容量化を目的としてセラミツク
薄膜誘電体の並列配線構造を有する積層セラミツ
クコンデンサはよく知られている。この積層セラ
ミツクコンデンサの製造方法は一般的には次の通
りである。まず、チタン酸バリウム,チタン酸カ
ルシウム,チタン酸マグネシウムなどの酸化物に
数種の添加物を加え、混合した後、有機バインダ
を加えて粘性の高いスラリーとし、これをドクタ
ーブレード法などの一般的なシート成形方法によ
り、30〜100μmのシートを作製する。この後シー
ト上にパラジウムまたは銀とパラジウムの合金粉
末を、有機バインダ中に分散させたペーストをス
クリーン印刷法により印刷し、その上にシートを
積み重ねて印刷する。これを繰返しながら2〜40
層の積層体を作製する。この積層体を適当な大き
さに切断し、電気炉にて1200〜1400℃で焼成する
と焼結体のチツプが得られる。 このチツプの端面に端子電極として、銀とパラ
ジウム合金または銀の粉末よりなるペーストを付
着し、700〜900℃で焼付けることにより、積層セ
ラミツクコンデンサが得られる。 このような積層セラミツクコンデンサは、プリ
ント配線基板に直に半田付けされて用いられるこ
とがほとんどである。プリント配線基板はエポキ
シ樹脂からなり、使用中にたわみを生ることがど
うしても起りがちであるため、半田付けされた積
層セラミツクコンデンサの端子には10Kg以上の引
張り応力が作用することがしばしばあり、この応
力に耐えきれず、端子電極がはずれたり、素体自
身にクラツクを生じ、特性上に支障をきたすこと
があつた。このような問題に対し、ガラスフリツ
トを焼結後の積層セラミツクコンデンサの表面に
付着させ、熱処理によりセラミツク中にガラス成
分を拡散させる方法があるが、ガラスフリツトの
粒径が一般に10μ以上で粗いため積層セラミツク
コンデンサの表面に均一に付着させることが困難
で、処理後も素子によつて効果のバラツキが生じ
ていた。 発明の目的 本発明の目的は上記のような事実にかんがみ、
端子電極の接着強度、及び素子強度の改善をはか
り均質な積層セラミツクコンデンサを提供するこ
とにある。 発明の構成 本発明は焼結済みの積層セラミツクコンデンサ
をガラス形成化合物(たとえばB,Pb,Si,Al,
Bi等の有機、無機化合物)の混合溶液に浸漬後、
乾燥し、積層セラミツクコンデンサ焼結体表面に
上記化合物の薄層を形成し、しかる後これを熱処
理することによつてガラス形成とセラミツク中へ
の拡散を同時に行うことを特徴とする。 実施例の説明 チタン酸バリウム(BaTiO3)100重量部に対
し、チタン酸カルシウム(CaTiO3),酸化ニオ
ブ(Nb2O5)を共に3重量部,さらに二酸化マン
ガン(MnO2)を0.2重量部添加して十分に混合す
る。この後、有機バインダーにてスラリー化し、
ブレード工法により80μmの厚みのシートを作製
する。このシートにパラジウムペーストをスクリ
ーン印刷し、その上にシートを重ねて印刷をくり
返し、積層する。この積層体の切断し、1300〜
1350℃にて焼成した。この焼結体チツプの形状
は、1.5mm(幅)×3.0mm(長さ)×0.55mm(厚さ)
である。 このような焼結体を4%ホウ酸(H3BO3)水
溶液に浸漬後100℃,2時間乾燥する。次に5%
シリコンオイル及び4%ステアリン酸鉛を含むア
セトン溶液に浸漬し、空気中で自然乾燥する。こ
のもののガラス成分の付着量は焼結体チツプの
0.7%であつた。この量は溶液濃度を変えること
によつて調整することができる。このものをアル
ミナルツボ中に密閉し900℃で熱処理した。化合
物は分解し、B2O3−−SiO2−PbO系のガラスに
なりセラミツク中に拡散する。アルミナルツボ中
に密閉するのはPbO等の蒸発しやすい成分の揮散
を抑えるためである。 このようにして得られたチツプの端子に銀電極
を設けた。ただし、銀電極用銀ペースト中に上記
と同組成のガラスフリツトを2〜3%混合したも
のを用いた。 発明の効果 図は本発明の製造方法により得られた積層セラ
ミツクコンデンサを示す図であり、1はセラミツ
ク誘電体、2はパラジウム電極、3はガラス層、
4は銀端子電極である。また、第1表は従来の製
造方法、すなわちガラスフリツトを焼結体チツプ
の表面に付着、拡散させない方法で作製した場合
とガラスフリツトを焼結体チツプ表面に付着、拡
散させる方法、及び本発明の製造方法に基づく場
合の積層セラミツクコンデンサの端子電極引張り
強度及び抗折強度及び電気特性の比較を示したも
のである。なお、抗折強度はスパン2mmの3点曲
げ試験による結果である。
INDUSTRIAL APPLICATION FIELD The present invention relates to a method for manufacturing a multilayer ceramic capacitor with improved terminal electrode adhesive strength and element strength. Conventional Structures and Their Problems Multilayer ceramic capacitors having a parallel wiring structure of ceramic thin film dielectrics are well known for the purpose of achieving smaller size and larger capacitance than conventional capacitors. The method for manufacturing this multilayer ceramic capacitor is generally as follows. First, several additives are added to oxides such as barium titanate, calcium titanate, and magnesium titanate. After mixing, an organic binder is added to form a highly viscous slurry. A sheet of 30 to 100 μm is produced using a conventional sheet forming method. Thereafter, a paste in which palladium or silver-palladium alloy powder is dispersed in an organic binder is printed on the sheet by screen printing, and the sheets are stacked and printed on top of the paste. Repeat this for 2 to 40
Create a stack of layers. This laminate is cut into a suitable size and fired in an electric furnace at 1200 to 1400°C to obtain sintered chips. A laminated ceramic capacitor is obtained by attaching a paste made of silver and palladium alloy or silver powder to the end face of this chip as a terminal electrode and baking it at 700 to 900°C. In most cases, such multilayer ceramic capacitors are used by being directly soldered to a printed wiring board. Printed wiring boards are made of epoxy resin and tend to bend during use, so tensile stress of 10 kg or more is often applied to the terminals of soldered multilayer ceramic capacitors. Unable to withstand the stress, the terminal electrodes could come off or cracks could occur in the element itself, causing problems in its characteristics. To solve this problem, there is a method of attaching glass frit to the surface of the laminated ceramic capacitor after sintering and diffusing the glass component into the ceramic through heat treatment, but since the particle size of glass frit is generally 10μ or more and coarse, it is difficult to make laminated ceramic capacitors. It was difficult to apply it uniformly to the surface of the capacitor, and even after treatment, the effect varied depending on the device. Purpose of the invention In view of the above facts, the purpose of the present invention is to
The object of the present invention is to provide a homogeneous multilayer ceramic capacitor with improved adhesive strength of terminal electrodes and element strength. Structure of the Invention The present invention provides a method for manufacturing a sintered multilayer ceramic capacitor using a glass-forming compound (for example, B, Pb, Si, Al,
After immersion in a mixed solution of organic and inorganic compounds such as Bi,
It is characterized in that a thin layer of the above compound is formed on the surface of the sintered multilayer ceramic capacitor by drying, and then heat-treated to simultaneously form glass and diffuse into the ceramic. Description of Examples To 100 parts by weight of barium titanate (BaTiO 3 ), 3 parts by weight of both calcium titanate (CaTiO 3 ) and niobium oxide (Nb 2 O 5 ), and 0.2 parts by weight of manganese dioxide (MnO 2 ). Add and mix thoroughly. After this, it is slurried with an organic binder,
A sheet with a thickness of 80 μm is produced using the blade method. Palladium paste is screen-printed on this sheet, and the sheet is stacked on top of it and the printing is repeated to create a stack. Cutting this laminate, 1300 ~
It was fired at 1350℃. The shape of this sintered chip is 1.5mm (width) x 3.0mm (length) x 0.55mm (thickness).
It is. Such a sintered body is immersed in a 4% boric acid (H 3 BO 3 ) aqueous solution and then dried at 100° C. for 2 hours. then 5%
Immerse in an acetone solution containing silicone oil and 4% lead stearate and air dry. The amount of glass component attached to this material is
It was 0.7%. This amount can be adjusted by changing the solution concentration. This material was sealed in an aluminum crucible and heat treated at 900°C. The compound decomposes into a B 2 O 3 --SiO 2 --PbO glass that diffuses into the ceramic. The purpose of sealing the alumina crucible is to suppress volatile components such as PbO from evaporating. Silver electrodes were provided on the terminals of the chip thus obtained. However, 2 to 3% of glass frit having the same composition as above was mixed into the silver paste for silver electrodes. Effects of the Invention The figure shows a multilayer ceramic capacitor obtained by the manufacturing method of the present invention, in which 1 is a ceramic dielectric, 2 is a palladium electrode, 3 is a glass layer,
4 is a silver terminal electrode. Additionally, Table 1 shows the conventional manufacturing method, that is, the method in which glass frit is not attached to and diffused on the surface of the sintered chip, the method in which glass frit is attached and diffused on the surface of the sintered chip, and the manufacturing method of the present invention. This figure shows a comparison of terminal electrode tensile strength, bending strength, and electrical properties of multilayer ceramic capacitors based on the method. Note that the bending strength is the result of a three-point bending test with a span of 2 mm.

【表】 この表から明らかなように本発明の製造方法に
より得られる積層セラミツクコンデンサの強度が
著しく向上し、かつ強度のばらつきが小さいこと
が認められる。これはガラス形成化合物の付着が
素子表面にわたつて均一なため、処理なしの場合
及び今までのガラスフリツト処理にくらべてバラ
ツキが小さく良好な結果が得られるものである。 尚、コンデンサの電気的特性については静電容
量が若干小さいこと以外は何ら異常は認められな
かつた。そして、このような効果が得られるのは
セラミツク特有の気孔をガラスで満たすからであ
ると考えられる。 以上述べたように、本発明の製造方法にかかる
積層セラミツクコンデンサの機械的強度は極めて
優れており、プリント基板に直に半田付けされて
も基板のたわみに対して端子電極がはずれたり、
素子にクラツクが入ることを防止する上で極めて
有効であり、その意義は大きい。 尚、実施例ではガラス形成元素としてホウ素,
ケイ素,鉛の化合物を用いたが、これにさらに亜
鉛やアルミニウムの化合物を含むものでもよく、
またホウ素,ケイ素及びビスマスを主体とする化
合物の組合せも可能である。その場合化合物の形
も元素に応じて変える必要があり、溶剤もできる
だけ成分が相溶しあうように選択すべきである。
どうしても同時に溶解が困難な時には、実施例の
ごとく、お互いに溶解しないような溶剤の組合せ
を選択し、複数回に分けて付着させることもでき
る。さらに、実施例ではチタン酸バリウム,チタ
ン酸カルシウム,酸化ニオブ,二酸化マンガンよ
りなるセラミツク誘電体を用いたが、セラミツク
誘電体であるならばいかなる組成にも適用しうる
ことは言うまでもない。 また、実施例では端子電極として銀を用いた
が、銀とパラジウムの合金でもよい。
[Table] As is clear from this table, the strength of the multilayer ceramic capacitor obtained by the manufacturing method of the present invention is significantly improved, and the variation in strength is small. This is because the glass-forming compound adheres uniformly over the element surface, so that better results can be obtained with less variation than in the case of no treatment or in comparison with conventional glass frit treatments. Regarding the electrical characteristics of the capacitor, no abnormality was observed except that the capacitance was slightly small. It is believed that this effect is achieved because the pores unique to ceramic are filled with glass. As described above, the mechanical strength of the multilayer ceramic capacitor according to the manufacturing method of the present invention is extremely excellent, and even when soldered directly to a printed circuit board, the terminal electrodes will not come off due to the deflection of the board.
It is extremely effective in preventing cracks from entering the device, and its significance is great. In addition, in the examples, boron,
A compound of silicon and lead was used, but compounds containing zinc or aluminum may also be used.
Combinations of compounds based on boron, silicon and bismuth are also possible. In this case, the form of the compound must be changed depending on the element, and the solvent should be selected so that the components are compatible with each other as much as possible.
If it is difficult to dissolve them at the same time, it is also possible to select a combination of solvents that do not dissolve each other and apply them in multiple batches, as in the example. Furthermore, although ceramic dielectrics made of barium titanate, calcium titanate, niobium oxide, and manganese dioxide were used in the embodiments, it goes without saying that any composition of ceramic dielectrics may be used. Further, although silver was used as the terminal electrode in the embodiment, an alloy of silver and palladium may be used.

【図面の簡単な説明】[Brief explanation of drawings]

図は本発明の製造方法に基づく積層セラミツク
コンデンサを示す図である。 1……セラミツク誘電体、2……パラジウム電
極、3……ガラス層、4……銀端子電極。
The figure shows a multilayer ceramic capacitor based on the manufacturing method of the present invention. 1... Ceramic dielectric, 2... Palladium electrode, 3... Glass layer, 4... Silver terminal electrode.

Claims (1)

【特許請求の範囲】[Claims] 1 セラミツク誘電体層及び金属電極層が交互に
積層されてなる積層体をガラス形成化合物混合溶
液に浸漬した後乾燥し、しかる後熱処理すること
によつて上記化合物を分解,ガラス化し、上記積
層体表面に拡散させることを特徴とする積層セラ
ミツクコンデンサの製造方法。
1. A laminate in which ceramic dielectric layers and metal electrode layers are alternately laminated is immersed in a mixed solution of a glass-forming compound, dried, and then heat-treated to decompose the compound and vitrify it. A method for manufacturing a multilayer ceramic capacitor characterized by diffusion on the surface.
JP1560383A 1983-02-01 1983-02-01 Method of producing laminated ceramic condenser Granted JPS59141215A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1560383A JPS59141215A (en) 1983-02-01 1983-02-01 Method of producing laminated ceramic condenser

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1560383A JPS59141215A (en) 1983-02-01 1983-02-01 Method of producing laminated ceramic condenser

Publications (2)

Publication Number Publication Date
JPS59141215A JPS59141215A (en) 1984-08-13
JPH0420247B2 true JPH0420247B2 (en) 1992-04-02

Family

ID=11893292

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1560383A Granted JPS59141215A (en) 1983-02-01 1983-02-01 Method of producing laminated ceramic condenser

Country Status (1)

Country Link
JP (1) JPS59141215A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0379008A (en) * 1989-08-22 1991-04-04 Matsushita Electric Ind Co Ltd Manufacture of laminated ceramic capacitor
JPH1167574A (en) * 1997-08-26 1999-03-09 Taiyo Yuden Co Ltd Ceramic electronic component and its manufacturing
JP6937981B2 (en) * 2017-02-02 2021-09-22 太陽誘電株式会社 Laminated ceramic electronic component packaging and storage method for laminated ceramic electronic components

Also Published As

Publication number Publication date
JPS59141215A (en) 1984-08-13

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