JPH0135490B2 - - Google Patents

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Publication number
JPH0135490B2
JPH0135490B2 JP11728982A JP11728982A JPH0135490B2 JP H0135490 B2 JPH0135490 B2 JP H0135490B2 JP 11728982 A JP11728982 A JP 11728982A JP 11728982 A JP11728982 A JP 11728982A JP H0135490 B2 JPH0135490 B2 JP H0135490B2
Authority
JP
Japan
Prior art keywords
silver
laminate
manufacturing
glass frit
multilayer ceramic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP11728982A
Other languages
Japanese (ja)
Other versions
JPS598323A (en
Inventor
Gen Itakura
Takayuki Kuroda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP11728982A priority Critical patent/JPS598323A/en
Publication of JPS598323A publication Critical patent/JPS598323A/en
Publication of JPH0135490B2 publication Critical patent/JPH0135490B2/ja
Granted legal-status Critical Current

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  • Ceramic Capacitors (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Description

【発明の詳細な説明】[Detailed description of the invention]

本発明はガラスフリツトを積層体表面に付着し
熱処理することによりガラス層を形成させ、さら
にガラス成分の全部を積層体内部に拡散させたこ
とを特徴とする積層セラミツクコンデンサの製造
方法に関する。 従来より小型大容量化を目的としてセラミツク
薄膜誘電体の並列配線構造を有する積層セラミツ
クコンデンサはよく知られている。この積層セラ
ミツクコンデンサの製造方法は一般的には次の通
りである。まず、チタン酸バリウム、チタン酸カ
ルシウム、チタン酸マグネシウムなどの酸化物に
数種の添加物を加え、混合した後、有機バインダ
を加えて粘性の高いスラリーとし、これをドクタ
ーブレード法、パイプドクター法などの一般的な
シート成型方法により、30〜100μmのシートを
作製する。この後、シート上にパラジウムまたは
銀とパラジウムの合金粉末を有機バインダ中に分
散させたペーストをスクリーン印刷法により印刷
し、その上にシートを積み重ねて印刷をする。こ
れをくり返しながら2〜40層の積層体を作製す
る。この積層体を適当な大きさに切断し、電気炉
にて1200〜1400℃で焼成すると焼結体のチツプが
得られる。このチツプの端面に端子電極として、
銀とパラジウム合金または銀の粉末よりなるペー
ストを付着し、700〜900℃で焼付けることによ
り、積層セラミツクコンデンサが得られる。 このような積層セラミツクコンデンサは、プリ
ント配線基板に直に半田付けされて用いられるこ
とがほとんどである。プリント配線基板はエポキ
シ樹脂からなり、使用中にたわみを生じることが
どうしても起りがちであるため、半田付けされた
積層セラミツクコンデンサの端子には10Kg以上の
引張り応力が作用することがしばしばあり、この
応力に耐えきれず、端子電極がはずれたり、素体
自身にクラツクを生じ、特性上に支障をきたすこ
とがあつた。 本発明は上記のような事実にかんがみ、実験を
重ねた結果、端子電極の接着強度及び素子強度の
改善を同時にはかり得たものである。以下、実施
例に基づき詳細に本発明の内容を説明する。 (実施例) チタン酸バリウム(BaTiO3)100重量部に対
し、チタン酸カルシウム(CaTiO3)、酸化ニオ
ブ(Nb2O5)を共に3重量部、さらに二酸化マン
ガン(MnO2)を0.2重量部添加して十分に混合す
る。この後、有機バインダーにてスラリー化し、
ブレード工法により80μmの厚みのシートを作製
する。このシートにパラジウムペーストをスクリ
ーン印刷し、その上にシートを重ねて印刷をくり
返し、積層する。この積層体を切断し、1300〜
1350℃にて焼成した。この焼結体チツプの形状
は、1.5mm(幅)×3.0mm(長さ)×0.55mm(厚さ)
である。 このような焼結体チツプの表面に酸化ホウ素2
重量部、酸化ケイ素5重量部、酸化鉛1重量部よ
りなるガラスフリツトを有機バインダーに分散さ
せ、焼結体チツプの重量の0.1〜1重量部%とな
るように付着させた。このものを白金線で作製し
た〓の上にのせ、800〜850℃で熱処理した。 このようにして得られたチツプの端子に銀電極
を設けた。ただし、銀電極用銀ペースト中に上記
ガラスフリツトを2〜3%混合したものを用い
た。 図は本発明の製造方法により得られた積層セラ
ミツクコンデンサを示す図であり、1はセラミツ
ク誘電体、2はパラジウム電極、3はガラス層、
4は銀端子電極である。また、下記の表は従来の
製造方法、すなわちガラスフリツトを焼結体チツ
プの表面に付着、拡散させない方法で作製した場
合と本発明の製造方法に基づく場合の積層セラミ
ツクコンデンサの端子電極引張り強度及び抗折強
度及び電気特性の比較を示したものである。
The present invention relates to a method for manufacturing a laminated ceramic capacitor, characterized in that a glass layer is formed by adhering glass frit to the surface of a laminate and heat-treating it, and furthermore, all of the glass components are diffused into the laminate. 2. Description of the Related Art Multilayer ceramic capacitors having a parallel wiring structure of ceramic thin film dielectrics have been well known for the purpose of achieving smaller size and larger capacity. The method for manufacturing this multilayer ceramic capacitor is generally as follows. First, several additives are added to oxides such as barium titanate, calcium titanate, and magnesium titanate, and after mixing, an organic binder is added to form a highly viscous slurry, which is processed using the doctor blade method and pipe doctor method. A sheet of 30 to 100 μm is produced using a general sheet molding method such as. Thereafter, a paste in which palladium or silver/palladium alloy powder is dispersed in an organic binder is printed on the sheet by screen printing, and the sheets are stacked on top of the paste for printing. By repeating this process, a laminate of 2 to 40 layers is produced. This laminate is cut into a suitable size and fired in an electric furnace at 1200 to 1400°C to obtain sintered chips. As a terminal electrode on the end face of this chip,
A laminated ceramic capacitor is obtained by attaching a paste made of silver and palladium alloy or silver powder and baking at 700 to 900°C. In most cases, such multilayer ceramic capacitors are used by being directly soldered to a printed wiring board. Printed wiring boards are made of epoxy resin and tend to bend during use, so tensile stress of 10 kg or more is often applied to the terminals of soldered multilayer ceramic capacitors, and this stress The terminal electrodes could come off and the element itself could crack, causing problems with its characteristics. In view of the above-mentioned facts, the present invention has been made through repeated experiments, and as a result, it has been possible to simultaneously improve the adhesive strength of terminal electrodes and the element strength. Hereinafter, the content of the present invention will be explained in detail based on Examples. (Example) For 100 parts by weight of barium titanate (BaTiO 3 ), 3 parts by weight of both calcium titanate (CaTiO 3 ) and niobium oxide (Nb 2 O 5 ), and 0.2 parts by weight of manganese dioxide (MnO 2 ). Add and mix thoroughly. After this, it is slurried with an organic binder,
A sheet with a thickness of 80 μm is produced using the blade method. Palladium paste is screen-printed on this sheet, and the sheet is stacked on top of it and the printing is repeated to laminate the sheets. Cut this laminate, 1300 ~
It was fired at 1350℃. The shape of this sintered chip is 1.5mm (width) x 3.0mm (length) x 0.55mm (thickness)
It is. Boron oxide 2 is deposited on the surface of such a sintered chip.
A glass frit consisting of 1 part by weight, 5 parts by weight of silicon oxide, and 1 part by weight of lead oxide was dispersed in an organic binder and attached to the sintered chip in an amount of 0.1 to 1 part by weight based on the weight of the sintered chips. This product was placed on a plate made of platinum wire and heat-treated at 800 to 850°C. Silver electrodes were provided on the terminals of the chip thus obtained. However, a mixture of 2 to 3% of the above glass frit in a silver paste for silver electrodes was used. The figure shows a multilayer ceramic capacitor obtained by the manufacturing method of the present invention, in which 1 is a ceramic dielectric, 2 is a palladium electrode, 3 is a glass layer,
4 is a silver terminal electrode. The table below also shows the tensile strength and resistance of terminal electrodes of multilayer ceramic capacitors manufactured using the conventional manufacturing method, that is, a method in which glass frit is not attached or diffused on the surface of the sintered chip, and when manufactured using the manufacturing method of the present invention. This figure shows a comparison of bending strength and electrical properties.

【表】 〓 * 下限値〓
〓 〓
〓** 平均値〓
この表から明らかなように本発明の製造方法に
より得られる積層セラミツクコンデンサの強度が
著しく向上することが認められる。尚、コンデン
サの電気的特性については静電容量が若干小さい
こと以外は何ら異常は認められなかつた。そし
て、このような効果が得られるのはセラミツク特
有の気孔をガラスで満たすからであると考えられ
る。 以上述べたように、本発明の製造方法にかかる
積層セラミツクコンデンサの機械的強度は極めて
優れており、プリント基板に直に半田付けされて
も基板のたわみに対して端子電極がはずれたり、
素子にクラツクが入ることを防止する上で極めて
有効であり、その意義は大きい。 尚、実施例ではガラスフリツトとしてホウ素、
ケイ素、鉛の酸化物を用いたが、これにさらに亜
鉛やアルミニウムの酸化物またはフツ化物を含む
ものでもよく、またホウ素、ケイ素及びビスマス
を主体とするガラスフリツトを用いることも可能
である。さらに、実施例ではチタン酸バリウム、
チタン酸カルシウム、酸化ニオブ、二酸化マンガ
ンよりなるセラミツク誘電体を用いたが、セラミ
ツク誘電体であるならばいかなる組成にも適用し
うることは言うまでもない。 また、実施例では端子電極として銀を用いた
が、銀とパラジウムの合金でもよい。
[Table] 〓 * Lower limit value〓
〓 〓
〓** Average value〓
As is clear from this table, it is recognized that the strength of the multilayer ceramic capacitor obtained by the manufacturing method of the present invention is significantly improved. Regarding the electrical characteristics of the capacitor, no abnormality was observed except that the capacitance was slightly small. It is believed that this effect is achieved because the pores unique to ceramic are filled with glass. As described above, the mechanical strength of the multilayer ceramic capacitor according to the manufacturing method of the present invention is extremely excellent, and even when soldered directly to a printed circuit board, the terminal electrodes will not come off due to the deflection of the board.
It is extremely effective in preventing cracks from entering the device, and its significance is great. In addition, in the examples, boron,
Although oxides of silicon and lead are used, oxides or fluorides of zinc and aluminum may also be included, and a glass frit mainly containing boron, silicon, and bismuth can also be used. Furthermore, in the examples, barium titanate,
Although a ceramic dielectric consisting of calcium titanate, niobium oxide, and manganese dioxide was used, it goes without saying that any composition of ceramic dielectric can be applied. Further, although silver was used as the terminal electrode in the embodiment, an alloy of silver and palladium may be used.

【図面の簡単な説明】[Brief explanation of drawings]

図は本発明の製造方法に基づく積層セラミツク
コンデンサを示す図である。 1……セラミツク誘電体、2……パラジウム電
極、3……ガラス層、4……銀端子電極。
The figure shows a multilayer ceramic capacitor based on the manufacturing method of the present invention. 1... Ceramic dielectric, 2... Palladium electrode, 3... Glass layer, 4... Silver terminal electrode.

Claims (1)

【特許請求の範囲】[Claims] 1 セラミツク誘電体層及び金属電極層が交互に
積層されてなる積層体の表面全体にガラスフリツ
トを付着させて後、熱処理することにより、上記
積層体内部に上記ガラス成分の全部を熱拡散させ
た後、積層体の端部に、ガラスフリツトを含む銀
または銀とパラジウムの合金からなるペーストを
付着し、焼付けして端子電極を形成することを特
徴とする積層セラミツクコンデンサの製造方法。
1. After adhering glass frit to the entire surface of a laminate in which ceramic dielectric layers and metal electrode layers are alternately laminated, all of the glass components are thermally diffused into the interior of the laminate by heat treatment. 1. A method for manufacturing a multilayer ceramic capacitor, which comprises: adhering a paste made of silver or an alloy of silver and palladium containing glass frit to the end of the multilayer body and baking it to form a terminal electrode.
JP11728982A 1982-07-05 1982-07-05 Method of producing laminated ceramic condenser Granted JPS598323A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11728982A JPS598323A (en) 1982-07-05 1982-07-05 Method of producing laminated ceramic condenser

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11728982A JPS598323A (en) 1982-07-05 1982-07-05 Method of producing laminated ceramic condenser

Publications (2)

Publication Number Publication Date
JPS598323A JPS598323A (en) 1984-01-17
JPH0135490B2 true JPH0135490B2 (en) 1989-07-25

Family

ID=14708057

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11728982A Granted JPS598323A (en) 1982-07-05 1982-07-05 Method of producing laminated ceramic condenser

Country Status (1)

Country Link
JP (1) JPS598323A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04267320A (en) * 1991-02-21 1992-09-22 Tokin Corp Layered ceramic capacitor production method
JPH1167574A (en) * 1997-08-26 1999-03-09 Taiyo Yuden Co Ltd Ceramic electronic component and its manufacturing
JP3636075B2 (en) 2001-01-18 2005-04-06 株式会社村田製作所 Multilayer PTC thermistor

Also Published As

Publication number Publication date
JPS598323A (en) 1984-01-17

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