JPH04196785A - Camcorder - Google Patents

Abstract

PURPOSE:To record a stable picture by applying time axis correction to a video signal written in a memory so that disturbance in a track pattern written on a magnetic tape is reduced in response to fluctuation of rotation of a rotary cylinder. CONSTITUTION:A video signal is converted once into a digital signal before through a recording signal processing circuit 9 and time correction is applied to the digital signal. That is, the video signal outputted from a camera 1 is converted into a digital signal by an A/D converter 2 and the result is stored in a memory 3, and a stored address is pointed out by an address counter 5. The address designation in write and read is implemented in a different timing independently and the video signal in the memory 3 is subject to timewise deviation. The data read from the memory 3 is decoded into an analog video signal by a D/A converter 4. Thus, the response with respect to detailed external disturbance is improved and the stability of rotation is improved.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a camera-integrated VTR, and particularly relates to a camera-integrated VTR that applies time axis correction when writing a video signal to a magnetic tape. ] In the past, various camera-integrated VTRs have been proposed, but thanks to miniaturization of components and improvements in circuit integration technology on LSI, small and lightweight camera-integrated VTRs that can be held with one hand have been developed. has been realized and commercialized.

These compact, lightweight VTRs with built-in cameras have excellent operability and can be easily operated with one hand, but on the other hand, they should not be recorded while fixed on a tripod or held steady on the shoulder. Therefore, there was a problem that the image was shaken due to camera shake.

To solve this problem, the video signal output from the camera is temporarily stored in field memory, motion is detected, and if it is determined that it is camera shake, the cropping position when reading from the field memory is adjusted to the amount of motion. A camera-integrated VTR has been proposed that can record a stable image with camera shake corrected by moving the two cameras together. An example of this type of device is discussed in "Television Technology, August 1990 Issue, P17-P26".

[Problem to be Solved by the Invention] The above conventional technology can correct the fluctuation of the camera video signal due to hand shake and obtain a stable camera video signal, but the rotation of the rotating cylinder of the VTR part caused by hand shake Since no consideration has been given to the influence of camera shake on video signals recorded on the magnetic tape, there is a problem in that when camera shake occurs, it is not possible to completely eliminate the shake in the video signal recorded on the magnetic tape. In other words, in order to reduce the weight of a VTR, the rotating cylinder was made smaller in diameter and lighter in weight, but it was not possible to ensure sufficient inertia, which caused the problem that the rotation of the rotating cylinder fluctuated in response to external disturbances. . For this reason, if vibrations due to camera shake etc. are applied to the VTR section while recording on a magnetic tape, the track pattern recorded on the magnetic tape will be disturbed, resulting in sideways shaking on the TV screen, or in other words, an image with many sick spots will be recorded. This will result in

SUMMARY OF THE INVENTION An object of the present invention is to provide a camera-integrated VTR that can record stable images with little disturbance in track patterns recorded on a magnetic tape even when camera shake occurs.

[Means for Solving the Problems] In order to achieve the above object, the present invention uses an A/D converter to first convert a video signal output from a camera into a digital signal, and then convert it into a digital signal. Then, a memory performs time axis correction to reduce disturbances in the track pattern written on the magnetic tape according to fluctuations in the rotation of the rotating cylinder, and a D/A converter is used to convert the analog signal into It was converted into . Furthermore, in order to perform time axis correction, the present invention uses separate clocks to count the memory write and read address counters, and the frequency of either clock is determined by the frequency of the rotating cylinder output from the servo circuit of the VTR section. It is designed to change based on information corresponding to rotational fluctuations. Furthermore, the present invention
As a means for varying the clock frequency, an adder is provided on the input side of a voltage controlled oscillator of a PLL (phase locked loop) constituting the clock generator, and information corresponding to rotational fluctuations is added.

[Operation] The present invention uses an A/D converter to convert the video signal output from the camera into a digital signal, and then uses a memory to convert the magnetic signal into a digital signal according to the rotational fluctuation of the rotating cylinder. Time axis correction is applied to reduce disturbances in the track pattern written on the tape, and a D/A converter is used to convert it into an analog signal, so even if there is rotational fluctuation in the rotating cylinder, , the effect is such that the video signal written on the magnetic tape does not appear.

[Example] An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention.

Here, 1 is a camera, 2 is an A/D converter, 3 is a memory,
4 is a D/A converter, 5 is a write address counter, 6
1 is a read address counter, 7 is a write clock generator, 8 is a read clock generator, 9 is a recording signal processing circuit, 1o is a recording amplifier, 11 is a magnetic tape, 12 is a rotating cylinder, 13 is a magnetic head pair, and 14 is a motor , 15
16 is a frequency generator, 17 is a motor drive circuit, 18 is a frequency-voltage converter, 19 is a phase control circuit, and 20 is an adder. Next, the operation of this embodiment will be explained.

The camera 1 converts the optical signal into an electrical video signal and outputs it. In a conventional VTR, this video signal is written onto the magnetic tape after undergoing processing such as frequency modulation in the recording signal processing circuit 9, but in this embodiment, the video signal is processed before passing through the recording signal processing circuit 9. Once the video signal is
It is converted to a digital signal and temporal correction is applied.

That is, the A/D converter 2 converts the video signal output from the camera 1 into a digital signal and stores it in the memory 3. The address to be stored is the one pointed to by the write address counter 5. The memory 3 is configured such that it can be read while being written, and the data at the address pointed to by the read address counter 6 is read. By independently specifying the writing and reading at different timings, the memory 3 causes the video signal to be subject to a time lag. The data read from the memory 3 is restored to an analog video signal by the D/A converter 4. This video signal passes through a recording signal processing circuit 9, is amplified by a recording amplifier 10, and is written onto a magnetic tape 11 by a pair of magnetic heads 13.

Next, a servo block for generating a standard recording track pattern on the magnetic tape 11 will be explained. The magnetic tape 11 is spirally wound around a rotating cylinder 12, and is run at a constant speed by a capstan motor (not shown). On the other hand, the rotary cylinder 12 rotates in phase synchronization with the vertical synchronization signal of the video signal output from the camera, thereby generating a track pattern in which one track corresponds to one field. In order to perform this phase synchronization, the rotary cylinder 12 is equipped with a rotational phase detector 15, which outputs one pulse per rotation so that the rotational phase of the rotary cylinder 12 can be determined. The output pulse of this rotational phase detector 15 is input to a phase control circuit 19. A reference pulse is input from the camera 1 to the other input terminal of the phase control circuit 19 .

This reference pulse is synchronized with the video signal output from the camera 1, and is the frequency of the vertical synchronization signal divided by two. The phase control circuit 19 compares the phases of these two signals, converts the phase difference into a voltage, and outputs the voltage. This output voltage is applied to the motor drive circuit 17 through the adder 20, and the rotation speed of the motor 14 is changed, thereby forming a feedback loop, and the rotation cylinder 12 and the reference pulse from the camera 1 are phase synchronized. This control is
Since this is performed only once per rotation of the rotary cylinder 12, it cannot respond to disturbances that occur during rotation, so a speed loop is provided to stabilize the rotation. That is, a frequency generator 16 is provided in the rotating cylinder 12, and this outputs pulses with a frequency depending on the rotational speed, and is set to output pulses with a frequency of several kHz at a normal rotational speed. Therefore, by frequency-voltage converting this signal and applying it to the motor drive circuit 17, responsiveness to small disturbances is improved and rotational stability is improved. Here, frequency-voltage conversion is performed by a frequency-voltage converter 18 , the output of which is added to a phase loop in an adder 20 and fed back to the motor drive circuit 17 .

With the configuration of the feedback group explained above, even if a disturbance occurs and the running is disrupted, the restoration operation is performed.
It is possible to continue writing standard recording track patterns on magnetic tape. However, since this feedback loop includes mechanical parts such as the rotating cylinder 12, it takes longer to respond than a feedback loop consisting only of electric circuits, making it difficult to continue recording without disturbing the recording track pattern at all. is realistically impossible. Additionally, camera-integrated VTRs are often held in the hand and are subject to large disturbances due to vibrations.
It is difficult to prevent irregularities in driving.

When a disturbance actually occurs due to the disturbance, it appears on the TV screen as horizontal fluctuation or jitter. In other words, the disturbance causes fluctuations in the rotating cylinder 12, and a track pattern with a disturbed period of the horizontal synchronizing signal is recorded on the magnetic tape 11. When this tape is reproduced, an image with noticeable jitter is produced. Due to external disturbances, the capstan system is also disturbed, causing disturbances in tape running. However, in a helical scan VTR, the running speed of the magnetic head due to the rotation of the rotation cylinder 12 is extremely low compared to the tape running speed. Due to the large disturbance TV
The influence on the screen is dominated by fluctuations in the rotation of the rotary cylinder 12.

In this embodiment, when fluctuations in the rotation of the rotary cylinder 12 occur, temporal correction is applied to the video signal in the memory 3, and
This is intended to reduce disturbances in the recording track pattern and reduce jitter on the TV screen.

As described above, in order to cause a time lag in the memory 3, addressing of the write address counter 5 and the read address counter 6 may be performed independently in terms of time.

In this embodiment, independent clock generation means are used, in which a write clock generator 7 generates a clock to drive the write address counter 5, and a read clock generator 8 generates a clock to drive the read address counter 6. This is achieved by providing

The basic operation of the two clock generators is to multiply the reference pulse from camera 1. When there is no fluctuation in the rotating cylinder 12, the two clock generators must continue to generate synchronized clocks. If they are not synchronized, the time difference between the input and output signals of the memory 3 will increase rapidly, resulting in memory overflow. Therefore, the two Glock generators operate by multiplying a common reference pulse by the same multiple. Here, the reference pulse is a servo system reference pulse coming from the camera 1, but this is not particularly limited. From the point of view of beat generation, it is preferable to synchronize with the video signal from the camera, but it is not always necessary to synchronize. Further, even when synchronized with the video signal, a frequency different from that in this embodiment may be selected. Next, the difference between the two clock generators is that the write clock generator 7 always outputs a constant clock by only multiplying the clock, but the read clock generator 8 uses a signal from the servo block to output a constant clock frequency. It has a changing structure. In other words, since the frequency-voltage converter 18 generates a voltage proportional to the rotational frequency of the rotating cylinder 12, the amount of change in the output voltage indicates the amount of change in the rotational speed. Therefore, if the readout glock frequency is controlled by this output voltage change, a readout clock is generated according to the rotational speed of the rotary cylinder 12, and the video signal read out from the memory 3 also undergoes expansion and contraction of the time axis. By appropriately setting the ratio of the change in the readout Glock frequency to the change in the output voltage of the frequency-voltage converter 18, even if fluctuations occur in the rotation of the rotary cylinder 12, disturbances in the recording track pattern on the magnetic tape 11 can be minimized. It is possible to keep it to a minimum.

Next, a specific example of the configuration and operation of the read clock generator 8 will be explained with reference to FIG. In FIG. 2, 21 is a reference pulse input terminal, 22 is a phase comparator, 23 is a reduced pass filter, 24 is an adder, 25 is a voltage controlled oscillator, 26
2 is a frequency divider, 27 is a speed information input terminal into which information corresponding to fluctuations in rotation of the rotary cylinder is input, and 28 is a readout clock output terminal.

In FIG. 2, the portion excluding the adder 24 constitutes a very simple PLL (phase locked loop) and serves as a multiplier. That is, the phase comparator 22 compares a signal obtained by frequency-dividing the output of the voltage controlled oscillator 25 with the frequency divider 26 with the phase of the reference pulse input from the reference pulse input terminal 21 . After the phase error component that is the output passes through the reduced pass filter 23, it is fed back to the voltage controlled oscillator 25, whereby the two input signals of the phase comparator 22 are phase-locked, and when the result, the voltage controlled oscillator 25 outputs The signal will be locked to the reference pulse and multiplied by the same multiple as the frequency division number determined by the divider 26.

In this embodiment, an adder 24 is provided in front of the voltage controlled oscillator 25 of the PLL, and a speed information signal representing the fluctuation in the rotational speed of the rotating cylinder 12 from the servo is inputted from the speed information input terminal 27. It is added to the PLL. When there is no fluctuation in the rotational speed of the rotating cylinder 12 and a constant DC voltage is applied to the speed information input terminal 27, the voltage controlled oscillator 25 oscillates a clock with a constant frequency, and the clock is activated by the action of the PLL. The reference pulse is multiplied. Next, the rotating cylinder 12
When the DC voltage applied to the speed information input terminal 27 changes due to disturbance≠turret, the frequency of the output of the voltage controlled oscillator 25 changes accordingly. Here, the fault layer wave number of the low-pass convolution filter 23 is set to be sufficiently lower than the spectrum included in the speed information signal (if set, the PL
Since L does not follow the speed information signal, the voltage controlled oscillator 2
The output frequency of 5 will follow the changes in the speed information signal without being immediately synchronized to the reference pulse. Therefore, by appropriately selecting the addition ratio of the adder 24 and the control sensitivity of the voltage controlled oscillator 25, it is possible to suppress disturbances in the recording track pattern. Furthermore, in the long run, the output clock of the voltage controlled oscillator 25 is locked to the reference pulse due to the PLL effect, and the average frequency of the output is multiplied by the reference pulse frequency. There is no accumulation of input/output time differences,
It can be seen that the clock generator is suitable for the present invention. The above is an explanation of the configuration and operation of the read clock generator 8.

Since the other write clock generator only needs to multiply the reference pulse, it is sufficient to adopt a configuration in which the adder 24 is removed from the read clock generator 8.

The above is an explanation of the operation of one embodiment of the present invention.

To realize the present invention, the present invention is not limited to the above-described embodiments, and the clock frequency may be changed on the writing side, and the A/D converter 2 that performs time axis correction may
, the memory 3, and the D/A converter 4 may be placed between the recording signal processing circuit 9 and the recording amplifier 10, and it goes without saying that they can be freely modified within the scope of the claims. .

[Effects of the Invention] The present invention uses an A/D converter to convert a video signal output from a camera into a digital signal, and then uses a memory to convert the video signal into a digital signal according to fluctuations in the rotation of a rotating cylinder. Time base correction is applied to reduce disturbances in the track pattern written on the magnetic tape, and a D/A converter is used to convert it into an analog signal, so there is no rotational fluctuation in the rotating cylinder. However, the effect is that the video signal written on the magnetic tape is not affected by it.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a camera-integrated VTR showing an embodiment of the present invention, and FIG. 2 is a block diagram of a camera-integrated VTR shown in FIG.
FIG. 2 is a block diagram showing one embodiment of a clock generator used in the TR. 1... Camera, 2... A/D converter,
3...Memory, 4...D/A converter,
5...Write address counter, 6...
... Read address counter, 7 ... Write clock generator, 8 ... Read clock generator, 9 ... Record signal processing circuit, 10 ...
... Recording amplifier, 11 ... Magnetic tape, 12.
... Rotating cylinder, 13 ... Magnetic head pair, 14 ... Motor, 15 ... Rotation phase detector, 16 ... Frequency generator , 17...
... Motor drive circuit, 18 ... Frequency-voltage converter, 19 ... Phase control circuit, 20° low-pass filter, 25 ... Voltage control oscillator, 26 ...・
・Frequency divider.

Claims (1)

[Claims] 1. The video signal output from the camera is converted into a digital signal using an A/D converter, and then the magnetic A camera-integrated VTR characterized in that time axis correction is applied to reduce disturbances in the track pattern written on the tape, and the signal is further converted into an analog signal using a D/A converter. 2. In order to add time axis correction, the memory write and read address counters are counted by the clock of another clock generator, and the clock frequency of either one is determined by the rotating cylinder output from the servo circuit of the VTR section. 2. A camera-integrated VTR according to claim 1, wherein the change is made based on information corresponding to fluctuations in rotation of the camera. 3. A clock generator is configured by providing a frequency divider between the phase comparator of the PLL (phase-locked loop) and the voltage-controlled oscillator, and an adder on the input side of the voltage-controlled oscillator. 3. The camera-integrated VTR according to claim 2, wherein the clock frequency is made variable by adding information corresponding to the adder to the adder.