JPS62239687A - Time base correcting device - Google Patents

Abstract

PURPOSE:To always obtain a stable reproducing picture by using a stable horizontal synchronizing signal with high accuracy and correcting the delay time of the input video signal in response to the result of phase comaprison with a horizontal synchronizing signal including the time fluctuation. CONSTITUTION:The output of the 2nd voltage controlled oscillator 18 is used as the external clock of a horizontal synchronizing signal generating circuit 14 to change the reference horizontal synchronizing period in response to the speed. A phase comparator 15 applies phase comparison between the reference horizontal synchronizing signal generated by the circuit 14 and the horizontal synchronizing signal inputted externally while receiving time base fluctuation and the phase error is outputted as an error voltage by using a sample holding circuit. The 1st voltage controlled oscillator 16 oscillates a frequency in response to the output voltage of the variable delay line 11 and the video signal inputted to the variable delay line 11 is outputted as a stable signal whose time base is corrected.

Description

[Detailed Description of the Invention] [Field of Industrial Application] This invention reduces distortion that occurs during so-called special playback, which is played back at a speed other than normal playback in a helical scan video tape recorder (hereinafter referred to as VTR). The present invention relates to a time axis correction device.

[Conventional technology]

FIG. 3 is a diagram showing the installation arrangement of the video head.
four 5P-R', BP-R, 5P-L', BP
-L video heads 1a to 1d are fixed to the rotating drum 10 in the arrangement shown in the figure for the purpose of reducing noise during special playback. The two heads 1a and 1d (or lb, IC) arranged close to each other have opposite azimuth angles.

FIG. 4 shows a block diagram of the reproduction system. 2a-2d
are bed amplifiers provided corresponding to the respective heads 18 to 1d, and the output of each head 18 to 1d is sent to the head amplifier 2a through a rotary transformer (not shown).
~2d is input.

The reproduced output is amplified by these head amplifiers 2a to 2d and then sent to the first switch circuit 3a.

3b and the second switch circuit 4, is FM demodulated by the demodulation circuit 6, and is output to the output terminal 9.

The first switch circuits 3a, 3b are switched by a drum flip-flop pulse 5 indicating which side of the head is in contact with the tape.

Further, the comparator 7 compares the amplitudes of the outputs of adjacent heads having opposite azimuth angles, and the control circuit 8 receives this comparison result and controls the second switch circuit 4 so as to select the head with the larger output. Switch and control.

Next, the noise reduction operation will be explained using fast-forward playback in the standard mode of the VH3 system as an example.

5P-L' head 1 whose track trajectory is shown in FIG.
c is LO') rank as the starting point and traced as shown in the figure. At this time, the first switch 3a is switched to the head amplifier 2C side by the pulse 5, and the switch 3b is also switched to the amplifier 2b side corresponding to the head 1b adjacent to the head IC. In this state, the head lb is L.
Even if the O' track is traced, there is no output because the azimuth angle is reversed, so the second switch circuit 4 is switched to the switch 3a side by the comparator 7 and the control circuit 8. Then to 5P-L', throat IC is RO'
When the track is applied, contrary to the above, the output of the head amplifier 2c disappears, the output of the IEP-R head Ib becomes thick (the second switch circuit 4 is switched to the switch 3b side).

By switching between adjacent heads with opposite azimuth angles in this manner, it is possible to remove noise that occurs when tracing tracks with different azimuth angles.

[Problem that the invention seeks to solve]

However, conventional VTRs have a drawback in that when switching between adjacent edges, the horizontal synchronizing signal interval becomes discontinuous due to a shift in the head position, resulting in skew distortion in the reproduced picture.

To explain this with reference to Fig. 6, when the HP-R head is at the horizontal synchronization signal position of the R' azimuth trunk as shown in the figure, the 5P-L' head is located 15 μm from the lower end of both heads. 2H interval (740 μl 1
1), the position is 2.9 μm behind the horizontal synchronizing signal position of the L' azimuth trunk.

This corresponds to approximately 0.5 μs in time, and the synchronization signal becomes discontinuous at the time of head switching, disrupting the synchronization of the monitor television, resulting in so-called skew distortion.

In addition, in the case of intermittent slow playback of conventional VTRs, stop-
Because the driving is performed by powering (accelerating) - driving (constant running) - braking (decelerating) - stopping, the speed of the capstan motor changes as shown in Figure 2, and the frequency of horizontal synchronization changes greatly, causing the monitor TV to change. The drawback was that it appeared as tremors.

This invention was made to solve the above-mentioned problems, and its purpose is to provide a time axis correction device that reduces skew distortion and fluctuations that occur during special playback such as fast forwarding, rewinding, and slow playback. do.

[Means for solving problems]

The time base correction device according to the present invention includes a horizontal synchronization signal separation circuit that separates a horizontal synchronization signal from a composite video signal including time base fluctuations, and a reference horizontal synchronization signal whose generation period is controlled by the frequency of a control clock. a voltage controlled oscillator that outputs a clock having a frequency corresponding to the speed of the recording medium as a control clock for the synchronization signal generation circuit; and the separated horizontal synchronization signal and the reference horizontal synchronization signal. a phase comparator that compares the phases of and outputs an error voltage; a voltage controlled oscillator that generates a clock with a frequency corresponding to the error voltage; A variable delay line is provided.

[Effect]

In this invention, a phase comparison is performed between a horizontal synchronization signal that includes time axis fluctuations and a reference horizontal synchronization signal whose generation cycle is controlled according to the speed of the recording medium, and an error voltage is output according to the comparison result. A clock with a frequency corresponding to the error voltage is supplied to the variable delay line as a clock for delay time control, thereby delaying the composite video signal by a time corresponding to the time axis fluctuation, fast forwarding, rewinding two times, and slowing down the composite video signal. To reduce skew distortion and vibration that occur during special playback such as playback.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows a block configuration diagram of a time axis correction device according to an embodiment of the present invention. In the figure, reference numeral 11 indicates that the delay time of an input signal such as a video signal can be arbitrarily changed depending on the frequency of an input control clock. A variable delay line is possible. Reference numeral 12 denotes a horizontal synchronization separation circuit that extracts only the horizontal synchronization signal from the composite video signal input to the variable delay line 11; reference numeral 13 inputs the horizontal synchronization signal separated by the synchronization separation circuit 12, and uses the input horizontal synchronization signal. 14 is a horizontal synchronizing signal generator, and the pulse generated by the pulse generator 13 resets the generation of the horizontal synchronizing signal.

The horizontal synchronizing signal has a function of changing the period of the horizontal synchronizing signal by adjusting the frequency of the clock input from the outside. 15 compares the phase of the standard horizontal synchronization signal generated by the horizontal synchronization signal generator 14 with the horizontal synchronization signal of the input video signal separated by the horizontal synchronization separation circuit 12, and calculates an error voltage according to the phase error. This is a phase comparator circuit (including a sample hold circuit) that outputs an output through a sample hold circuit (not shown). 16 is phase comparison circuit 1
The variable delay line 1 is a first voltage controlled oscillator that changes the oscillation frequency based on the error voltage output from the voltage controlled oscillator 16.
The delay time of 1 is variable. Further, 7 is a frequency-voltage (f-V) conversion circuit, which generates a voltage in accordance with the frequency of the CP-FG flaw signal representing the speed of the capstan of the VTR. 18 is f-V conversion circuit 1
Horizontal synchronization signal generation circuit 14 by the voltage output from 7
This is a second voltage controlled oscillator that generates a clock of a predetermined frequency that changes the period of the oscillator.

Next, the operation will be explained.

The input composite video signal is input to the horizontal synchronization separation circuit 12 and divided into two by the separation circuit 12.

One of them is input to the pulse generation circuit 13. This pulse generation circuit 13 applies a gate to this synchronization signal at a certain timing determined externally, and generates a pulse at a predetermined timing and time.

This predetermined timing is the timing to reset the signal generation of the synchronization signal generation "a14," and the reset timing is such that the reset timing is set before the phase error of the phase comparison circuit 15 accumulates and exceeds the dynamic range of the phase comparison. It must be done during the blanking interval, which is the vertical synchronization signal interval.Therefore, after the vertical synchronization signal, a reset pulse can be generated for several H periods, but due to interlacing, /2
Since H occurs, it is only necessary to reset every two fields. The horizontal synchronization signal generator 14 has the function of being able to be reset by the reset pulse as described above, and the function of being able to change the period of horizontal synchronization by an external clock of a predetermined frequency. This external clock is, for example, VT
In the case of R, the frequency changes depending on the tape running speed, and this is done by converting the frequency of the FC signal of the capstan motor into a voltage by the r-v conversion circuit 17, that is, converting the speed tn information into a voltage. Then, the oscillation frequency of the second voltage controlled oscillator 18 is changed depending on the voltage. The output of the second voltage controlled oscillator 18 is used as an external clock for the horizontal synchronization signal generation circuit 14, and the reference horizontal synchronization period is changed according to the speed. The phase comparison circuit 15 compares the phase of the reference horizontal synchronization signal generated by the horizontal synchronization signal generation circuit 14 and the horizontal synchronization signal inputted from the outside in response to time axis fluctuations, and the phase error is detected by the sample and hold circuit. is used to output it as an error voltage. 1st
The voltage controlled oscillator 16 oscillates a frequency according to the output voltage of the phase comparator 15, and uses this clock to control the variable delay line 1.
1, thereby changing the delay time of the variable delay line 11.
The input video signal is output as a stable signal whose time axis has been corrected.

As described above, in this embodiment, the input horizontal synchronization signal is compared with the reference horizontal synchronization signal, and the input video signal is delayed by a predetermined time using the variable delay line whose delay time is controlled based on the comparison result. Skinny distortion at the time of head switching can be corrected. Furthermore, since the cycle of the reference horizontal synchronizing signal is changed in accordance with the tape running speed, screen shaking can be prevented even during intermittent running (slow) playback.

〔Effect of the invention〕

As described above, according to the present invention, a stable and highly accurate horizontal synchronization signal is used, a phase comparison is performed between this signal and a horizontal synchronization signal including time axis fluctuations that is input to the device, and the phase is compared based on the comparison result. Since the delay time of the input video signal is corrected using a simple configuration, a high time axis correction of 11 degrees can be achieved with a simple configuration.Furthermore, since the period of the reference horizontal synchronization signal is controlled by tape speed information, Shaking during slow playback can be corrected, and this has the effect of always providing stable playback images.

[Brief explanation of drawings]

FIG. 1 is a block configuration diagram of a time axis correction device according to an embodiment of the present invention, FIG. 2 is a diagram showing speed changes during slow playback, FIG. 3 is a diagram showing how the video head is attached, and FIG. 4
5 is a block diagram showing the reproduction system of a VTR, FIG. 5 is a diagram showing the relationship between the head and the trunk when special reproduction is performed, and FIG. 6 is a diagram for explaining the occurrence of skew distortion. DESCRIPTION OF SYMBOLS 11... Variable delay line, 12... Horizontal synchronization signal separation circuit, 13... Pulse generation circuit, 14... Horizontal synchronization signal generation circuit, 15... Phase comparison circuit, 16... First
voltage controlled oscillator, 17... frequency-voltage conversion circuit,
18...Second voltage controlled oscillator. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (1)

[Claims] (1) A variable delay circuit into which a composite video signal having time axis variation is input and whose signal delay time can be controlled by the frequency of a control clock supplied from the outside, and the composite video signal input to this variable delay circuit. A horizontal synchronizing signal separation circuit that separates a horizontal synchronizing signal, a pulse generating circuit that generates a pulse at a predetermined timing using the separated horizontal synchronizing signal, and a pulse generation circuit that uses the separated horizontal synchronizing signal to generate a pulse at a predetermined timing. a synchronization signal generation circuit capable of generating a controlled reference horizontal synchronization signal and resetting the generation timing of the reference horizontal synchronization signal by a pulse from the pulse generation circuit; and a horizontal synchronization signal separated by the horizontal synchronization signal separation circuit. and the reference horizontal synchronization signal, and outputs the phase error as an error voltage; and a first phase comparison circuit that outputs a clock having a frequency corresponding to the error voltage as a control clock for the variable delay circuit. a voltage-controlled oscillator circuit; a frequency-voltage conversion circuit that generates a voltage according to the speed information of the recording medium on which the input video signal is recorded; and a clock whose frequency corresponds to the output voltage of the conversion circuit. A second clock output as a control clock for the synchronization signal generation circuit.
A time axis correction device comprising a voltage controlled oscillator.