JPS62239685A - Time base correcting device - Google Patents

Abstract

PURPOSE:To correct the time base of a video signal while highly accurately phase comparison is applied by separating a horizontal/vertical synchronizing signal from an input video signal, generating a reference horizontal synchronizing signal from the vertical synchronizing signal and applying phase comparison of it with the horizontal syncronizing signal separated from the input video signal so as to apply time base correction of the inputted video signal. CONSTITUTION:A composite video signal (a) is inputted to a synchronizing separator circuit 12, at first the horizontal synchronizing signal is separated, the vertical synchronizing signal is separated from the output (b), the vertical synchronizing signal outputted from the circuit 12 is waveform-shaped to obtain a signal (c). Then the signal (c) is inputted to a high speed multiple circuit 13 to generate a reference horizoontal synchronizing signal (e) of nearly 15734Hz from the vertical synchronizing signal (d) of nearly 30Hz. The reference horizontal synchronizing signal (e) and the horizontal signal (b) outputted from the circuit 12 are subjected to 1/2H keller to separate the synchronizing signal, and the result is phase comaprison by a phase comparator 14, and an error voltage in response to the phase error is outputted via a sample holding circuit. Then a voltage controlled oscillator 15 oscillates a clock having a frequency in response to the error voltage.

Description

[Detailed Description of the Invention] [Industrial Application Field] This invention reduces distortion that occurs during so-called special playback, which is played back at a speed other than normal playback in a helical scan video tape recorder (hereinafter referred to as VTR). The present invention relates to a time axis correction device.

(Prior art) Figure 3 is a diagram showing the mounting position of the video head.
4 5P-R', EP-R, 5P-L',
For the purpose of reducing noise during special playback, the EP-L video controllers 1a to 1d have rotating drums 1 arranged as shown in the figure.
Fixed to 0. The two healds la and ld (or lb and IC) arranged close to each other have opposite azimuth angles.

FIG. 4 shows a block diagram of the reproduction system. 2a-2d
are head amplifiers provided corresponding to the heads 18 to 1d, respectively, and the output of each head 1a to 1d is sent to the head amplifier 2a through a rotary transformer (not shown).
~2d is input.

The reproduced output is amplified by these head amplifiers 2a to 2d and then sent to the first switch circuit 3a.

3b and the second switch circuit 4, is FM demodulated by the demodulation circuit 6, and is output to the output terminal 9.

The first switch circuits 3a, 3b are switched by a drum flip-flop pulse 5 indicating which side of the head is in contact with the tape.

Further, the comparator 7 compares the amplitudes of the outputs of adjacent heads having opposite azimuth angles, and the control circuit 8 receives this comparison result and controls the second switch circuit 4 so as to select the head with the larger output. Switch and control.

Next, the noise reduction operation will be explained using fast-forward playback in the standard mode of the VH3 system as an example.

Figure 5 shows the track trajectory. It is assumed that the 5P-L' head IC traces the L1' track as the starting point as shown in the figure. At this time, the first switch 3a is switched to the head amplifier 2c side by the pulse 5, and the switch 3b is also switched to the amplifier 2b side corresponding to the head 1b adjacent to the head IC. In this state, the head 1b is at L.
Even if the 1' trunk is traced, there is no output because the azimuth angle is reversed (therefore, the second switch circuit 4 is switched to the switch 3a side by the comparator 7 and the control circuit 8. Then, the 5P-L' head IC is R1'
When the track is applied, contrary to the above, the output of the head amplifier 2c disappears, the output of the EP-R bend 1b increases, and the second switch circuit 4 is switched to the switch 3b side.

By switching between adjacent heads with opposite azimuth angles in this manner, it is possible to remove noise that occurs when tracing tracks with different azimuth angles.

[Problem that the invention seeks to solve]

However, conventional VTRs have a drawback in that when switching between adjacent edges, the horizontal synchronizing signal interval becomes discontinuous due to a shift in the head position, resulting in skew distortion in the reproduced picture.

To explain this using Fig. 6, as shown in the figure, the
When the throat is at the horizontal synchronization signal position of the R' azimuth track, the 5P-L' head is spaced 2H apart (740μ1) with both heads 15μl from the bottom end of the head.
1), the position is 2.9 μm behind the horizontal synchronizing signal position of the L' azimuth track.

This corresponds to approximately 0.5 degrees in time, and the synchronization signal becomes discontinuous at the time of head switching, disrupting the synchronization of the monitor television, resulting in so-called skew distortion.

The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a time axis correction device that reduces skew distortion that occurs during special playback such as fast-forward and S-reverse playback.

[Means for solving problems]

The time axis correction device according to the present invention includes: a variable delay circuit that delays a composite video signal including time axis fluctuations by a predetermined time; a horizontal and vertical synchronization signal separation circuit that extracts horizontal and vertical synchronization signals from the signal; a high-speed multiplier circuit that generates a reference horizontal synchronization signal by multiplying the vertical synchronization signal, and a phase comparator that performs a phase comparison between the separated horizontal synchronization signal and the reference horizontal synchronization signal and outputs an error voltage; A voltage controlled oscillator is provided which generates a clock having a frequency corresponding to the error voltage and supplies the clock as a control clock for the variable delay line.

[Effect]

In this invention, horizontal control is performed from a human-powered video signal.

extracting a vertical synchronization signal, multiplying the extracted vertical synchronization signal to create a reference horizontal synchronization signal, and comparing the phase of the horizontal synchronization signal including time axis fluctuation with the reference horizontal synchronization signal,
A clock with a frequency corresponding to the comparison result is supplied to the variable delay line as a clock for delay time control, thereby delaying the composite video signal by a time corresponding to the time axis fluctuation, thereby correcting the time axis fluctuation.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows a block configuration diagram of a time axis correction device according to an embodiment of the present invention, in which 1) is a variable delay line whose delay time of an input video signal can be changed by an external clock frequency; A sync separation circuit extracts a horizontal sync signal and a vertical sync signal from a signal; 13 is a sync separation circuit I;
14 is a high-speed multiplier circuit that multiplies the vertical synchronization signal separated by 2 to generate a reference horizontal synchronization signal; 14 is a reference horizontal synchronization signal generated by this high-speed multiplier circuit 13 and a horizontal synchronization signal extracted from the synchronization separation circuit 12; A phase comparison circuit 15 oscillates a clock having a frequency corresponding to the error voltage from the phase comparison circuit 14, and transmits the clock to the variable delay line 1. ) is a voltage controlled oscillator used as an external clock.

Next, the operation will be explained using the timing chart shown in FIG.

The input composite video signal is input to the synchronization separation circuit 12 (see Fig. 5 (al)), which first separates the horizontal synchronization signal (see Fig. 5 (b)), and then separates the horizontal synchronization signal from the output. Vertical synchronization separation is performed.Then, the vertical synchronization signal outputted from this separation circuit 12 is waveform-shaped to obtain a signal as shown in FIG.
3, where approximately 3 O as shown in Figure 5(d)
From the vertical synchronization signal of fiz, approximately 1 as shown in the same figure (el)
Generates a reference horizontal synchronization signal of 5734Hz. The phase comparison circuit 14 compares the phases of this reference horizontal synchronization signal and the horizontal synchronization pulse, which is obtained by performing 1/2H killing of the horizontal synchronization signal outputted from the synchronization separation circuit 12 to separate the vertical synchronization signal. An error voltage corresponding to the error is output via a sample and hold circuit. and voltage controlled oscillator 15
oscillates a clock with a frequency corresponding to this error voltage.

In this way, if the output from the voltage controlled oscillator 15 is used to control the external clock of the variable delay line 1) and the amount of delay of the input video signal is varied, the input video signal can be stabilized with time axis correction. Obtained as a video.

〔Effect of the invention〕

As described above, according to the present invention, horizontal and vertical synchronization signals are separated from a human-powered video signal, a reference horizontal synchronization signal is generated from the vertical synchronization signal, and this and a horizontal synchronization signal separated from the input video signal are Since the phase comparison is performed to correct the time axis of the input video signal, there is an effect that the time axis of the video signal can be corrected by performing highly accurate phase comparison.

[Brief explanation of drawings]

FIG. 1 is a block configuration diagram of a time axis correction device according to an embodiment of the present invention, FIG. 2 is a signal waveform diagram for explaining its operation, and FIG. 3 is a diagram showing the arrangement of a video head.
Figure 4 is a block diagram showing the playback system of a VTR, Figure 5 is a diagram showing the relationship between the head and track when performing special playback, and Figure 6 is a diagram for explaining the occurrence of skew distortion. . 1)...Variable delay line, 12...Synchronization signal separation circuit,
13... High-speed multiplier circuit, 14... Phase comparison circuit, 1
5...Voltage controlled oscillator. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (1)

[Claims] (1) A variable delay circuit into which a composite video signal having time axis fluctuations is input and which can control the delay time of the signal according to the frequency of a control clock supplied from the outside; and the composite video input to the variable delay circuit. a horizontal and vertical synchronization signal separation circuit that extracts horizontal and vertical synchronization signals from the signal; a high-speed multiplier circuit that multiplies the separated vertical synchronization signal to generate a reference horizontal synchronization signal; , a phase comparison circuit that compares the phase of the horizontal synchronization signal extracted by the vertical synchronization signal separation circuit and outputs the phase error as an error voltage, and a clock with a frequency corresponding to the error voltage for controlling the variable delay circuit. A time axis correction device characterized by comprising a voltage controlled oscillation circuit outputting as a clock.