JPH0419571B2 - - Google Patents

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Publication number
JPH0419571B2
JPH0419571B2 JP60226812A JP22681285A JPH0419571B2 JP H0419571 B2 JPH0419571 B2 JP H0419571B2 JP 60226812 A JP60226812 A JP 60226812A JP 22681285 A JP22681285 A JP 22681285A JP H0419571 B2 JPH0419571 B2 JP H0419571B2
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JP
Japan
Prior art keywords
dividend
updated
divisor
update
exponent part
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP60226812A
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Japanese (ja)
Other versions
JPS6286434A (en
Inventor
Masao Iida
Toshio Jufuku
Akira Nomura
Giichi Mori
Masaki Kobayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
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Priority to JP60226812A priority Critical patent/JPS6286434A/en
Publication of JPS6286434A publication Critical patent/JPS6286434A/en
Publication of JPH0419571B2 publication Critical patent/JPH0419571B2/ja
Granted legal-status Critical Current

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Description

【発明の詳細な説明】[Detailed description of the invention]

(産業上の利用分野) 本発明は除算方式に関し、更に詳細には、浮動
小数点演算形式の乗算回路及び算術演算回路を備
えた除算装置における収束型除算方式に関する。 (従来の技術) コンピユータによる除算方式として収束型除算
方式がある。この方式は乗算的除算方式に分類さ
れ、乗算と論理が共有できかつ高速化が可能であ
るので大形コンピユータにおいても採用されてい
る。その原理は簡単に述べると、被除数と除数を
少数の分子と分母とみなし、分数の分母が1に近
づくまで分子と分母に同じ収束係数を乗じてい
き、最終的な分子を、求める商とするものであ
る。この方式は例えばカイ ワング(Kai
Wang)著、堀越彌他訳「コンピユータの高速演
算方式」近代科学者(昭和55年9月1日)p.251
〜254に示されている。 上記文献に示されている従来の収束型除算方式
について第3図の演算ブロツク図を用いて説明す
る。ここでは、正規化されている正の数N0とD0
とをそれぞれ被除数及び除数として除数値Qx
求めるものとする。N0、D0は例えば2進数表現
では0.5≦1、N0<0.5≦D0<1となる。Qx、N0
D0の関係は式(1)で表される。 Qx=N0/D0 ……(1) 先ず、収束係数の初期値R0を次の式(2)より求
める(ステツプ)。 R0=1−D0……(2) 次に、初期値R0を用いて被除数N0と除数D0
第1回目の更新を行なう(ステツプ、)。こ
こで被除数及び除数の更新の基本式をそれぞれ
(3)式及び(4)式に示す。なお、Niは第i回目の更
新の被除数、Diは第i回目の更新の除数、Riは第
i回目の更新の収束係数、i=0、1、…とす
る。 Ni・Ri+Ni→Ni+1 ……(3) Di・Ri+Di→Di+1 ……(4) 今i=0であるので、第1回目の更新の被除数
N1及び除数D1が(3)式及び(4)式に基づいて求めら
れる。すなわちN0・R0+N0よりN1が、D0・R0
+D0よりD1がそれぞれ積和演算により求められ
る。次に、収束係数の第1回目の更新を行なう
(ステツプ)。ここで収束係数の更新の基本式を
(5)式に示す。 1−Di+1→Ri+1 ……(5) 第1回目の更新の被除数N1、除数D1、収束係
数R1が求まると、これらの値を用いて(3)、(4)、
(5)の各式に基づき第2回目の更新の被除数N2
除数D2、収束係数R2を求める(ステツプ→
→→→)。そしてこのような被除数及び除
数の更新演算と収束係数の更新演算を、除数の更
新値Di+1が該積和演算に用いる乗算装置の精度内
でDi+1となるまで続け(ステツプ→→→
→のルーチン)、Ni+1→1となつたときの〔(1)
式の分子更新値〕を商とすることにより除算を完
了させていた(ステツプ)。 (発明が解決しようとする問題点) しかしながら、以上述べた従来の収束型除算方
式では、除数の更新値Di+1が定数1に等しいか否
かの判定を行なう場合に、演算装置の精度が有限
であるため、Di+1=1+ΔQ(ΔQは判定誤差)に
基づいて判定を行なつていた。ところが判定誤差
ΔQは入力データによつて異なり、更新演算回数
iが一定しないという問題点があつた。また、最
終的に求める商は、被除数の更新値に相当するの
に対して、更新演算が被除数、除数及び収束係数
という3種類もあり、演算ステツプが増大し、演
算時間が増えるという欠点があつた。 従つて、本発明は以上述べた従来の収束型除算
方式における演算回数が一定しないという問題点
と、演算ステツプ数が多いという欠点を除去し、
入力のデータ幅から定まる最小限の演算ステツプ
数で除算を行なう収束型除算方式を提供すること
を目的とする。 (問題点を解決するための手段) 本発明は、浮動小数点表示のデータの乗算を行
なう乗算回路と、浮動小数点表示のデータの加減
算を行なう算術演算回路とを備え、浮動小数点表
示された除数(B0)及び被除数(A0)を用いて
除算を行なう除算装置における除算方式に係るも
ので、前記従来技術の問題点を解決するために、
次の4つのステツプを具備するように構成した。 第1のステツプでは、被除数(A0)の指数部
から除数(B0)の指数部を演算して、被除数
(A0)の指数部のみを更新した被除数(A0′)を
求めるとともに、除数(B0)の指数部のみをリ
セツト更新した除数(B0′)を求める。 第2のステツプでは、該指数部のみを更新した
被除数(A0′)に定数を乗算して更新被除数
(A0″)を求め、該指数部のみを更新した除数
(B0′)に定数を乗算した後、さらに他の定数から
減算を行なつたもの(1−4/3B0′)を収束係数の
初期値(X0)とする。 第3のステツプでは、除数(B0)または被除
数(A0)の仮数部のデータ語長に基づいて、次
の第4のステツプで実行される更新演算の回数
(m)を求める。 第4のステツプでは、前記第2のステツプで更
新した被除数(A0″)に対してm回の更新演算が
逐次施され、、最終的に得られた更新被除数(Am
=Am-1・Sm-1+Am-1)を商とする。この第4の
ステツプで行なわれるm回の更新演算のうち、第
1回目の更新演算は、前記第2のステツプで更新
した被除数(A0″)と収束係数の初期値(S0)と
の乗算による積(A0″S0)と、該更新被除数
(A0″)とを加算した和(A0″S0+A0″)を第1回
目の更新被除数(A1)とする。 第2回目以降は、例えば、第i番目の更新演算
では、直前回の更新演算より求めた更新被除数
(Ai-1)と直前回の収束係数(Si-1)を自乗した
収束係数(Si-1=Si-2 2)との乗算による(Ai-1
Si-1)と、直前回の更新演算により求めた更新被除
数(Ai-1)とを加算した和(Ai-1・Si-1+Ai-1)
を新たな更新被除数(Ai)として求める。 (作用) 第1のステツプの処理により、指数部の処理を
終了させているので、以後は、浮動小数点データ
での計算処理であるが、従来の固定小数点処理が
仮数部処理に適用できる。 第2のステツプでは、除数の仮数部値域を原点
対称となるように変数変換を行なつており、収束
演算回数が必要最低限におさえられる。 第3のステツプでは、第2ステツプで更新され
た被除数に対して逐次行なわれる更新演算の回数
が求められるが、この回数が除数または被除数の
仮数部データ語長より求めることができるので、
従来方式のように、除数の更新演算を逐次行なつ
てその都度それが定数1に等しいかどうかの判定
をすることが不要になるとともに除数の更新値を
求める手順自体が省略できるようになる。 第4のステツプでは、第2ステツプで更新され
た被除数に対して、第3のステツプにより求めた
回数だけの更新演算を行なうだけで、求めるべき
商が得られることにより、演算ステツプ数を低減
できるとともに演算時間の短縮が可能となる。 (実施例) 以下本発明の実施例の除算方式を第1図及び第
2図を参照して説明する。第1図は基本的演算内
容を示すブロツク図であり、第2図は本実施例の
演算で使用される浮動小数点表示のデータ形式を
示す図である。 ここでは、浮動小数点表示で正規化されている
データA0とB0をそれぞれ被除数及び除数として
除算値QFを求めるものとする。但しB0>0とす
る。A0、B0、QFの関係は式(6)で表される。 QF=A0/B0 ……(6) 本実施例の除算演算の原理は収束型アルゴリズ
ムに基づくものであり、先ずその基本的演算内容
の概要について述べる。本実施例の除算演算では
最初に指数部の処理を行なう。すなわち、被除数
A0の指数部から除数B0の指数部を演算して被除
数A0の指数部のみを更新した更新値A0′を求め、
該減算後、除数B0の指数部のみをリセツトした
更新値B0′を求める。その後、更新された除数と
被除数の仮数部に対する値域の変換を一次式で行
ない(A0″、B0″)、以後の収束演算の収束回数を
早める該変換処理を受けた除数B0″の逆数漸近値
を乗算する係数として被除数A0″に逐次乗算し、
被除数の更新演算を所定回数繰返し、最終の被除
数の更新値を商とする。ここで、実行される更新
演算の回数は、除数B0″に上記乗算する係数をそ
の回数分逐次乗算すると、乗算結果→1となるよ
うに設定するものである。 上記更新演算の必要最低限の回数の求め方を以
下に述べる。まず、式(6)の演算に対して、次の無
限乗積による変換公式(式(7))を適用することを
考える。
(Industrial Application Field) The present invention relates to a division method, and more particularly to a convergent division method in a division device equipped with a floating-point arithmetic multiplication circuit and an arithmetic operation circuit. (Prior Art) There is a convergent division method as a division method by a computer. This method is classified as a multiplicative division method, and is also used in large-sized computers because it can share logic with multiplication and can increase speed. Simply put, the principle is to treat the dividend and divisor as the numerator and denominator of a small number, multiply the numerator and denominator by the same convergence coefficient until the denominator of the fraction approaches 1, and then use the final numerator as the desired quotient. It is something. This method is used, for example, by Kai Wang.
Wang), translated by Yasushi Horikoshi et al., “High-speed calculation method for computers”, Modern Scientist (September 1, 1980), p. 251
~254. The conventional convergent division method shown in the above-mentioned literature will be explained using the calculation block diagram shown in FIG. Here, the positive numbers N 0 and D 0 are normalized
Let us calculate the divisor value Q x with and as the dividend and divisor, respectively. N 0 and D 0 are, for example, 0.5≦1 in binary representation, and N 0 <0.5≦D 0 <1. Q x , N 0 ,
The relationship of D 0 is expressed by equation (1). Q x = N 0 /D 0 ...(1) First, the initial value R 0 of the convergence coefficient is found from the following equation (2) (step). R 0 =1−D 0 (2) Next, the dividend N 0 and the divisor D 0 are updated for the first time using the initial value R 0 (step). Here, the basic formulas for updating the dividend and divisor are respectively
This is shown in equations (3) and (4). Note that N i is the dividend of the i-th update, D i is the divisor of the i-th update, R i is the convergence coefficient of the i-th update, and i=0, 1, . . . . N i・R i +N i →N i+1 ...(3) D i・R i +D i →D i+1 ...(4) Since i=0 now, the dividend of the first update
N 1 and divisor D 1 are obtained based on equations (3) and (4). In other words, from N 0・R 0 +N 0 , N 1 becomes D 0・R 0
D 1 is obtained from +D 0 by a product-sum operation. Next, the convergence coefficient is updated for the first time (step). Here, the basic formula for updating the convergence coefficient is
It is shown in equation (5). 1−D i+1 →R i+1 ...(5) Once the dividend N 1 , divisor D 1 , and convergence coefficient R 1 for the first update are determined, using these values, (3), (4 ),
Based on each formula (5), the dividend number N 2 of the second update,
Find the divisor D 2 and the convergence coefficient R 2 (step →
→→→). Then, such updating calculations of the dividend and divisor and updating calculations of the convergence coefficient are continued until the updated value D i+1 of the divisor becomes D i+1 within the precision of the multiplication device used for the product-sum calculation (step → →→
→ routine), when N i+1 →1 [(1)
The division was completed by using the updated value of the numerator of the equation as the quotient (step). (Problem to be Solved by the Invention) However, in the conventional convergent division method described above, when determining whether the updated value D i+1 of the divisor is equal to the constant 1, the accuracy of the arithmetic unit is is finite, so the determination was made based on D i+1 =1+ΔQ (ΔQ is the determination error). However, the determination error ΔQ differs depending on the input data, and there is a problem that the number of update operations i is not constant. Furthermore, while the final quotient corresponds to the updated value of the dividend, there are three types of update operations: the dividend, the divisor, and the convergence coefficient, which has the drawback of increasing the number of calculation steps and the calculation time. Ta. Therefore, the present invention eliminates the problem that the number of operations is not constant and the disadvantage that the number of operation steps is large in the conventional convergent division method described above,
It is an object of the present invention to provide a convergent division method that performs division by the minimum number of calculation steps determined from the input data width. (Means for Solving the Problems) The present invention includes a multiplication circuit that multiplies floating point data and an arithmetic operation circuit that adds and subtracts floating point data. This relates to a division method in a division device that performs division using B 0 ) and dividend (A 0 ), and in order to solve the problems of the prior art,
It was constructed to include the following four steps. In the first step, the exponent part of the divisor (B 0 ) is calculated from the exponent part of the dividend (A 0 ) to obtain the dividend (A 0 ') in which only the exponent part of the dividend (A 0 ) is updated. Find the divisor (B 0 ' ) by resetting and updating only the exponent part of the divisor (B 0 ). In the second step, the updated dividend (A 0 ″) is obtained by multiplying the dividend (A 0 ′) with only the exponent part updated by a constant, and the updated dividend (A 0 ′) with only the exponent part updated is multiplied by a constant . After multiplying, the value obtained by subtracting from another constant (1−4/3B 0 ′) is set as the initial value of the convergence coefficient (X 0 ).In the third step, the divisor (B 0 ) or Number of update operations performed in the next fourth step based on the data word length of the mantissa of the dividend (A 0 )
Find (m). In the fourth step, m updating operations are sequentially performed on the dividend (A 0 ″) updated in the second step, and the updated dividend (A m
=A m-1・S m-1 +A m-1 ) is the quotient. Of the m update operations performed in this fourth step, the first update operation is to combine the dividend (A 0 ″) updated in the second step with the initial value of the convergence coefficient (S 0 ). Product by multiplication (A 0 ″S 0 ) and the updated dividend
(A 0 ″) and the sum (A 0 ″S 0 +A 0 ″) is the first update dividend (A 1 ). From the second time onwards, for example, in the i-th update operation, Update dividend obtained from the previous update operation
( A i - 1 _
S i-1 ) and the updated dividend (A i-1 ) obtained from the previous update calculation (A i-1・S i-1 +A i-1 )
is determined as the new updated dividend (A i ). (Function) Since the processing of the exponent part is completed by the processing of the first step, the calculation processing is thereafter performed using floating point data, but conventional fixed point processing can be applied to the mantissa processing. In the second step, variables are converted so that the mantissa value range of the divisor is symmetrical about the origin, and the number of convergence operations can be kept to the minimum necessary. In the third step, the number of update operations that are performed sequentially on the dividend updated in the second step is determined, and this number can be determined from the divisor or the mantissa data word length of the dividend.
Unlike the conventional method, it is no longer necessary to perform divisor update calculations one after another and determine whether it is equal to the constant 1 each time, and the procedure for determining the divisor update value itself can be omitted. In the fourth step, the number of calculation steps can be reduced by simply updating the dividend updated in the second step the number of times determined in the third step to obtain the quotient to be determined. At the same time, calculation time can be reduced. (Embodiment) A division method according to an embodiment of the present invention will be described below with reference to FIGS. 1 and 2. FIG. 1 is a block diagram showing the basic calculation contents, and FIG. 2 is a diagram showing the data format of floating point representation used in the calculation of this embodiment. Here, it is assumed that the division value Q F is calculated using the data A 0 and B 0 that have been normalized in floating point representation as the dividend and the divisor, respectively. However, B 0 >0. The relationship among A 0 , B 0 , and Q F is expressed by equation (6). Q F =A 0 /B 0 (6) The principle of the division operation in this embodiment is based on a convergent algorithm, and first an overview of the basic operation contents will be described. In the division operation of this embodiment, the exponent part is processed first. That is, the dividend
Calculate the exponent part of the divisor B 0 from the exponent part of A 0 to obtain an updated value A 0 ' that updates only the exponent part of the dividend A 0 ,
After the subtraction, an updated value B 0 ' is obtained by resetting only the exponent part of the divisor B 0 . After that, the range of the updated divisor and the mantissa part of the dividend is converted using a linear equation (A 0 ″, B 0 ″), and the divisor B 0 ″ that has undergone the conversion process is Multiply the dividend A 0 ″ sequentially as a coefficient to multiply the reciprocal asymptotic value,
The dividend update calculation is repeated a predetermined number of times, and the final updated value of the dividend is taken as the quotient. Here, the number of update operations to be executed is set such that when the divisor B 0 '' is successively multiplied by the coefficient to be multiplied by the above number of times, the multiplication result becomes 1.The minimum necessary for the above update operation. The method for determining the number of times will be described below. First, consider applying the following transformation formula (formula (7)) using infinite products to the calculation of formula (6).

【式】 この式(7)を式(6)にそのまま適用すると、 QF=A0/B0=A0′/B0′=A0′/1−X =A0′(1+X)(1+X2)(1+X4) …(1+X2n)… 但し、X=1−B0′ (8) となるが、B0′は、指数部がゼロであつて除数B0
の仮数部と同じ値なので、 0.5≦B0′<1 (9) となり、変数Xの値域は、 0<X0.5 (10) となつてしまい、ゼロ点非対称となり、式(7)の収
束性が良くない状態となる。このため、変数
B0′を一次式による変換でゼロ点対称の値域をも
つ変数Sへ変換することを考える。 S=1−4/3B0′ (11) とおくと、B0′の範囲が0.5B0′<1であるため、 −1/3<S1/3 となり、このSを用いれば、(6)式は、 QF=A0/B0=A0′/B0′ =3/4A0′(1+S)(1+S2)(1+S4) …(1+S2n)… (12) となつて、式(7)の変換公式の適用が最も収束速度
の早い状態で行なえることとなる。 一方、仮数部データ語長は、第2図に示すよう
に、Mbitという有限値であるため、Mbitの幅で式
(12)の括弧の乗算を有限の回数行なえば、Mbit
で表現できる限界値になる。そこで式(12)の無
限乗積を逐次展開し、第m回までの乗算値をQm
とすると、式(12)は、次の有限級数で近似でき る。 Mbitで表現できる限界値となる。そこで式(12)
の無限乗積を逐次展開し、第m回までの乗算値を
Qmとすると、式(12)は、次の有限級数で近似
できる。
[Formula] Applying this equation (7) directly to equation (6), Q F =A 0 /B 0 =A 0 ′/B 0 ′=A 0 ′/1−X =A 0 ′(1+X)( 1 + _ _ _ _
Since the value is the same as the mantissa of , 0.5≦B 0 ′<1 (9) and the range of variable It becomes a state where sex is not good. For this reason, the variable
Let us consider converting B 0 ' to a variable S having a zero-point symmetric range by conversion using a linear equation. If we set S=1−4/3B 0 ′ (11), the range of B 0 ′ is 0.5B 0 ′<1, so −1/3<S1/3, and if we use this S, (6 ) formula is Q F =A 0 /B 0 =A 0 '/B 0 ' = 3/4A 0 '(1+S)(1+S 2 )(1+S 4 )...(1+S 2n )... (12) The conversion formula of equation (7) can be applied with the fastest convergence speed. On the other hand, as shown in Figure 2, the mantissa data word length is a finite value of M bits , so the expression
If we multiply the parentheses in (12) a finite number of times, we get M bit
This is the limit value that can be expressed as Therefore, we sequentially expand the infinite multiplication product of equation (12) and calculate the multiplication value up to the mth time by Q m
Then, equation (12) can be approximated by the following finite series. This is the limit value that can be expressed in M bits . Therefore, formula (12)
Sequentially expand the infinite product of and calculate the multiplication value up to the mth
Assuming Q m , equation (12) can be approximated by the following finite series.

【式】 このため、式(12)の無限乗積と式(13)の有
限級数との差であるΔQmを ΔQm=|QF−Qm| (14) とすると、式(14)の最大値ΔQm(MAX)が何
回までの乗算でMbitの範囲外となるかを求めれば
良い。 ΔQm(MAX)は、|A0′の仮数部|→1、S→
1/3の時に生じ、他方、Mbitの幅で表わせる2進
数の数値限界を2-pとすると、ΔQm(MAX)は、
[Formula] Therefore, if ΔQ m, which is the difference between the infinite product of formula (12) and the finite series of formula (13), is ΔQ m = |Q F −Q m | (14), then formula (14) What is necessary is to find out how many times the maximum value ΔQ m (MAX) of ΔQ m (MAX) falls outside the range of M bits . ΔQ m (MAX) is the mantissa part of |A 0 ′ |→1, S→
1/3, and on the other hand, if the numerical limit of a binary number that can be expressed with a width of M bits is 2 -p , then ΔQ m (MAX) is

【式】 (15) となるので、Mbitの語長精度に対してpは、 p≧(M+1)(log32)+1 (16) となり、式(13)のtがpの下限値(M+2)
(log32)+1に等しくなる項数mが求める値とな
る。従つて、 2m−1=(M+2)(log32)+1 (17) より、 m=log2{(M+2)(log32)+2} (18) となり、例えば、仮数部がSbit(符号)+15bit(デー
タ)のデータ形式では、M=15よりm=3.7≒4
ステツプとなる。 また、式(12)は収束級数であるため、Sが0
に近い場合、m回以下の収束係数の乗算で収束す
るが、収束後も係数乗算を行なつてもMbitの範囲
外であるため、演算結果のQmは発散しない。 従つて、被除数の更新を行なう乗算及び加算の
更新演算の演算回数mが入力データの仮数部デー
タ語長Mbitから決定できる。 次に、本実施例による除算演算の具体的手順を
第1図に基づき述べる。 先ず、前述したように指数部の処理を行ない、
被除数A0の指数部のみを更新した被除数A0′と、
除数B0の指数部のみを更新(リセツト)した除
数B0′とを求める。)。 次に、該更新除数B0′を用いて、収束係数の初
期値S0を次の(14)式から求める(ステツプ)。 1−4/3B0′=0 (19) さらに、更新被除数A0′に対して、定数(4/3) を乗算して値域の変換を行なつた被除数A0″とす
る(ステツプ)。 該S0を用いて、更新被除数A0″の更新を次の
(20)式の積和演算(乗算及び加算)により行な
う(ステツプ)。 A0″S0+A0″=A1 (20) 次に、収束係数S0の更新演算を(21)式の乗算
により行なう(ステツプ)。 S0 2=S1 (21) 以下、この被除数の更新演算と収束係数の更新
演算をm回行なう(ステツプ→→)。この
mの値は、上述した方法で得たものを用いるする
と、最終回、即ち、第m回目の積和演算 Am-1・Sm+Am-1=Am (22) の演算結果Amが求める商となつて除算が完了す
る。 以上、述べた例では、式(6)の条件として、
除数B0が正に限定されているが、該除数B0が負
の場合には、除数及び被除数の両者を極性反転し
てから、上記と同様の演算処理を行なえば良く、
何ら問題とならない。 さらに、剰余の取扱いは、除算完了後、次の式
(23)に基づく乗算及び減算の演算を行なつて求
めれば良い。 被除数A0−除数B0×商=剰余 (23) (発明の効果) 本発明によれば、除数または被除数の仮数部の
データ語長と有限語長の演算精度の点から必要最
小限の更新演算の回数を求めるようにしたので、
従来の収束型除算方式で必要とされていた除数の
更新演算が省略できるようになり、演算ステツプ
数の大幅な低減及び演算時間のより一層の短縮に
より除算処理の高速化が可能となる利点がある。
また本発明の除算方式を適用した除算装置では乗
算回路及び算術演算回路を用いるだけで除算が実
行できるので、特別な除算専用の演算部を設ける
必要がなく、装置の小型化、経済化を図れる利点
がある。
[Equation] (15) Therefore, p for M bit word length accuracy is p≧(M+1)(log 3 2) + 1 (16), and t in Equation (13) is the lower limit of p ( M+2)
The number of terms m that is equal to (log 3 2) + 1 is the value to be sought. Therefore, from 2 m −1=(M+2)(log 3 2)+1 (17), m=log 2 {(M+2)(log 3 2)+2} (18), and for example, the mantissa is S bit ( In the data format of sign) + 15 bits (data), m = 3.7≒4 from M = 15.
It becomes a step. Also, since equation (12) is a convergent series, S is 0
If it is close to , it converges by multiplying the convergence coefficient m or less times, but even after convergence, even if the coefficient is multiplied, it is outside the range of M bits , so Q m of the operation result does not diverge. Therefore, the number m of update operations of multiplication and addition for updating the dividend can be determined from the mantissa data word length M bits of the input data. Next, the specific procedure of the division operation according to this embodiment will be described based on FIG. First, process the exponent part as described above,
Dividend A 0 ′ where only the exponent part of dividend A 0 is updated,
Find the divisor B 0 ' in which only the exponent part of the divisor B 0 is updated (reset). ). Next, using the updated divisor B 0 ', the initial value S 0 of the convergence coefficient is determined from the following equation (14) (step). 1-4/3B 0 ′= 0 (19) Furthermore, the updated dividend A 0 ′ is multiplied by a constant (4/3) to obtain a dividend A 0 ″ whose range has been converted (step). Using this S 0 , update the updated dividend A 0 ″ as follows:
This is performed by the product-sum operation (multiplication and addition) of equation (20) (step). A 0 ″S 0 +A 0 ″=A 1 (20) Next, the convergence coefficient S 0 is updated by multiplying the equation (21) (step). S 0 2 =S 1 (21) Hereafter, the updating calculation of the dividend and the updating calculation of the convergence coefficient are performed m times (step→→). If the value of m obtained by the method described above is used, the calculation result A of the final time, that is, the m-th product-sum operation A m-1・S m +A m-1 = A m (22) The division is completed when m becomes the desired quotient. In the example described above, as the condition of equation (6),
The divisor B 0 is limited to positive, but if the divisor B 0 is negative, the polarity of both the divisor and dividend may be reversed, and then the same calculation process as above may be performed.
No problem. Furthermore, after the division is completed, the remainder is handled using the following formula:
It can be obtained by performing multiplication and subtraction operations based on (23). Dividend A 0 − Divisor B 0 × Quotient = Remainder (23) (Effects of the Invention) According to the present invention, the minimum necessary update is performed from the viewpoint of calculation accuracy of the data word length and finite word length of the mantissa part of the divisor or dividend. Since I decided to calculate the number of operations,
The divisor update operation required in the conventional convergent division method can be omitted, and the advantage is that the number of calculation steps and calculation time are significantly reduced, making it possible to speed up the division process. be.
In addition, in the division device to which the division method of the present invention is applied, division can be performed simply by using a multiplication circuit and an arithmetic operation circuit, so there is no need to provide a special calculation section dedicated to division, and the device can be made smaller and more economical. There are advantages.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の実施例の主要な演算内容を示
すブロツク図、第2図は上記実施例の演算で使用
される浮動小数点表示のデータ形式を示す図、第
3図は従来方式の演算内容を示すブロツク図であ
る。
Figure 1 is a block diagram showing the main calculation contents of the embodiment of the present invention, Figure 2 is a diagram showing the data format of floating point representation used in the calculation of the above embodiment, and Figure 3 is the calculation of the conventional method. It is a block diagram showing the contents.

Claims (1)

【特許請求の範囲】 1 浮動小数点表示のデータの乗算を行なう乗算
回路と、浮動小数点表示のデータの加減算を行な
う算術演算回路とを備え、浮動小数点表示された
除数及び被除数を用いて除算を行なう除算装置に
おける除算方式において、 前記被除数の指数部から前記除数の指数部を減
算して前記被除数の指数部のみを更新した被除数
を求めるとともに、前記除数の指数部のみをリセ
ツト更新した除数を求める第1のステツプと、 前記指数部のみを更新した被除数に定数4/3を
乗算して更新被除数を求め、前記指数部のみをリ
セツト更新した除数に定数4/3を乗算した後、さ
らに定数1から減算を行なつたものを収束係数と
初期値とする第2のステツプと、 前記除数または被除数の仮数部データ語長に基
づいて、前記第2のステツプで更新した被除数に
対して施す更新演算回数を求める第3のステツプ
と、 第1回目の更新演算は、前記第2のステツプで
更新した被除数と前記第2のステツプで求めた収
束係数の初期値との乗算による積と、前記第2の
ステツプで更新した被除数とを加算した和を第1
回目の更新被除数として求めることにより行な
い、第2回目以降の更新演算は、直前回の更新演
算より求めた更新被除数と直前回の収束係数を自
乗した更新収束係数との乗算による積と、直前回
の更新演算より求めた更新被除数とを加算した和
を新たな更新被除数として求めることにより行な
い、上記更新演算を前記第3のステツプで求めた
回数だけ逐次行ない、最終的に得られた更新被除
数を商とする第4のステツプと、 を具備することを特徴とする除算方式。
[Scope of Claims] 1. A multiplication circuit that performs multiplication of floating-point data and an arithmetic operation circuit that performs addition and subtraction of floating-point data, and performs division using a divisor and a dividend that are represented as floating-point numbers. In the division method of the division device, the exponent part of the divisor is subtracted from the exponent part of the dividend to obtain a dividend with only the exponent part of the dividend updated, and the divisor with only the exponent part of the divisor updated is obtained. 1 step, multiply the dividend whose exponent part only is updated by the constant 4/3 to obtain the updated dividend, reset only the exponent part, multiply the updated divisor by the constant 4/3, and then multiply from the constant 1. a second step in which the subtracted value is used as the convergence coefficient and initial value; and a number of update operations to be performed on the dividend updated in the second step based on the mantissa data word length of the divisor or dividend. The third step to obtain The sum of the dividend updated in step is the first
The second and subsequent update calculations are performed by multiplying the update dividend obtained from the previous update calculation by the update convergence coefficient obtained by squaring the previous update convergence coefficient and the previous update dividend. This is done by adding the sum of the updated dividend obtained from the updating calculation as a new updated dividend, and the above updating calculation is performed sequentially the number of times obtained in the third step, and the finally obtained updated dividend is A division method characterized by comprising a fourth step in which the quotient is a quotient.
JP60226812A 1985-10-14 1985-10-14 Division system Granted JPS6286434A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60226812A JPS6286434A (en) 1985-10-14 1985-10-14 Division system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60226812A JPS6286434A (en) 1985-10-14 1985-10-14 Division system

Publications (2)

Publication Number Publication Date
JPS6286434A JPS6286434A (en) 1987-04-20
JPH0419571B2 true JPH0419571B2 (en) 1992-03-30

Family

ID=16850989

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60226812A Granted JPS6286434A (en) 1985-10-14 1985-10-14 Division system

Country Status (1)

Country Link
JP (1) JPS6286434A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3660075B2 (en) * 1996-10-04 2005-06-15 株式会社ルネサステクノロジ Dividing device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59116852A (en) * 1982-12-23 1984-07-05 Matsushita Electric Ind Co Ltd High-speed divider

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59116852A (en) * 1982-12-23 1984-07-05 Matsushita Electric Ind Co Ltd High-speed divider

Also Published As

Publication number Publication date
JPS6286434A (en) 1987-04-20

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