JPH04189003A - Arbitrary waveform generator - Google Patents

Abstract

PURPOSE:To obtain a generator for an optional wave with less waveform distortion by outputting a signal with a narrow pulse width while employing a D/A converter in the generator for an optional wave converting a data read from a memory into an analog signal. CONSTITUTION:Data stored in a memory 1 is read to form a desired waveform and it is outputted to a D/A converter 2. The D/A converter 2 converts the data inputted synchronously with a clock outputted from a clock generator 5 into an analog signal and it is inputted to an ON terminal of a high speed switch 7. Since the switch 7 is operated by a clock pulse with a narrow width and the contact of the switch 7 is closed only for a time of the pulse width generated by a sub clock generator 6, an output signal of the switch 7 is a waveform signal comprising the pulse with almost equal width as the pulse width of the sub clock. Thus, the wide width of the clock is made narrow by the switch 7, and an LPF is used to eliminate an undesired component and the result is outputted from an amplifier 4.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to an arbitrary waveform generator that reads data from a memory and converts it into an analog signal, and particularly relates to an arbitrary waveform generator that improves the trapezoidal aperture distortion of a DA converter.

(Prior art) Data forming a desired waveform is read from memory, and D
A conventional arbitrary waveform generator that converts into an analog signal using an A converter has a circuit configuration as shown in FIG. In the figure,
1 is a memory storing data for forming a desired waveform, the output of which is read out and converted into an analog signal by a DA converter 2, which outputs a signal having the waveform shown in FIG.

(Problem to be Solved by the Invention) In general, in so-called decoding which reads out a digital signal and converts it into an analog signal, the decoded signal is as shown in (a) in Fig. 7.
As shown in the figure, it is ideal to have a pulse train with an extremely narrow width, and by passing a signal with such a narrow pulse width through a filter with the characteristic that the impulse response is (sin x) / x, the ideal pulse train can be created. Can you get the waveform? The frequency components of this pulse train are the shaded areas in the diagram (b).

However, since it is usually decoded by a DA converter,
As shown in Figure 8 (A), the pulses of the pulse train have a fixed time width, and their frequency components fall within the shaded range as shown in Figure 8 (B), with the high frequency portion being It becomes dull. This is called the aperture effect. Therefore, in the circuit of FIG. 4, the waveform of FIG. 5, which is the output waveform of the DA converter 2, from which high frequency components are removed by the LPFB becomes a distorted waveform as shown in FIG. 6.

The present invention has been made in view of the above points, and an object thereof is to realize an arbitrary waveform generator with small waveform distortion by outputting a signal with a narrow pulse width while using a DA converter.

(Means for Solving the Problems) The present invention for solving the above problems includes a DA converter that converts a digital signal read from a memory into an analog signal so as to form a desired waveform, and a DA converter that converts a digital signal read from a memory to form a desired waveform; and a clock generator that provides timing for the operation of the DA converter; and a clock generator that receives a clock from the clock generator and whose leading edge is at least as far from the leading edge of the clock waveform as the D.
A subclock generator generates a subclock with a narrow pulse that rises with a delay of the settling time of the A converter, and a normally open contact is connected to the DA converter, and the other normally closed contact is grounded. , comprising a high-speed switch whose normally open contact is closed during the pulse width period of the output pulse in synchronization with the sub-clock generator, and an LPF for removing high-frequency components of the output of the high-speed switch. This is a characteristic feature.

(Function) In synchronization with the clock generated by the clock generator that defines the timing for reading data from the memory and converting it into a real analog signal by the DA converter, from the leading edge of the clock, the timing is longer than the settling time of the DA converter. A delayed narrow-width sub-clock is generated and a high-speed switch is operated by the sub-clock to narrow the width of the pulse forming the output waveform of the DA converter to reduce waveform distortion.

(Embodiments) Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram of an apparatus according to an embodiment of the present invention.

In the figure, parts equivalent to those in FIG. 4 are given the same reference numerals. In the figure, 5 is a clock generator that generates a clock that determines the read timing of the memory 1 and the DA conversion timing of the DA converter 2; This is a subclock generator that generates a subclock with a narrow pulse width by starting up with a delay of time t, which is longer than the settling time. The DA converter 2 is connected to the normally open terminal (hereinafter referred to as the No terminal), and the normally closed terminal (hereinafter referred to as the NC terminal) is grounded to the subclock generator 6.
This is a high-speed switch in which the No terminal is closed for a time equal to the pulse width of the sub-clock from .

Next, the operation of the embodiment configured as described above will be explained. The data stored in the memory 1 is read out to form a desired waveform and is output to the DA converter 2.

The DA converter 2 converts manually input data into an analog signal in synchronization with the clock output from the clock generator 5. The output of the DA converter 2, which has been converted into an analog signal, is input to the No terminal of the high-speed switch 7. high speed switch 7
is operated by a subclock whose pulse width is narrower than the clock pulse, and when an analog signal is input to the NO sliding contact, the NO sliding contact subclock generator 6 of the high-speed switch 7
Since the high-speed switch 7 is closed for a time corresponding to the pulse width generated by the sub-crotter, the output signal of the high-speed switch 7 outputs a waveform signal composed of pulses having a width substantially equal to the pulse width of the sub-crotter. FIG. 2 is a time chart of this operation. In the figure, (a) shows the output waveform of the DA converter 2 when the waveform data of the digital signal read from the memory 1 is converted into an analog signal by the DA converter 2. (b) The figure shows a clock signal generated by the clock generator 5, and the duty cycle is approximately 1/2. (lh) The figure shows a sub-clock signal generated by the sub-clock generator 6, which consists of narrow pulse width pulses that rise after a delay of time t, which is longer than the settling time of the DA converter 2, from the leading edge of the clock signal. There is. (d) The figure shows the output signal waveform of the high-speed switch 7 operated by the suck lock signal shown in (c). As is clear from FIG. 2, the output waveform of the DA converter 2 is made up of continuous wide-width pulses, and is output by the high-speed switch 7 as a waveform signal made up of narrow-width pulses.

The output signal of the high-speed switch 7 has unnecessary high-frequency components removed by the LPF 3, is amplified by the amplifier 4, and is output.

Conventionally, when reading waveform data from a memory and performing DA conversion, if the data interval is wide, 0 data is interpolated between sample data to reduce waveform distortion. FIG. 3 is an explanatory diagram showing this conventional waveform distortion correction method using digital signal processing. In the figure, (a) shows digital data read out from the memory, and the data interval is wide and there is a lot of waveform distortion. (b) The figure shows data obtained by interpolating a 0 value in the middle of the sample data. Figure (c) shows the waveform data obtained by passing the data in figure (b) through an LPF. Through this processing, the sampling frequency becomes twice that of the input.
Reduces waveform distortion.

This embodiment uses a circuit to improve waveform distortion through data interpolation in digital signal processing, and synchronizes a high-speed switch with a narrow sub-clock that is delayed from the leading edge of the clock signal by more than the settling time of the DA converter. By operating as described above, it is possible to realize an arbitrary waveform generator that eliminates the effects of glitches and settling time of the DA converter, and further reduces the effects of aperture effects.

(Effects of the Invention) As described in detail above, according to the present invention, waveform distortion is reduced by obtaining waveform data from a signal with a narrow pulse width instead of using a method of obtaining an analog signal using a DA converter. The practical effect is great.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is a time chart of an embodiment of the present invention, FIG. 3 is an explanatory diagram of waveform distortion correction in conventional digital signal processing, and FIG. 4 is a diagram of conventional digital signal processing. A block diagram of the arbitrary waveform generator, Fig. 5 is a diagram of the output waveform of the DA converter in the circuit of Fig. 4, Fig. 6 is a diagram of the output waveform of the LPF in the circuit of Fig. 4, and Fig. 7 is a diagram of the pulse width. FIG. 8 is a diagram showing frequency components of waveform data formed by narrow pulses, and FIG. 8 is a diagram showing frequency components of waveform data formed by wide pulses. Memory 2・DA converter 3・LPF
4. Amplifier 5 Clock generator 6. Sub clock generator 7. High speed switch Fig. 1 Fig. 2 Fig. 3

Claims (1)

[Scope of Claims] A DA converter (2) that converts a digital signal read from a memory (1) into an analog signal so as to form a desired waveform; and a DA converter (2) that converts a digital signal read from a memory (1) into an analog signal; a clock generator (5) that provides timing for the operation of the DA converter (2); A subclock generator (6) that generates a subclock with a narrow pulse that rises with a delay of a settling time of a high-speed switch (7) whose normally open contact is closed during the pulse width period of its output pulse in synchronization with the sub-clock generator (6); and a high-frequency component of the output of the high-speed switch (7). An arbitrary waveform generator comprising: an LPF (3) for removing .