JPH04183087A - Picture display device - Google Patents

Abstract

PURPOSE:To eliminate a circuit for converting a picture signal to an exponent function and to reduce the number of bits for an A/D converter providing a circuit to convert the values of the digital signals in images R, G and B into exponent functions at an IC to generate the driving signal of a beam flow control electrode. CONSTITUTION:In the circuit (IC) to generate the driving signal of the beam flow control electrode, the circuit is provided to convert the digital signals of the images R, G and B into the exponent functions. A/D converted picture signals 23R, G and B of 7 bits are respectively converted into square values by multipliers 51a-51c. By converting this value into the value of 8 bits at dividers 52a-52c, the data of 8 bits converting the data of 7 bits in the manner of the exponent function can be obtained. Thus, the analog circuit to convert the picture signal into the exponent function can be eliminated, and the number of bits for the A/D converter can be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention generates an electron beam for each division when a screen on a screen is vertically divided into a plurality of divisions, and generates an electron beam for each division. The present invention relates to an apparatus for displaying a television image by vertically deflecting a beam to display a plurality of lines.

2. Description of the Related Art The basic structure of a conventional image display element will be described with reference to FIG.

This display element has a back electrode 1. Line cathode 2 as a beam source, beam extraction electrode 3. Beam flow control electrode 4. Focusing electrode6. Horizontal deflection electrode 6. Vertical deflection electrode7. A screen plate 8 and the like are arranged, and these are housed inside the vacuum container.

A line cathode 2 serving as a beam source is stretched horizontally so as to generate an electron beam distributed linearly in the horizontal direction.
A plurality of line cathodes 2 are further provided at intervals in the vertical direction (in this description, only seven line cathodes 2A to 2G are shown). In this configuration, the spacing between the line cathodes is 3 to 9, and the number of line cathodes is 30, and the number of line cathodes is 2 to 27. The spacing between the linear cathodes cannot be freely increased;
Vertical deflection, which will be described later, is regulated by the distance between the pole 7 and the screen 8. The configuration of these line cathodes 2 is 10 to 3.
A fluoride cathode material is coated on the surface of a tungsten rod of 0 μmφ. As will be described later, the line cathodes are controlled to emit electron beams from the upper line cathode 2A to the lower line cathode 27 at regular time intervals. The back electrode 1 suppresses generation of electron beams from line cathodes other than the corresponding line cathode, and also functions to press the electron beams only toward the anode. In Fig. 6 (-i) Although the vacuum vessel is not shown, it is also possible to adopt a structure in which the back electrode 1 is integrated with the vacuum vessel. A conductive plate 11 having a large number of through holes 1o arranged at regular intervals in the horizontal direction facing the
The electron beam emitted from the line cathode 2 is extracted through the through hole 10 thereof. Next, the control electrode 4 is composed of a vertically long conductive plate 15 having a through hole 14 at a position facing each of the line cathodes 2a to 27, and a plurality of conductive plates 15 are arranged in parallel horizontally at a predetermined interval. has been done. In this configuration, 120 conductive plates 16a to 15n for control electrodes are provided (only 8 are shown in FIG. 6). The control electrode 4 controls the amount of passage of each of the electron beams divided horizontally by the beam extraction electrode 3 in accordance with the picture elements of the video signal and in synchronization with the timing of horizontal deflection, which will be described later. . The focusing electrode 5 is a conductive plate 17 having a through hole 16 at a position facing each through hole 14 provided in the control electrode 4, and focuses the electron beam.

The horizontal deflection electrode 6 is composed of a plurality of conductive plates 18 and 18' arranged vertically along both horizontal sides of the through hole 16, and each conductive plate has a horizontal deflection plate. voltage is applied. The electron beam for each picture element is deflected in the horizontal direction, and sequentially irradiates the R, G, and H phosphors on the screen 8 to emit light. In this configuration, each electron beam is deflected by two trios.

The vertical deflection electrodes 7 include a plurality of conductive plates 19 arranged horizontally at vertically intermediate positions of the through holes 16.
．． 19', a vertical deflection voltage is applied to deflect the electron beam in the vertical direction. In this configuration,
The electron beam generated from one line cathode is deflected by eight lines in the vertical direction by a pair of electrons [19, 19'. Then, by the vertical deflection electrode 7 composed of 31 pieces, 3 o
Thirty vertical deflection conductor pairs corresponding to each of the line cathodes of the book are constructed, and 240 horizontal scanning lines are drawn in the vertical direction on the NuClean 8.

As explained above, in this configuration, a plurality of horizontal deflection electrodes 6 and a plurality of vertical deflection electrodes 7 are each stretched in a comb shape. Further, by setting the distance to the screen 8 longer than the distance between the horizontal and vertical deflection electrodes, it becomes possible to irradiate the screen 8 with the electron beam with a small deflection amount.

This allows horizontal and vertical deflection electrodes I can do that.

As shown in FIG. 6, NuClean 8 is constructed by applying phosphor 2o in stripes on the back surface of Galanu plate 21. Although not shown, a metal back and carbon are also coated. The phosphor 20 is located in one through hole 1 of the control electrode 4.
By deflecting the electron beam passing through 4 in the horizontal direction, two trios of phosphor pairs of three colors R, G, and H are irradiated, and the phosphors are applied vertically in stripes. .

In FIG. 6, the broken lines drawn on the NuClean 8 indicate the vertical divisions displayed corresponding to each of the plurality of line cathodes 2, and the two-dot chain lines indicate the divisions displayed corresponding to each of the plurality of control electrodes 4. Indicates the horizontal division that will be displayed. FIG. 7 shows an enlarged view of one section partitioned by broken lines and two-dot chain lines. As shown in Figure 7, in the horizontal direction, R, G for two trios,
The B phosphor has a width of 8 lines in the vertical direction.

In this example, the size of one section is 1111 m in the horizontal direction and 3 m in the vertical direction.

Although the phosphors of each of the three colors R, G, and B are shown in stripes in FIG. 7, they may be arranged in a delta pattern.

However, when arranged in a delta shape, it is necessary to apply horizontal and vertical deflection waveforms that are compatible with the arrangement.

In FIG. 7, for convenience of explanation, the vertical and horizontal dimension ratios are different from the image displayed on the actual screen.

Furthermore, in this configuration, two trios of R, G, and H phosphors are provided for one through hole 14 of the control electrode 4;
It may be composed of one trio or three or more trios. However, it is necessary to sequentially apply one trio or three or more trios of R, G, and B video signals to the control electrode 4, and perform horizontal deflection in synchronization with this.

Next, the operation of the drive circuit for driving this display element will be explained with reference to FIG. First, the driving part that irradiates the NuClean 8 with an electron beam to display the image will be explained.

The power supply circuit 22 is a circuit for applying a predetermined bias voltage to each electrode of the display element, with Vl applied to the back electrode 1 and V3 . The focusing electrode 5 has ■5. A DC voltage of v8 is applied to the screen 8. Line cathode drive circuit 2
6 creates line cathode drive pulses (I-MA) using the vertical synchronization signal V and the horizontal synchronization signal H. FIG. 9 shows the timing diagram. Each line cathode 2A to 27 is shown in Figure 8 (I to M).
As shown in FIG. 2, a current flows and heats up while the drive pulse is at a high potential, and the heated state is maintained such that electrons are emitted while the drive pulse (I to M) is at a low potential. As a result, electrons are emitted from the 30 line cathodes 2A to 27 only during 8 horizontal scanning periods during which low potential drive pulses (I to M) are applied to each of the 30 line cathodes 2A to 27.

During the period in which a high potential is applied, the line cathode 2 is lower than the potential around the line cathode 2 determined by the bias voltage applied to the back electrode 1 and the beam extraction electrode 3.
Since the potential applied to 27 is higher, no electrons are emitted from the line cathode. To configure one screen,
It is sufficient to sequentially switch the potential from the upper line cathode 2a to the lower line cathode 27 every 8 scanning periods.

Next, the deflection portion will be explained. Deflection voltage generation circuit 4o, direct memory accelerator (hereinafter referred to as DMA controller) 41. Deflection voltage waveform storage memory (hereinafter referred to as deflection memory) 42° digital-to-analog converter (
The D/A converter (hereinafter referred to as a D/A converter) is composed of 4sh, 43V, etc., and generates vertical deflection signals v, v/ and horizontal deflection signals h'.

In this configuration, in consideration of overscanning, the vertical deflection signal is displayed for 240 horizontal scanning periods in one field of 1. The memory address area, which still stores vertical deflection position information corresponding to each line, is divided into a first field and a second field, each having one set of memory capacity. When displaying, data is read from the corresponding deflection memory 42, converted to an analog signal by the DIA converter 43v, and applied to the vertical deflection electrode 7.

The vertical deflection position information stored in the deflection memory 42 is composed of almost regular data for every 8 horizontal scanning periods, and the waveform converted to D, /Ai also has approximately 8 stages of vertical synchronization signals. However, as mentioned above, it has a memory capacity for two fields, so that the position can be finely adjusted for each horizontal scanning line.

Further, regarding the horizontal deflection signal, it is necessary to horizontally deflect the electron beam in six stages during one horizontal scanning period, and a memory is provided so that the deflection position can be finely adjusted for each horizontal scanning. Therefore, assuming that 480 horizontal scanning periods are displayed between one frame, a memory of 480 x 6 = 2880 bytes is required, but since the data of the first field and the second field are shared, it is actually 144 o Bytes of memory are used.

When displaying, the deflection information corresponding to each horizontal scanning line is read out from the deflection memory 42 and sent to the D, /A converter 43v.
The signal is converted into an analog signal and applied to the horizontal deflection electrode 6. To summarize, during the display period excluding the vertical retrace period of the vertical period, the electron beam emitted from one of the line cathodes 2A to 27, which has a low potential and to which a drive pulse is applied, is a beam. It is horizontally divided into 120 sections by extraction electrodes 3, forming 120 electron beam rows. As will be described later, the amount of beam passing through each section is controlled by the control electrode 4, and after being focused by the focusing electrode 5, the electron beam is passed through a pair of horizontal beams that change in approximately six steps as shown in FIG. The horizontal deflection electrodes 18, 18', etc., to which deflection signals h' are applied, cause the R1°G1. B1 and R2, G2, B2
The phosphors are sequentially irradiated for each horizontal display period/6.

For each horizontal line raster, the electron beam is divided into 120 sections at R1, G1, B1 and R2°G.
A color image can be displayed on the screen 8 by modulating it with a video signal corresponding to 2 and B2.

Next, the modulation control part of the electron beam will be explained. First, in FIG. 8, signal input terminals 23R, 223G, 23
The R, G, and B video signals added to B are applied to 120 sample-and-hold circuit sets 31a to 31n. Each sample hold group 31a to 31n is R1
For G1.

It is composed of six sample and hold circuits for B1, R2, G2, and B2. The sampling pulse generation circuit 34 generates signals for R1, G1, and B1 of each of the 120 sample and hold circuits 31a to 31n during a horizontal display period (approximately 50 μs) of a horizontal period (63.5 μs).
and R2.

1r corresponding to the sample hold circuit for G2 and B2
2o (120x6) sample holds Ra1 to Rn
2 are generated sequentially. Each of the 720 sampling pulses is connected to 120 sample and hold circuit sets 31a to 31a.
31n, and as a result, each sample-and-hold circuit group has R1, G1, B1, R2,
Each video signal of G2°B2 is individually sampled and linked and held. 120 pairs of sample-held R1,
G1. B1, R, 2, G2. B2 video signal (120 sets of memo 1J after completion of sample hold for 1 line of signal)
The signals 32a to 32n are transferred all at once by a transfer pulse t, and held there for the next horizontal period. The held signals are applied to 120 switching circuits 35a-35n. Each of the switching circuits 35a to 35n is R
j, G1°B1. R2, G2. It is configured by a circuit having individual input terminals of B2 and a common output terminal that sequentially switches and outputs them, and the switching pulse/srj applied from the switching pulse generation circuit 36.
, gl , bl , r2. g2. Switching is controlled simultaneously by B2.

The switching pulses r1, gl, bl.

r2. g2. B2 divides each horizontal display period into six, and switches the switching circuits 35a to 35n gold switching R1, G1 . The pulse width modulation circuit 3 sequentially outputs the video signals of B1, R2°G2, and B2 in time division.
It is supplied to A-37n.

The output of each switching circuit 35a to 36n is transmitted to 120 sets of pulse width modulation (hereinafter referred to as PWM) circuits 37a to 36n.
3 an, R1, G1. B1゜R2, G2,
The pulse width is modulated according to the magnitude of each B2 video signal and output. The outputs of the pulse width modulation circuits 37a to 37n are individually applied to the 120 conductive plates 15a to 15n of the control electrode 4 of the display element as control signals for modulating the electron beam.

Next, horizontal deflection and display timing will be explained.

R1. in the switching circuits 35a to 35n. G1.
Switching the video signals of B1, R2, G2, and B2,
Electron beams R1, G1 . B
1, R2, G2. The timing and order of switching the horizontal deflection to the B2 phosphor are synchronously controlled so that they completely match. As a result, when the R1 phosphor is irradiated with the electron beam, the irradiation amount of the electron beam is controlled by the R1 control signal, and the following G1. B1. R2゜G2
, B2 are similarly controlled, and R1, G of each picture element
1, B1, R2, G2. B2 The light emission of each party light is caused by the R1, G1 . It is controlled by the video signals of B1, R2°G2, and B2, and each picture element is displayed by emitting light according to the input video signal. There are 120 sets of such controls (2 pixels each) for one line.
The process is executed every minute to display an image of 240 picture elements in one line, and then the process is performed sequentially from the upper line to display the image on the screen 8 for 240 lines in one field. Furthermore, the above-mentioned operations are repeated for each field of the input video signal, and a television signal or the like is displayed on the 7 screen 8.

The basic clock necessary for this configuration is supplied from a pulse generating circuit 39 shown in FIG. 8, and the timing is controlled by a horizontal synchronizing signal H9 and a vertical synchronizing signal V.

Problems to be Solved by the Invention However, in the above configuration, a circuit for converting the analog signal of the video R9G,H into an exponential function, and a circuit for converting the analog signal of the video R9G, H into an exponential function, and an digitizer /l/fU of the 1
In response to a change in bit, the amount of change in brightness on the screen must be made equal to the appropriate amount of change at low brightness, where visibility is most sensitive, so at high brightness, where visibility is insensitive, The amount of change becomes smaller than necessary, and the actual number of bits of the A/D converter has the problem of requiring an A/D converter having a number of bits that greatly exceeds the minimum required number of bits.

In view of the above problems, the present invention provides the above-mentioned images R and G.

The present invention provides an image display device that does not have a circuit for converting a B analog signal into an exponential function and reduces the number of bits of the A/D converter.

Means for Solving the Problems In order to solve the above problems, the image display device of the present invention has the following features: The IC has a structure in which an arithmetic circuit for converting into a function is provided inside the IC.

For production The present invention has the above-described configuration, so that one image R, G can be displayed.

B The entire circuit that converts the analog signal to an exponential function can be deleted.
At low luminance, where the visual characteristics are sensitive, the brightness is changed by a minimum of 9 per bit, and at high brightness, where the visual characteristics are insensitive, the amount of change per bit is several times the amount of change at low brightness. This means that the number of bits of the A/D converter can be reduced without deteriorating the image quality.

Embodiment Hereinafter, an image display device according to an embodiment of the present invention will be described with reference to the drawings. FIG. 1 shows a part of a drive signal generation circuit for a beam flow control electrode of an image display device according to an embodiment of the present invention.

In FIG. 1, 23R, G, and B are A/D-converted video signals, which are the same as those shown in FIG. 4, and 51a to 51
c is x2f: Multiplier for calculation 23R, G, B
Multiply as the value of . 52a to 52c convert the multiplier output into 8
A divider 31a for aligning the bits is a sample hold circuit for temporarily storing video data, and is the same as 31a in FIG.

The operation of the image display device configured as described above will be described below with reference to FIG. 1.

FIG. 1 shows a part of the drive signal generation circuit for the heam flow control electrode of the image display device of the present invention, in which A/D converted 7-bit video signals 23R to 23B are input to multipliers 61a to 61B, respectively. 51c, it is converted into a square value. By converting this value into a value of 5btt with the dividers 52a to 52C,
'ybit data and 8 bit exponentially transformed
t data can be obtained.

As a result, the analog circuit that converts the video signal into an exponential function can be removed, and the number of bbits of the A/D converter can be reduced.

Effects of the Invention As described above, according to the present invention, the circuit (IC) that generates the drive signal for the beam flow control electrode is provided with a circuit that converts the digital signals of the images R1G and B into an exponential function, thereby improving the conventional method. The analog circuit that converts the video R, G, and B analog signals into an exponential function can be removed, and the A/D converter's bi
An image display device with a reduced number of t can be provided.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the main parts of a beam flow control electrode driving circuit of an image display device according to an embodiment of the present invention, and FIG. 2 is an exploded perspective view showing an image display element used in a conventional image display device. Fig. 3 is an enlarged front view of the image display element, Fig. 4 is a block diagram showing the basic configuration of the drive circuit of the image display element, and Fig. 5 is a waveform diagram for explaining the operation of the drive circuit of Fig. 4. It is. 51 a to 51 c・------ Multiplier (3c), 52
a~52c...Divider (I6), 31a...
...Sample and hold circuit. Name of agent: Patent attorney Akira Okaji and others 2 Usage 1
Figure 1l JLi+N+ 9 i Figure 3 Figure 4

Claims (1)

[Claims] A screen coated with a phosphor that emits light when irradiated with an electron beam, and a line that generates an electron beam in each vertical division of the screen divided into a plurality of vertical divisions. a cathode; a deflection electrode that separates the electron beam generated by the line cathode into horizontal sections and deflects it in multiple stages in the vertical and horizontal directions until it reaches the screen; a beam flow control electrode for controlling the amount of emitted light from each pixel on the screen by controlling the amount of electron beams separated into horizontal sections irradiated onto the screen; a focusing electrode that controls the size of the emitted light from the top, a back electrode that controls the amount of electron beam from the line cathode, and an IC that generates a drive signal for the beam flow control electrode; An image display device that has an arithmetic circuit that converts the values of digital signals of R, G, and B images into exponential functions.