JPH04178083A - Solid-state image pickup device - Google Patents

Abstract

PURPOSE:To reduce a defect due to a flaw of a solid-state image pickup element by changing the read sequence of charges stored in plural photoelectric conversion elements and transferring the charge to one direction at a vertical transfer section at all times when the charge is read. CONSTITUTION:A charge of a photo diode PDB is read to a hatched part 104 under adjacent gates V1, V2 by a 4-phase transfer pulse phiV1. The read charge is moved to a cross hatched part 105 under gates V3, V4 of a diode PDA by 4-phase transfer pulses phiV1-phiV4. Then the 4-phase pulse phiV3 is used to read the charge of the diode PDA. and the charge is combined with the charge of the diode PDB and not transferred in the original direction. Similarly, the charge of the diode PDC is moved and the charge of the diode PDa is read to combine both the charges. The combined charge is represented in cross hatch similarly to the case above. In order to match the position of the. charges in preceding and succeeding fields, the combined charge is moved under gates V3, V4 of the diode PDA.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a solid-state imaging device that reads data by transferring signal charges stored in a solid-state imaging device.

BACKGROUND OF THE INVENTION In recent years, along with the development of semiconductor technology, research and development of solid-state image sensors has progressed, and they are now entering a period of full-scale widespread use as electronic eyes. In addition, with the rapid development of technological improvements in solid-state image sensors, there has been a demand for higher image quality, smaller size, ease of use, and cost reduction. Among these, the driving method of the solid-state image sensor plays the most important role in bringing out the performance of the solid-state image sensor.

A method of driving a solid-state image sensor in a conventional solid-state image sensor will be described below.

FIG. 2 is a diagram showing the configuration of the solid-state imaging device near the photodiode. This solid-state image sensor, as shown in the figure,
Photoelectric conversion element (hereinafter referred to as photodiode) 201,
Horizontal charge transfer device (hereinafter referred to as H-CCD) 202
, vertical charge transfer device (hereinafter referred to as V-CCD) 20
Consisting of 3. The H-CCD 202 receives a pulse φH
Charge transfer is performed by a two-phase transfer pulse consisting of + and φH2, and charge transfer is performed in the V-CCD 203 by a four-phase transfer pulse consisting of pulses φV1 to φv4.

FIG. 3(a) is an enlarged plan view of the vicinity of the photodiode, showing the photodiode 301. The V-CCD 502 is composed of a transfer gate (hereinafter referred to as gate) 303. FIG. 3(b) is a conceptual diagram showing the cross-sectional structure of the V-CCD, in which the gate electrode 304. It consists of a tfJ transfer channel 305.

The operation of a charge coupling method when reading charges from a photodiode in a conventional field accumulation mode in a solid-state imaging device configured as described above will be described.

The field storage mode is shown in the conceptual diagram of FIG.

An image is displayed on the television screen 401 using scanning lines 403 and 404 based on data read out from the vertical photodiode pixel array 402.

The pixel coupling direction, that is, which pixels of the photodiode pixel row 402 are coupled to each other is indicated by reference numerals 405 and 406. First, when scanning the scanning line 403 in a certain field on the television screen 401, the reference numeral 405
The pixel combination direction shown by is the same as the pixel ■.

Charges are combined in the direction of pixel ■ and pixel ■. In the next adjacent field, the scanning line 404
is scanned, and the combination of charges at that time is represented by the symbol 406
The same as the pixel ■ shown by ■ 1 The same as the pixel ■ ■.

Pixel ■ is combined in the same direction as ■.

The course of charge movement in the V-CCD during charge coupling when the field accumulation mode is performed in this manner will be described with reference to FIG.

FIG. 5 shows photodiodes 50 arranged vertically.
1. V-CCD 50 that transfers the accumulated charge in the vertical direction
2 is shown. Incidentally, it is indicated by V-CCDlige-IV+ to V4, and regarding the charge coupling direction 503, photodiodes having charges to be coupled are indicated by marks with double-headed arrows.

FIG. 5(B) shows a process in which the charges accumulated in the photodiode PD^ and the photodiode PDa are combined.

First, by φVI of the four-phase transfer pulse, V-CCD
The charge of the photodiode PDB is read out under the inner gates vl and v2. This state is shown in the shaded area 5 in Fig. 5(a).
Indicated by 04. Note that this hatched portion 504 indicates the position of the charge. The read charge is a 4-phase transfer pulse φv
V-CCD photodiode PD^ by 1~φv4
Adjacent gate v3. Move below V4. The progress of this charge movement is shown by a shaded area similar to the shaded area 504.

The state in which the charge of the photodiode PD has finished moving below the gates Vx, V4 is shown by a cross hatched portion 505, where the charge of the photodiode PD^ is transferred to the gate V3. V, is read out below. Here, the charge of the photodiode PDe, which has been transferred in advance, and the charge of the photodiode PD^ that has been read out are combined (the crosshatch portion 50
5). Then, when the charge coupling is completed, the charges are moved by the four-phase transfer pulses φvl to φV4 of the adjacent gates V, , V, , of the photodiodes PDa (crosshatch portion 506). Next, the photodiode PDC,P
As shown in FIG. 5(b), the charge coupling of DB is similar to the charge coupling of the photodiodes PD^ and PDH described above, where the charges are connected to the diagonal line portion 507 and the crosshatched portion 508.50.
It is carried out in a movement sequence of 9.

Here, a timing chart of the waveforms of the four-phase transfer pulses φv1 to φV4 is specifically shown in FIG. 4-phase transfer pulse φ
v1 to φV4 have three potentials, and only when they are at the "H" level, the photodiode and the transfer gate of the V-CCD are turned on, and the charges are read out. Also, V-CC
Charge transfer within D occurs between the "M" level and the "L" level.

Problems to be Solved by the Invention However, in the above-mentioned conventional configuration, when the charges read out from the photodiodes combine the charges of adjacent photodiodes, for example, from the crosshatch portion 505 in FIG. 5(a), As in the case of transfer to V-CCD 506, charge transfer is performed in the opposite direction to the direction in which charge is originally transferred to the V-CCD. Therefore, the potential bump generated between the gates of the V-CCD causes charges to be left behind, which appears in the form of noise in the output image in the form of scratches, resulting in a problem of lower yields of solid-state imaging devices.

The present invention solves the above-mentioned conventional problems, and aims to provide a method for driving a solid-state image sensor that can reduce scratch-like noise components seen in an output image of a solid-state image sensor.

Means for Solving the Problems In order to achieve the above object, the present invention provides a solid-state imaging device having a plurality of photoelectric conversion elements arranged in a matrix, a horizontal transfer section, and a vertical transfer section. The vertical transfer section is configured to transfer charges only in one direction when combining the charges stored in the vertical transfer section.

Function: The solid-state imaging device of the present invention having the above configuration changes the readout order when combining and reading out charges stored in a plurality of photoelectric conversion elements, and always transfers in one direction using the vertical transfer section. .

EXAMPLE Hereinafter, an example of the present invention will be described with reference to the drawings.

FIG. 1 is a charge transfer pattern diagram showing the process of charge transfer in this embodiment.

The photodiode 101 includes a plurality of photodiodes PD
Consists of A-PDB. Regarding the V-COD 102, its configuration is shown by gates 1 to V4. Regarding the charge binding direction, a mark 103 indicates a binding partner. Also, the combination of charges by four-phase transfer pulses.

Regarding transfer, the charge V-CCD 10 is
It shows the movement in 2. Regarding the field accumulation mode of the solid-state image sensor, it is equivalent to the conventional one shown in FIGS. 2 to 4.

The operation of the solid-state imaging device of this embodiment configured as described above will be described below.

First, the coupling of charges between the photodiode PD^ and the photodiode PDB in a certain field as shown in FIG. 1(a) will be explained.

The four-phase transfer pulse φV+ transfers the charge of the photodiode PDa to the gates v, , V2 in the adjacent V-CCDIOIs.
The data is read out in the shaded area 104 in FIG. 1(a) below.

The charges read out between the gates V, V2 are transferred to the photodiode PD^ by the four-phase transfer pulses φV, ~φv4.
Adjacent gate v3. Move to the crosshatch section 105 in FIG. 1(a) below v4. Therefore, the four-phase transfer pulse φ
Read the charge of photodiode PD^ by v3,
Photodiode PDB that was transferred in advance
(111(a) crosshatch portion 105).

Next, the charge coupling process in the next adjacent field shown in FIG. 1(b) will be explained. Since the field accumulation mode is adopted in the coupling direction shown in FIG. 1(a), in the next field, charges are coupled between the photodiodes PDa and the photodiodes PDc. First, the charge of the photodiode PDc is read out under the gates V, V4 by the four-phase transfer pulse φV3 (shaded area 107 in FIG. 1(b)). Next, by four-phase transfer pulses φV+ to φv4, the charges in the photodiode PDc are transferred to the gates V, V2 adjacent to the photodiode PDB (crosshatch portion 108 in FIG. 1(b)). Therefore, the photodiode PDs is activated by the four-phase transfer pulse φV1.
The charges of V, , V= are read out below this gate. The charge of the photodiode PDc, which has been transferred in advance, is combined with the charge of the photodiode PDe, which has been read out (crosshatch portion 10 in FIG. 1(b)).
8). Therefore, in order to align the charge position with the front and rear fields, the combined charge is transferred to the photodiode PDA.
The adjacent gate v3 is moved to below the gate v4 (black hatch section 109 in FIG. 1(b)).

As described above, according to this embodiment, by changing the order of reading from the photodiodes for each field, charge transfer can always be performed in a fixed direction.

In this example, the charge is coupled immediately after reading from the photodiode, but in any other case, the same effect can be obtained by transferring the charge in a fixed direction within the V-CCDIOI. Needless to say.

Effects of the Invention As is clear from the above explanation, the present invention improves the V-CCD by always transferring charges in a fixed direction in the V-CCD.
An excellent solid-state imaging device can be realized in which the influence of the potential bump generated between the gates of D is eliminated, and defects such as scratches on the solid-state imaging device can be reduced.

[Brief explanation of the drawing]

FIG. 1 is a pattern diagram showing the progress of charge movement in a solid-state imaging device according to an embodiment of the present invention, FIG. 2 is a conceptual diagram of the solid-state imaging device, and FIG. 3 is a configuration diagram near the photodiode of the solid-state imaging device. FIG. 4 is a conceptual diagram of the field accumulation mode, FIG. 5 is a pattern diagram showing the progress of charge movement in a conventional solid-state imaging device, and FIG. 6 is a vertical transfer pulse timing chart of the conventional example. 101...Photodiode (photoelectric conversion section)
, 102...V-CCD (first charge transfer unit). Figure 2 Figure 3 @ Load transfer reverse phrase Figure 4 405 稠 ＼ ＼
Study 4 Figure 5 Figure 6

Claims (2)

[Claims] (1) a photoelectric conversion section having a plurality of photoelectric conversion elements arranged in a matrix; a first charge transfer section that transfers charges stored in the photoelectric conversion section in a vertical direction;
a second charge transfer section that horizontally transfers the charges transferred by the charge transfer section, and stores the charges in adjacent photoelectric conversion elements among the plurality of photoelectric conversion elements by the first charge transfer section. A solid-state imaging device in which charge transfer is performed only in a certain direction when combining the charges. (2) When the first charge transfer unit reads out the charges from the photoelectric conversion unit as an image signal to an interlaced image display system, charge transfer is not required to combine the charges for the first field. 2. The solid-state imaging device according to claim 1, wherein charge transfer is performed to combine charges for the second field.