JPH0548976A - Driving method for solid-state image pickup device - Google Patents

Abstract

PURPOSE:To minimize the unsharp of an object moving at high speed in an electronic shutter mode and to improve dynamic resolution. CONSTITUTION:A solid state image pickup element to be driven is provided with a photodiode 11 arranged in two dimension, a vertical CCD register 12, a first memory CCD 14a and a second memory CCD 14b. Under the electronic shutter mode, the signal charge of the photodiode is read out twice in the blanking period of a first field. The signal charge read out first time is stored in the first memory CCD 14a, and the signal charge read out second time is stored in the second memory CCD 14b. In signal output period of the first field, the signal charge stored in the first memory CCD 14a is transferred to a horizontal register 15, and outputted via the register 5 and an output amplifier 16. The signal charge stored in the second memory CCD 14b is outputted in the signal output period of the second field.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of driving a frame interline type solid-state image pickup device, and more particularly to a method of driving a solid-state image pickup device in an electronic shutter mode.

[0002]

2. Description of the Related Art FIG. 3 is a schematic plan view of a conventional solid-state image sensor of this type. In the figure, reference numeral 21 denotes a photodiode for accumulating signal charges generated by photoelectric conversion, 2
Reference numeral 2 is a vertical CCD register for vertically transferring the signal charges generated in the photodiode, 23 is a read gate for reading the signal charges accumulated in the photodiode 21 to the vertical CCD register 22, and 24 is a vertical CC.
A memory CCD, 26, which receives the signal charge from the D register 22 at high speed and transfers it to the horizontal CCD register 25 line by line, converts the signal charge transferred in the horizontal CCD register 25 into a voltage signal and outputs it. The output amplifier 27 is a drain that receives the unwanted charges swept from the photodiode via the vertical CCD register 22 and absorbs the unwanted charges. Then, in this solid-state imaging device, the photodiode 21, the vertical CCD register 22,
The read gate 23 constitutes an interline image section, and the plurality of memory CCDs 24 constitute a memory section.

An electronic shutter mode is one of the driving modes of this solid-state image pickup device. In the case of the NTSC system, for example, the accumulation time is 1/60 seconds, and therefore, when a fast-moving object is imaged, the image is blurred. Therefore, in order to avoid this, the accumulation time is shortened to operate. Less than,
A conventional electronic shutter mode drive system will be described with reference to the timing chart of FIG.

In the case of the A field, a sweep pulse is applied to the transfer electrode of the vertical CCD register 22, and unnecessary charges accumulated in the photodiode 21 during the period from the application of the read pulse of the B field to the application of the sweep pulse of the A field. To the vertical CCD register 22,
This is drained by unnecessary charge sweep transfer pulse
Sweep to 7. Then, the signal charge accumulated in the photodiode 21 during the period from the application of the sweep pulse of the A field to the application of the read pulse by the read pulse is read to the vertical CCD register 22 and transferred to the memory CCD 24 by the high speed memory transfer pulse. .. Thereafter, the signal charge accumulated in the memory CCD 24 is line-shifted line by line by the horizontal CCD register 2
5 and outputs it at the television rate via the output amplifier 26. The same operation is performed in the B field.

[0005]

In the above-described conventional method for driving a solid-state image pickup device, there is a time difference of one field between the signal of the A field and the signal of the B field used for assembling the same image later. Images of the same frame existed and were constructed by signals at different timings. Therefore, the conventional driving method has a problem that an image is blurred when a high-speed moving object is imaged.

[0006]

According to the method for driving a solid-state image pickup device of the present invention, signal charges of light receiving elements arranged in a matrix are output through a vertical CCD register, a memory CCD and a horizontal CCD register. And, in the solid-state image pickup device to which the driving method of the present invention is applied, two memory CCDs are provided for each vertical CCD register.
Is provided. In the electronic shutter mode, the signal charges are continuously read twice in the first field period, and the respective signal charges are stored in different memories C.
The signal is accumulated in the CD, the first read signal charge is output in the first field period, and the second read signal charge is output in the second field period.

[0007]

Embodiments of the present invention will now be described with reference to the drawings. FIG. 1 is a block diagram of a solid-state imaging device driven by the driving method according to the present invention. In the figure, 11 is a photodiode for storing the signal charges generated by photoelectric conversion, 12 is a vertical CCD register for vertically transferring the signal charges generated in the photodiode, and 13 is the inside of the photodiode 11. The read gates 14a and 14b for reading the signal charges accumulated in the vertical CCD register 12 to the vertical CCD register 12 receive the signal charges from the vertical CCD register 12 at high speed,
First and second memory CCDs for transferring line by line to the next stage, 1
A horizontal CCD 5 receives the signal charges from the first and second memory CCDs 14a and 14b and horizontally transfers the signal charges.
A register 16 is an output amplifier that receives signal charges transferred from the horizontal CCD register 15 and converts the signal charges into a voltage signal and outputs the voltage signal. A register 17 receives unnecessary charges swept from the photodiode through the vertical CCD register 12. Is a drain that absorbs. Then, in this solid-state imaging device, the photodiode 11 and the vertical CCD register 1
2. The read gate 13 constitutes an interline image section, and the first and second memory CCDs 14a and 14b constitute a memory section.

The vertical CCD register 12 is driven by vertical clock pulses φV1 to φV4, the horizontal CCD register 15 is driven by horizontal clock pulses φH1 and φH2, and the first and second memory CCDs 14a and 14 are driven.
b is the first memory clock pulse φM1 to φM4, the second
It is driven independently by the memory clock pulses φS1 to φS4. The signal charges transferred in the vertical CCD register 12 are transferred to the first and second memory CCDs 14a and 1a depending on the states of the first and second memory clock pulses.
4b.

FIG. 2 is a timing chart of each clock pulse for explaining one embodiment of the present invention. In the A field, unnecessary charges accumulated in the photodiode 11 during the period from application of the B field sweep pulse 2 to application of the A field sweep pulse 1 are read to the vertical CCD register 12 by the sweep pulse 1, and then, An unnecessary charge sweep-out transfer pulse is applied to each transfer electrode of the vertical CCD register 12 to sweep out this unnecessary charge to the drain 17. After that, the signal charge is read for the first time by the read pulse 1, and this signal charge is transferred to the first memory CCD 14a by the first memory high-speed transfer pulse. Next, by the read pulse 2, the second-time signal charge is read to obtain the signal charge for the next field, and this is transferred to the second memory CCD 14b by the second memory high-speed transfer pulse.

Next, during the signal output period of the A field, the first
The signal charges transferred to the memory CCD 14a are transferred to the horizontal CCD register 15 by a line shift pulse and output via the output amplifier 16. In the subsequent B field, the unnecessary charge accumulated up to that point is read out to the vertical CCD register 12 by the sweep-out pulse 2 and is swept to the drain 17 by the unnecessary charge sweep-out transfer pulse. Within the signal output period of the B field, the charges transferred to the second memory CCD 14b in the A field are transferred to the horizontal CCD register 15 by the line shift pulse and output via the output amplifier 16.

When the solid-state image sensor is driven as described above,
Since the signal charges of both fields can be continuously accumulated, blurring of the image can be minimized even if a fast-moving image is taken.

The above is the operation in the electronic shutter mode, but in the normal operation, the method of reading the signal charge for each field and the method of reading the signal charge for both fields in the A field are performed. Either of these can be adopted. In the former case, the second,
Only one of the third vertical CCD registers 14a and 14b can be operated.

Although the above-mentioned embodiment relates to the electronic shutter drive system for sweeping unnecessary charges to the drain side,
The present invention is not limited to this type, but may be applied to a type in which a reverse bias is applied between the substrate and the well, and the unnecessary charge is extracted to the substrate side by utilizing the punch-through operation of the vertical npn transistor. It can be applied similarly. Further, a select gate may be arranged between the vertical CCD register 12 and the first and second memory CCDs 14a and 14b, and the select target memory CCD may be selected by this select gate.

[0014]

As described above, according to the present invention, the signal charges for the first and second fields are continuously read out in the first field period, and the signal charges are first and second respectively. Since the signals are output within the signal output period of two fields, according to the present invention, it is possible to reduce the time lag between the signals of the first field and the signals of the second field, and to minimize the blurring of the image. Can be kept at.

[Brief description of drawings]

FIG. 1 is a block diagram of a solid-state image sensor driven by an embodiment of the present invention.

FIG. 2 is a timing chart of each clock pulse for explaining one embodiment of the present invention.

FIG. 3 is a block diagram of a conventional solid-state image sensor.

FIG. 4 is a timing chart of each clock pulse for explaining a conventional example.

[Explanation of symbols]

 11, 21 ... Photodiodes 12, 22 ... Vertical CCD registers 13, 23 ... Read gate 14a ... First memory CCD 14b ... Second memory CCD 24 ... Memory CCD 15, 25 ... Horizontal CCD registers 16, 26 ... Output amplifier 17, 27 ... Drain

Claims (1)

[Claims] 1. A method for driving a solid-state imaging device, which reads out signal charges from a plurality of light-receiving elements arranged in a matrix and converts the signal charges into a voltage signal and outputs the voltage signal. The method for driving a solid-state image sensor, comprising: reading the signal charges of the above item, and outputting the signal charges read out in the first time period and the signal charges read out in the second time period in different field periods.