JPH04170049A - Semiconductor device - Google Patents

Abstract

PURPOSE:To attain desired delay by arranging dummy wiring which is not directly connected with a signal wiring and its in a potentially same phase or the reverse phase and that allows a stable selection. CONSTITUTION:Logical circuits 1 and 3 decide one output respectively when input is determined. A potential generating circuit 4 is a circuit which gives potential to dummy wiring 5, and the output can be selected by a fuse and the potential of the dummy wiring 5 is decided by the positions of the selected fuses F1-F3. The dummy wiring 5 is in the dame phase as signal wiring 23 having the fixed potential decide by the position of the selected fuse. The decided potential difference between both wiring layers 6 and 7 is generated by forming dummy wiring layer 7 in insulating layer 9 on a semiconductor substrate 10, the charge quantity between the wiring layer 6 and 7 is varied and the signal wiring 2 is allowed to have signal delay. Thus, the most suitable delay time is attained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and particularly to a semiconductor integrated device having a signal wiring layer.

[Conventional technology]

FIGS. 2(a) and 2(b) are a schematic circuit diagram and a partial sectional view of an example of a conventional semiconductor device. Conventionally, when laying out a semiconductor device, a delay logic element 8 was provided and connected between each of the logic circuits 1 and 3 shown in FIG. 2(a). At this time, a predetermined delay time due to the logic element 8 is obtained in the signal wiring 2.

As shown in FIG. 2(b), the signal wiring layer 6 is provided in the insulating layer 9 on the semiconductor substrate 10.

[Problem to be solved by the invention]

The conventional semiconductor device described above has the drawback that only a prescribed delay can be provided by the logic element, and the delay cannot be changed after the semiconductor device is manufactured.

[Means to solve the problem]

The semiconductor device of the present invention includes a dummy wiring layer provided in close proximity to a signal wiring layer provided in an insulating layer on a semiconductor substrate, and a potential in the dummy wiring that is in phase with or in phase opposite to the potential of the signal wiring layer. and a potential generation circuit having a switching element that provides a potential level of .

〔Example〕

Next, the present invention will be explained with reference to the drawings.

1<a) is a schematic circuit diagram of an embodiment of the present invention. Logic circuits 1 and 3 each output 1 when the input is determined.
One is decided. The potential generation circuit 4 is a circuit for applying a potential to the dummy wiring 5.

The output of the potential generating surface N4 can be selected by fuses, and the potential of the dummy wiring 5 is determined by the positions of the selected fuses F1 to F3. The dummy wiring 5 is a wiring that is in phase with the signal wiring 2 and has a constant potential determined by the position of the selected fuse.

FIG. 1(b) is a partial sectional view of the present invention.

By forming in the insulating layer 9 on the semiconductor substrate 10 a signal wiring layer 6 and a dummy wiring layer 7 having a constant potential difference determined by the position of a fuse selected in the same layer, both wiring layers 6 and 7 are formed. By creating a desired potential difference between the wiring layers 6,
By varying the amount of charge between the signal lines 7 and 7, it is possible to cause the signal wiring 2 to have a signal delay.

The delay is caused by fuses F1 to F shown in Figure 1(a).
, can be changed by selecting .

Note that in this embodiment, a dummy wiring layer 7 is provided under the signal wiring layer 6.
Although the case where the dummy wiring layer 7 is wired is described above, the same effect can be obtained even when the dummy wiring layer 7 is placed on the top, right, left, or a combination thereof.

Further, although this embodiment has been described with reference to a case in which a desired potential difference is obtained using a fuse, the same effect can be obtained by using a switching element other than a fuse.

〔Effect of the invention〕

As explained above, the present invention enables wiring by arranging a certain selectable dummy wiring in parallel with a predetermined signal wiring, which is not directly connected to the signal wiring and has the same or opposite phase potential. The amount of charge between wiring layers can be varied by the potential difference generated between the layers, thereby providing a desired delay. Therefore, there is an effect that the optimum delay time can be obtained for the signal wiring of the semiconductor device.

[Brief explanation of drawings]

FIGS. 1(a) and (b) are a schematic circuit diagram and a partial sectional view of the present invention, and FIGS. 2(a) and (b) are a schematic circuit diagram and a partial sectional view of an example of a conventional semiconductor device. be. 1.3...Logic circuit, 2...Signal wiring, 5...
Dummy wiring, 4... Potential difference generating circuit, 6... Signal wiring layer, 7... Dummy wiring layer, 8... Delay logic element.

Claims (1)

[Claims] A dummy wiring layer provided in close proximity to a signal wiring layer provided in an insulating layer on a semiconductor substrate, and a switching element that provides the dummy wiring with a potential level that is in phase or in phase with the potential of the signal wiring layer. What is claimed is: 1. A semiconductor device comprising: a potential generation circuit having a potential generation circuit;