JPH0416836B2 - - Google Patents

Info

Publication number
JPH0416836B2
JPH0416836B2 JP59066352A JP6635284A JPH0416836B2 JP H0416836 B2 JPH0416836 B2 JP H0416836B2 JP 59066352 A JP59066352 A JP 59066352A JP 6635284 A JP6635284 A JP 6635284A JP H0416836 B2 JPH0416836 B2 JP H0416836B2
Authority
JP
Japan
Prior art keywords
chip
card
insulating substrate
insulating
recess
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59066352A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60209885A (ja
Inventor
Shuji Hiranuma
Yoshikatsu Fukumoto
Hiroshi Oohira
Masayuki Oochi
Tamio Saito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP59066352A priority Critical patent/JPS60209885A/ja
Publication of JPS60209885A publication Critical patent/JPS60209885A/ja
Publication of JPH0416836B2 publication Critical patent/JPH0416836B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745—Mounting details of integrated circuit chips
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/20—Structure, shape, material or disposition of high density interconnect preforms
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/19—Manufacturing methods of high density interconnect preforms

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Financial Or Insurance-Related Operations Such As Payment And Settlement (AREA)
  • Credit Cards Or The Like (AREA)
JP59066352A 1984-04-02 1984-04-02 Ｉｃカ−ド Granted JPS60209885A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59066352A JPS60209885A (ja) 1984-04-02 1984-04-02 Ｉｃカ−ド

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59066352A JPS60209885A (ja) 1984-04-02 1984-04-02 Ｉｃカ−ド

Publications (2)

Publication Number Publication Date
JPS60209885A JPS60209885A (ja) 1985-10-22
JPH0416836B2 true JPH0416836B2 (enrdf_load_stackoverflow) 1992-03-25

Family

ID=13313375

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59066352A Granted JPS60209885A (ja) 1984-04-02 1984-04-02 Ｉｃカ−ド

Country Status (1)

Country Link
JP (1) JPS60209885A (enrdf_load_stackoverflow)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH082703B2 (ja) * 1986-03-14 1996-01-17 カシオ計算機株式会社 Ｉｃカ−ド
JP2609863B2 (ja) * 1987-05-22 1997-05-14 大日本印刷株式会社 Ｉｃカード用リードフレーム
FR2732796B1 (fr) * 1995-04-07 1997-05-09 Solaic Sa Procede pour fixer un element fonctionnel dans un corps de carte electronique a l'aide d'une matiere expansible

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2486685B1 (fr) * 1980-07-09 1985-10-31 Labo Electronique Physique Carte de paiement electronique et procede de realisation

Also Published As

Publication number Publication date
JPS60209885A (ja) 1985-10-22

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