JPH04163989A - Manufacture of printed wiring board - Google Patents
Manufacture of printed wiring boardInfo
- Publication number
- JPH04163989A JPH04163989A JP29136090A JP29136090A JPH04163989A JP H04163989 A JPH04163989 A JP H04163989A JP 29136090 A JP29136090 A JP 29136090A JP 29136090 A JP29136090 A JP 29136090A JP H04163989 A JPH04163989 A JP H04163989A
- Authority
- JP
- Japan
- Prior art keywords
- holes
- printed wiring
- wiring board
- board
- hole
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 10
- 238000007772 electroless plating Methods 0.000 abstract description 3
- 238000007747 plating Methods 0.000 abstract description 2
- 230000001105 regulatory effect Effects 0.000 abstract 2
- 230000002950 deficient Effects 0.000 abstract 1
- 238000005553 drilling Methods 0.000 abstract 1
- 238000009958 sewing Methods 0.000 abstract 1
- 238000010008 shearing Methods 0.000 abstract 1
- 239000000758 substrate Substances 0.000 description 12
- 238000000034 method Methods 0.000 description 4
- 239000011148 porous material Substances 0.000 description 2
- 238000005336 cracking Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0097—Processing two or more printed circuits simultaneously, e.g. made from a common substrate, or temporarily stacked circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
- H05K3/427—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in metal-clad substrates
Landscapes
- Structure Of Printed Boards (AREA)
Abstract
Description
【発明の詳細な説明】 （産業上の利用分野） 本発明はプリント配線板の製造方法に関する。[Detailed description of the invention] (Industrial application field) The present invention relates to a method of manufacturing a printed wiring board.
（従来の技術）
従来、プリント配線板は、電子部品を接続する等のため
に孔を設けている。(Prior Art) Conventionally, printed wiring boards have holes for connecting electronic components and the like.
このプリント配線板を製造するには、通常、ドリル等の
手段により孔を設けた後、金型パン千等により外形を加
工している。To manufacture this printed wiring board, holes are usually formed using a drill or the like, and then the outer shape is processed using a mold punch or the like.
（発明が解決しようとする課題）
しかし、プリント配線板の種類によっては、孔が基板の
片寄った位置に設けられることがあり、基板の位置によ
ってせん断応力に違いを生じる。(Problem to be Solved by the Invention) However, depending on the type of printed wiring board, the holes may be provided at offset positions on the board, and the shear stress varies depending on the position of the board.
そのため、外形を加工する際、金型が基板に平行に降下
しないで傾斜して降下し、基板に割れやクラック等を生
じる欠点があった。Therefore, when processing the external shape, the mold does not descend parallel to the substrate, but descends at an angle, resulting in the disadvantage of causing cracks, etc. in the substrate.
本発明の目的は、以上の欠点を改良し、外形を加工する
際の基板の割れ等を防止しうるプリント量
配線板の製造方法を提供するものである。SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a printed wiring board that can improve the above-mentioned drawbacks and prevent cracking of the board during processing of the external shape.
（課題を解決するための手段）
本発明は、上記の目的を達成するために、基板に孔を形
成するとともに、外形加工を行なうプリント配線板の製
造方法において、外形を加工する前に、基板の外形加工
箇所の外側に調整用の孔を設けることを特徴とするプリ
ント配線板の製造方法を提供するものである。(Means for Solving the Problems) In order to achieve the above object, the present invention provides a method for manufacturing a printed wiring board in which a hole is formed in a substrate and the outer shape is processed. The present invention provides a method for manufacturing a printed wiring board, characterized in that holes for adjustment are provided outside the contour-processed portion.
（作用）
基板の孔が少ないかあるいは全然無い部分の近傍は、孔
の多い部分の近傍に比べて、せん断応力が比較的に高く
なっている。従って、前者に近い外形の加工箇所の外側
に、予め調整用の孔を設けることにより、その外形加工
箇所のせん断路力を低下できる。それ故、基板全体のせ
ん断路力をほぼ均一にでき、金型を基板に平行に降下で
き、割れやクラックを生じることなく基板を打ち抜くこ
とができる。(Function) The shear stress is relatively higher in the vicinity of the parts of the substrate where there are few or no pores than in the vicinity of the parts with many pores. Therefore, by providing an adjustment hole in advance on the outside of a processed location with an external shape similar to the former, it is possible to reduce the shear path force at the processed location. Therefore, the shear path force on the entire substrate can be made almost uniform, the mold can be lowered parallel to the substrate, and the substrate can be punched out without causing cracks or cracks.
（実施例） 以下、本発明を実施例に基づいて説明する。(Example) Hereinafter, the present invention will be explained based on examples.
先ず、第１図に示す通り、絶縁基板１にドリルで孔２を
明ける。First, as shown in FIG. 1, a hole 2 is made in an insulating substrate 1 with a drill.
次に、第２図に示す通り、無電解めっき処理等により、
プリント配線３及びスルーホールめっき４を形成する。Next, as shown in Figure 2, by electroless plating etc.
Printed wiring 3 and through-hole plating 4 are formed.
無電解めっき処理後、第３図に示す通り、孔２の少ない
部分に近い外形加工箇所５の外側に、比較的径の大きい
調整用の孔６をドリル加工して設ける。After the electroless plating process, as shown in FIG. 3, an adjustment hole 6 having a relatively large diameter is drilled on the outside of the contour processing area 5 near the part with few holes 2.
調整用の孔６を形成後、第４図に示す通り、金型により
外形加工箇所５を打ち抜いて長孔７とミシン目８を設け
る。After forming the adjustment hole 6, as shown in FIG. 4, the outer shape processing portion 5 is punched out using a mold to provide a long hole 7 and a perforation 8.
上記実施例によれば、絶縁基板１に調整用の孔６を設け
ることにより、割れ等を生じることなく外形加工でき、
長孔７やミシン目８を設けることができる。According to the above embodiment, by providing the adjustment holes 6 in the insulating substrate 1, the external shape can be processed without causing cracks, etc.
Elongated holes 7 and perforations 8 can be provided.
（発明の効果）
以上の通り、本発明の製造方法によれば、せん断路力の
比較的高い外形加工箇所の外側に調整用の孔を設けてい
るために、割れやクラックを生じることなく外形を加工
でき、不良を低減しうるプリント配線板が得られる。(Effects of the Invention) As described above, according to the manufacturing method of the present invention, since the adjustment holes are provided outside of the contour processing area where the shear path force is relatively high, the contour can be shaped without causing cracks or cracks. It is possible to obtain a printed wiring board that can be processed and reduce defects.
第１図〜第４図は本発明の実施例の製造工程を示し、第
１図は孔を設けた絶縁基板の平面図、第２図は無電解め
っき処理後の絶縁基板の平面図、第３図は調整用の孔を
設けた絶縁基板の平面図、第４図は外形加工後の絶縁基
板の平面図を示す。
１・・・絶縁基板、 ２・・・孔、
３・・・プリント配線板、 ５・・・外形加工箇所、６
・・・調整用の孔。
特許出願人 日立ニーアイシー株式会社第１図
と
第３図
第２図
？
第４図1 to 4 show the manufacturing process of an embodiment of the present invention, FIG. 1 is a plan view of an insulating substrate with holes provided, FIG. FIG. 3 is a plan view of an insulating substrate provided with adjustment holes, and FIG. 4 is a plan view of the insulating substrate after external processing. 1... Insulating board, 2... Hole, 3... Printed wiring board, 5... External shape processing location, 6
...Adjustment hole. Patent applicant Hitachi NIC Co., Ltd. Figure 1 and Figure 3 Figure 2? Figure 4
Claims (1)
プリント配線板の製造方法において、外形を加工する前
に、基板の加工箇所の外側に調整用の孔を設けることを
特徴とするプリント配線板の製造方法。(1) A printed wiring board manufacturing method in which a hole is formed in a board and an external shape is processed, which is characterized in that, before processing the external shape, holes for adjustment are provided outside the processed area of the board. Method of manufacturing the board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2291360A JPH07105581B2 (en) | 1990-10-29 | 1990-10-29 | Method for manufacturing printed wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2291360A JPH07105581B2 (en) | 1990-10-29 | 1990-10-29 | Method for manufacturing printed wiring board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH04163989A true JPH04163989A (en) | 1992-06-09 |
| JPH07105581B2 JPH07105581B2 (en) | 1995-11-13 |
Family
ID=17767919
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2291360A Expired - Lifetime JPH07105581B2 (en) | 1990-10-29 | 1990-10-29 | Method for manufacturing printed wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH07105581B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2013197418A (en) * | 2012-03-21 | 2013-09-30 | Shinko Seisakusho:Kk | Wiring board suitable to sealing component, chip component, and method of manufacturing the same |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58159392A (en) * | 1982-03-17 | 1983-09-21 | 日立化成工業株式会社 | Method of producing printed circuit board |
| JPS59215786A (en) * | 1983-05-24 | 1984-12-05 | 興亜電工株式会社 | Blank board for punching printed circuit board |
| JPS61263294A (en) * | 1985-05-17 | 1986-11-21 | 松下電器産業株式会社 | Manufacture of printed wiring board |
| JPH02231787A (en) * | 1989-03-03 | 1990-09-13 | Sharp Corp | Manufacture of printed wiring board |
| JPH03240291A (en) * | 1990-02-19 | 1991-10-25 | Matsushita Electric Ind Co Ltd | Manufacture of printed circuit board |
-
1990
- 1990-10-29 JP JP2291360A patent/JPH07105581B2/en not_active Expired - Lifetime
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58159392A (en) * | 1982-03-17 | 1983-09-21 | 日立化成工業株式会社 | Method of producing printed circuit board |
| JPS59215786A (en) * | 1983-05-24 | 1984-12-05 | 興亜電工株式会社 | Blank board for punching printed circuit board |
| JPS61263294A (en) * | 1985-05-17 | 1986-11-21 | 松下電器産業株式会社 | Manufacture of printed wiring board |
| JPH02231787A (en) * | 1989-03-03 | 1990-09-13 | Sharp Corp | Manufacture of printed wiring board |
| JPH03240291A (en) * | 1990-02-19 | 1991-10-25 | Matsushita Electric Ind Co Ltd | Manufacture of printed circuit board |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2013197418A (en) * | 2012-03-21 | 2013-09-30 | Shinko Seisakusho:Kk | Wiring board suitable to sealing component, chip component, and method of manufacturing the same |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH07105581B2 (en) | 1995-11-13 |
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