JPH04162460A - Lead frame for semiconductor device - Google Patents

Lead frame for semiconductor device

Info

Publication number
JPH04162460A
JPH04162460A JP28648390A JP28648390A JPH04162460A JP H04162460 A JPH04162460 A JP H04162460A JP 28648390 A JP28648390 A JP 28648390A JP 28648390 A JP28648390 A JP 28648390A JP H04162460 A JPH04162460 A JP H04162460A
Authority
JP
Japan
Prior art keywords
plating layer
plating
lead frame
alloy
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP28648390A
Other languages
Japanese (ja)
Inventor
Satoshi Chinda
聡 珍田
Osamu Yoshioka
修 吉岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Cable Ltd
Original Assignee
Hitachi Cable Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Cable Ltd filed Critical Hitachi Cable Ltd
Priority to JP28648390A priority Critical patent/JPH04162460A/en
Publication of JPH04162460A publication Critical patent/JPH04162460A/en
Pending legal-status Critical Current

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  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To obtain a lead frame base for a semiconductor device which can be soldered at a low temperature even without flux by providing a gloss Ni plating layer on a base of a lead frame made of copper or copper alloy, and laminating an Ni-Co-P alloy plating layer thereon. CONSTITUTION:The thickness of an Ni-plating layer 2 to be provided on a substrate (Cu or Cu alloy) 1 for a semiconductor substrate needs 2mum or more so as to suppress diffusion of the Cu from a substrate material and to obtain wire bondability. An Ni-Co-P alloy plating layer 3 is thinly provided with the layer 2 as a base, and two gloss Ni/Ni-Co-P layers are laminated by plating on the substrate Cu. However, since the layer 3 is very hard and brittle, it is improper to solely adhere it thickly, and its thickness is set to about 0.20mum. As a result that composition is analyzed by collecting part of the Ni-Co-P alloy plating layer, if about 1-20wt.% of Co and 3-15wt.% of P are contained, it is discovered that solder wettability is best at a soldering temperature of 280 deg.C even without flux.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は、半導体装置用リードフレームのめっき構造に
係り、特に旧めっきのはんだぬれ性を改善2したリード
フレームに関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a plating structure of a lead frame for a semiconductor device, and particularly to a lead frame in which the solderability of old plating has been improved.

[従来の技術] 半導体用リードフレームのめっき膜に要求される機能は
、ワイヤボンディング性、ダイボンデインク性等にすぐ
れていることは勿論であるが、特に、アウターリートピ
ンのめっき膜について、基板実装上の点からすぐれたは
んだぬれ性が求められる。
[Prior Art] The functions required of plating films for semiconductor lead frames include excellent wire bonding properties, die bonding properties, etc. Excellent solderability is required from a mounting point of view.

特に、高出力用ICでは組立時および使用時の熱衝撃に
耐えるため、下地に旧のめっき層を設け、素子搭載部に
のみに銀めっきを設けた部分めっきリードフレームが使
用されており、アウターリードピンは、旧めっきで被覆
されている。
In particular, in order to withstand thermal shock during assembly and use, high-output ICs use partially plated lead frames with an old plating layer on the base and silver plating only on the element mounting area. The lead pins are covered with old plating.

Niは耐食性酸化被膜を形成し易いため、はんたぬれ性
を保証するには、フラックスの使用が必要である。
Since Ni tends to form a corrosion-resistant oxide film, it is necessary to use flux to ensure solder wettability.

したがって、これまでは、リードピンに溶融はんだを設
けた後、残留フラックスの除去を目的として、フロン系
溶剤またはトリクロルエチレンに代表される塩素系有機
溶剤で後洗浄を行っていた。
Therefore, in the past, after applying molten solder to lead pins, post-cleaning was performed with a fluorocarbon solvent or a chlorinated organic solvent such as trichlorethylene in order to remove residual flux.

「発明が解決しようとする課題] ところが、近年、地球的規模の環境問題等から、前記の
フロンおよび有機溶剤の使用については、禁止もしくは
制限される傾向にあり、ICなと電子部品の後洗浄に対
しても厳しい状況になりつつある。
``Problem to be solved by the invention'' However, in recent years, due to global environmental problems, the use of fluorocarbons and organic solvents has tended to be prohibited or restricted, and the use of fluorocarbons and organic solvents has become increasingly difficult to clean after cleaning ICs and other electronic components. The situation is becoming increasingly difficult.

したかって、はんだ付けには非塩素系のフラックスを使
用するか、あるいはフラックスなしてもはんだぬれ性の
よいNiめっき方法を開発するなどの手段をとらなけれ
ばならない。
Therefore, it is necessary to use non-chlorine flux for soldering, or to develop a Ni plating method that provides good solderability even without flux.

Niめっきのはんだぬれ性を改善するためには、めっき
の光沢化が効果があることは経験的に認められているが
、現状では、光沢Niめっきの場合は、はんだ付温度が
高いため、より低温のはんだ付温度で、フラックスなし
の状態下でも接合可能なNiめっき手段の開発が求めら
れていた。
It has been empirically recognized that making the plating glossier is effective in improving the solderability of Ni plating, but currently, bright Ni plating requires higher soldering temperatures, so There was a need to develop a Ni plating method that would allow bonding at low soldering temperatures and without flux.

本発明の目的は、光沢Niめっき層を設けた基板上に、
フラックスなしでもより低温化てはんた付けが可能な半
導体装置用リードフレーム基体を提供することである。
The purpose of the present invention is to provide a substrate with a bright Ni plating layer,
It is an object of the present invention to provide a lead frame base for a semiconductor device which can be soldered at a lower temperature even without flux.

[課題を解決するための手段] ゛ 上記課題を解決するための本発明に係る半導体装置用リ
ードフレームの構成は、銅または銅合金からなるリード
フレームの基体上に、光沢旧めめっき層を設け、これに
積層してNi−Co−P合金めっき層を設けるようにし
たことである。
[Means for Solving the Problems] ゛The structure of the lead frame for a semiconductor device according to the present invention for solving the above problems includes providing a bright old plating layer on the base of the lead frame made of copper or copper alloy. , a Ni-Co-P alloy plating layer is laminated thereon.

[作用コ 半導体装置用基板(CuまたはCu合金)上に設けるN
iめっきの厚さは、基板材料からのCuの拡散を抑え、
ワイヤボンディング性を確保するために2μm以上必要
である。
[Operation] N provided on the semiconductor device substrate (Cu or Cu alloy)
The thickness of i-plating suppresses the diffusion of Cu from the substrate material,
A thickness of 2 μm or more is required to ensure wire bondability.

本発明によるNi−Co−Pめっき層、光沢Niめつき
層を下地として薄く設け、基板Cuの表面に光沢Ni/
 Ni −Co −Pの2層のめっきを積層する。
A Ni-Co-P plating layer according to the present invention and a glossy Ni plating layer are provided thinly as a base, and the surface of the substrate Cu is coated with a glossy Ni/coated layer.
Two layers of Ni-Co-P plating are laminated.

たたし、Ni−Co−Pめつき層は、非常に硬く脆い性
質のため、単独で厚付けすることは、加工上は不適当て
あり、約0.20μmの厚さとする。
However, since the Ni-Co-P plating layer is very hard and brittle, it would be inappropriate for processing to thicken it alone, so the thickness is set to about 0.20 μm.

本発明で採用したNi−Co−Pめっき層の1部を採取
して、組成分析を行った結果、COは、1〜20wt%
程度、Pは、3〜15 w t%程度含有した場合には
、はんだぬれ性は最も良好であることがわかった。
A portion of the Ni-Co-P plating layer employed in the present invention was sampled and analyzed for its composition. As a result, CO was 1 to 20 wt%.
It was found that the solder wettability was the best when P was contained in an amount of about 3 to 15 wt%.

[実施例コ 以下本発明の一実施例を試験結果にもとづいて説明する
[Example 1] An example of the present invention will be described below based on test results.

まず、基板となる銅合金寸法、50mmX20mmX0
.25mmの試料を脱脂および酸洗処理により、清浄化
し、これら試料に光沢旧めっきを約3μm厚さに設けた
。光沢NIめっき液の組成はつぎの通りである。
First, the dimensions of the copper alloy that will become the substrate are 50mm x 20mm x 0.
.. 25 mm samples were cleaned by degreasing and pickling, and a bright old plating was applied to the samples to a thickness of about 3 μm. The composition of the bright NI plating solution is as follows.

Ni50  ・6H20・・・・・・240 g / 
1Nicl  ・6H20・・・・・・40g/1HB
O3・・・・・・40 g/ 1 荏原ニーシライト#61・・・5 ml / 1同  
     上    #  6 3 ・=  1 0 
ml /  1ついで、上記試料の上に旧−Co −P
合金めつきを0.15μm厚さに設けた。めっき液の組
成はつぎの通りである。
Ni50 ・6H20...240 g/
1 Nicl ・6H20...40g/1HB
O3...40 g/1 Ebara Nishilite #61...5 ml/1 same
Top #6 3 ・= 1 0
ml/1 then old-Co-P on top of the above sample
Alloy plating was provided to a thickness of 0.15 μm. The composition of the plating solution is as follows.

Ni50  ・6H20・・・160g/1Nicl 
 ・6H20・・・40 g/ 1H3PO3・・・6
g/I C’o S O”7 H20−0−20’g / 1図
は本発明の実施例のリードフレームの部分断面図である
。図において、1は、銅合金基体、2は、光沢Niめっ
き、3は、Ni−Pe−P合金めつきである。
Ni50 ・6H20...160g/1Nicl
・6H20...40 g/ 1H3PO3...6
g/I C'o SO"7 H20-0-20'g/1 Figure is a partial sectional view of a lead frame according to an embodiment of the present invention. In the figure, 1 is a copper alloy substrate, 2 is a glossy Ni plating, 3 is Ni-Pe-P alloy plating.

以下に、はんだ付は性試験について説明する。Below, the soldering test will be explained.

まず、はんだ浴槽(Sn62%、Pb38%共晶)を準
備し、上記のようにして調整した2層めっきを施した試
料(フラックスは使用しない)をサンプルクリップに挟
み、自動昇降装置を用いて、所定の試験温度に加熱した
はんだを浴槽中に10秒間浸漬し、引上げ、各浴槽毎に
、各試料のはんだぬれ状態を目視観察した。
First, prepare a solder bath (62% Sn, 38% Pb eutectic), hold the two-layer plating sample prepared as described above (no flux is used) between sample clips, and use an automatic lifting device to The solder heated to a predetermined test temperature was immersed in a bathtub for 10 seconds, pulled out, and the solder wetting state of each sample was visually observed in each bathtub.

浸漬温度(はんだ浴温)は、夫々240.260.28
0.300および320°Cの5温度である。
The immersion temperature (solder bath temperature) is 240.260.28, respectively.
There are 5 temperatures: 0.300 and 320°C.

はんだぬれ状態の目視観察の判断基準の以下の通りであ
る。
The criteria for visual observation of the solder wet state are as follows.

○印:全表面が均一に完全にぬれたもの△印:わずかに
めっき面が露出したもの×印:10%以上の面積ではん
たがはがれ、下地面がはっきり露出したもの なお、比較のために、Nj=Co−Pめつき層を設けな
い光沢Niめっき層のみの試料についても同様な条件で
試験し評価した。     ・ つぎに、上記試料は、実際の組立工程で熱履歴をうける
ので、上記試料に150°C×30分の加熱処理を施し
た後のはんだぬれ性試験を行った。
○ mark: The entire surface is completely and uniformly wetted △ mark: The plated surface is slightly exposed × mark: The solder has peeled off over 10% of the area and the underlying surface is clearly exposed. For comparison purposes only. Furthermore, a sample with only a bright Ni plating layer without a Nj=Co-P plating layer was also tested and evaluated under the same conditions. -Next, since the above sample undergoes thermal history during the actual assembly process, the above sample was subjected to a heat treatment of 150°C for 30 minutes and then subjected to a solderability test.

浸漬試験条件は、すべて前記の加熱処理前のものと同様
である。
All immersion test conditions were the same as those before the heat treatment described above.

浸漬試験は、各試験に対して5回以上実施した。The immersion test was conducted five or more times for each test.

以上述へるように、Ni/ Ni−Co −Pの2層め
っきを設けた試料を(1)加熱前および(2)加熱処理
(150°C×30分)後について、5n−Pb共品は
んだ浴槽中に、試験温度240〜320℃の5段階の温
度で浸漬試験後のはんたぬれ性の観察結果を下記の表に
示す。
As mentioned above, the samples with two-layer plating of Ni/Ni-Co-P were tested (1) before heating and (2) after heat treatment (150°C x 30 minutes) with 5n-Pb. The table below shows the observation results of solder wettability after an immersion test in a solder bath at five test temperatures ranging from 240 to 320°C.

上記の表からつぎのことかわかる。The following can be seen from the table above.

(1)同上条件で、めっき液にCO3O4・7H20を
1g/l添加するとはんだぬれ性は加熱エージング後も
著しく改善されることがわかる。
(1) Under the same conditions as above, it can be seen that when 1 g/l of CO3O4.7H20 is added to the plating solution, the solder wettability is significantly improved even after heat aging.

(2)  同上条件で、めっき液にCO3O4・7H2
0はIg/1以上でよいが、はんたぬれ性安定のために
は5g/1以上がよくコストの点を含めると5〜20 
g / 1の範囲が最も効果的である。
(2) Under the same conditions as above, the plating solution contains CO3O4 and 7H2.
0 may be Ig/1 or more, but in order to stabilize solder wettability, 5g/1 or more is better, and if cost is included, 5 to 20
The g/1 range is the most effective.

以」二の結果から、Ni−Co−Pめっき層を設けるこ
とにより、フラックスなしでも、280°Cのはんだ温
度で、はんだぬれ性を保つことができる。
From the above two results, by providing the Ni-Co-P plating layer, solder wettability can be maintained at a soldering temperature of 280°C even without flux.

特にNj−Co−Pめっき層を設ける時に、めっき液中
への、Co50 ・7H20の(硫酸第1鉄)の添加量
によって、その効果を高めることができる。すなわち、
Co50  ・7H20の添加量を5〜20 g / 
1にした場合の効果が最高で、260℃でもはんだぬれ
性は良好であることがわかった。
In particular, when providing an Nj-Co-P plating layer, the effect can be enhanced by changing the amount of Co50.7H20 (ferrous sulfate) added to the plating solution. That is,
The amount of Co50/7H20 added is 5 to 20 g/
It was found that the effect was the highest when the temperature was set to 1, and the solder wettability was good even at 260°C.

[発明の効果] 本発明により半導体装置用リードフレーム基板に光沢旧
/Ni−Co−Pの2層めっきを設け、フラックスなし
で、より低温ではんた付けが可能になるため、従来のよ
うに、残留フラックス除去のための有機溶剤による後洗
浄処理作業を省くことができる。このことは、 (1)  フロン等の利料費および人工費が節減できる
ことは言うまでもなく、 (2)フロンのよる環境破壊、塩素系溶剤による発癌性
の問題を回避できるという大きな効果がある。また、 (3)  はんだ付は時にフラックスを使用する必要が
なくなり、この場合残留フラックスによる電子部品の腐
食による故障を起こすことがない。
[Effects of the Invention] According to the present invention, a two-layer plating of gloss old/Ni-Co-P is provided on a lead frame substrate for a semiconductor device, and soldering can be performed at a lower temperature without flux, which makes it possible to solder at a lower temperature than before. , the post-cleaning process using an organic solvent for removing residual flux can be omitted. This has the great effect of (1) saving interest costs and labor costs for fluorocarbons, and (2) avoiding environmental damage caused by fluorocarbons and carcinogenicity caused by chlorinated solvents. In addition, (3) soldering sometimes eliminates the need to use flux, and in this case, there is no possibility of failure due to corrosion of electronic components due to residual flux.

また、より低温度ではんた伺は作業が可能となり、他の
電子部品に熱的な損傷を与えなくなるので基板の品質向
上に有効である。
In addition, soldering can be performed at a lower temperature, which prevents thermal damage to other electronic components, which is effective in improving the quality of the board.

【図面の簡単な説明】[Brief explanation of the drawing]

−1〇 − 図は、本発明の半導体装置用リードフレームの一実施例
の部分断面図である。 1:銅合金基体、 2:光沢Niめっき層、 3:Ni−Co−P合金めっき層。 = 11− 1:銅合金基体 2:光沢Niめっき層 3:Ni=Go−P合金めっき層
-10- Figure is a partial cross-sectional view of an embodiment of a lead frame for a semiconductor device according to the present invention. 1: Copper alloy substrate, 2: Bright Ni plating layer, 3: Ni-Co-P alloy plating layer. = 11- 1: Copper alloy base 2: Bright Ni plating layer 3: Ni=Go-P alloy plating layer

Claims (1)

【特許請求の範囲】[Claims] 1、銅または銅合金からなるリードフレーム基体上に、
光沢ニッケルめっき層を設け、これに積層してNi−C
o−P合金めっき層を設けたことを特徴とする半導体装
置用リードフレーム。
1. On a lead frame base made of copper or copper alloy,
A bright nickel plating layer is provided, and Ni-C is laminated on this.
A lead frame for a semiconductor device, characterized in that an o-P alloy plating layer is provided.
JP28648390A 1990-10-24 1990-10-24 Lead frame for semiconductor device Pending JPH04162460A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP28648390A JPH04162460A (en) 1990-10-24 1990-10-24 Lead frame for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP28648390A JPH04162460A (en) 1990-10-24 1990-10-24 Lead frame for semiconductor device

Publications (1)

Publication Number Publication Date
JPH04162460A true JPH04162460A (en) 1992-06-05

Family

ID=17704984

Family Applications (1)

Application Number Title Priority Date Filing Date
JP28648390A Pending JPH04162460A (en) 1990-10-24 1990-10-24 Lead frame for semiconductor device

Country Status (1)

Country Link
JP (1) JPH04162460A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6110608A (en) * 1996-12-10 2000-08-29 The Furukawa Electric Co., Ltd. Lead material for electronic part, lead and semiconductor device using the same
WO2006059578A1 (en) * 2004-12-03 2006-06-08 Murata Manufacturing Co., Ltd. Electric contact part, coaxial connector, and electric circuit device using the part and the connector

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6110608A (en) * 1996-12-10 2000-08-29 The Furukawa Electric Co., Ltd. Lead material for electronic part, lead and semiconductor device using the same
USRE38588E1 (en) * 1996-12-10 2004-09-14 The Furukawa Electric Co., Ltd. Lead material for electronic part, lead and semiconductor device using the same
WO2006059578A1 (en) * 2004-12-03 2006-06-08 Murata Manufacturing Co., Ltd. Electric contact part, coaxial connector, and electric circuit device using the part and the connector
US7632112B2 (en) 2004-12-03 2009-12-15 Murata Manufacturing Co., Ltd. Electrical contact component, coaxial connector, and electrical circuit device including the same

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