JPH04150210A - Agc circuit - Google Patents

Abstract

PURPOSE:To easily revise an AGC level by amplifying and smoothing an input signal, comparing the signal with an AGC level setting signal and controlling an amplification factor of an input amplifier depending on a count of an up- down counter by an output of a comparator. CONSTITUTION:The AGC circuit is provided with an input amplifier 2 amplifying an input signal, a smoothing circuit 3 smoothing an output level of the input amplifier 2 and a comparator 5 comparing an output of the smoothing circuit 3 with an externally given AGC level setting signal and outputting the result representing the relation of quantity. Then the amplification factor of the input amplifier 2 is controlled in response to the count of an up-down counter 7 counting up or counting down in response to the output of the comparator 5. Thus, the AGC level is easily revised.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to an AGC circuit that converts an input signal with varying amplitude into an output signal with constant amplitude.

[Conventional technology]

FIG. 2 is a block diagram showing a conventional AGC circuit.

As shown in the figure, an analog input signal input from input signal terminal 1 is inputted via a resistor to the negative phase input (-) of operational amplifier 2 which constitutes the input amplifier, and the output of operational amplifier 2 is connected to this operational amplifier. The output of the integrator 3 is connected to the input of the integrator 3 that smoothes the level of the output signal of the amplifier 2, and to the input of the switches SWI to SW4. /D converter 4
are given for each input.

The output of this A/D converter 4 is input to a decoder 8, and a plurality of outputs of the decoder 8 are connected to switches SWI to S.
It is input to the control input that controls conduction/non-conduction of W4.

Further, the outputs of the switches SW4 and SW4 are applied to the negative phase input (-) of the operational amplifier 2 via a resistor that together with the operational amplifier 2 constitutes an input amplifier.

Furthermore, the positive phase input (+) of the operational amplifier 2 is grounded.

Note that the output of this AGC circuit is output from the output terminal of the operational amplifier 2.

Next, the operation will be explained. The analog input signal input from the input signal terminal 1 is amplified by the operational amplifier 2,
This amplified signal is integrated by an integrator 3, thereby smoothing it to the average level of the input signal.

This analog input signal smoothed to an average level is converted into a digital signal by the A/D converter 4.

The digital signal that is the output of the A/D converter 4 is input to the decoder 8, and the decoder 8 makes one of the switches SW1 to SW4 conductive according to the input digital signal, and outputs the operational amplifier 2. is fed back to the negative phase input (-) of the operational amplifier 2 via the turned-on switch and the corresponding resistor that controls the amount of feedback.

In the initial state, since no input signal is normally input from the input signal terminal 1, the output of the decoder circuit 8 is set to maximize the amplification factor of the input amplifier.

[Problem to be solved by the invention]

Since the conventional AGC circuit was configured as above,
The desired output level of the AGC circuit (hereinafter referred to as AGC level) is uniformly determined by the average level of the input signal input from the input signal terminal 1, and the decoder 8
When changing the AGC level by changing the decoding pattern, there is a problem in that the output level of the AGC circuit changes rapidly.

In addition, when changing the AGC level, it is necessary to change the decoding pattern of the decoder 8 as described above, but the problem is that the decoder 8 is usually composed of a ROM etc., and it is not easy to change its contents. was there.

This invention was made to solve the above problems, and allows the AGC level to be easily changed.
Moreover, when changing the AGC level, the aim is to obtain an AGC circuit in which the output level of the AGC circuit gradually changes.

[Means to solve the problem]

The AGC circuit according to the present invention includes an input amplifier that amplifies an input signal, a smoothing circuit that smoothes the output level of the input amplifier, an output value of the smoothing circuit, and an externally applied AGC circuit.
A comparator that compares the value of the GC level setting signal and outputs the magnitude relationship, an up/down counter that counts up or down depending on the output of the comparator, and a counter that counts up or down depending on the output of the comparator. , and means for controlling the amplification factor of the input amplifier.

[Effect]

In the AGC circuit according to the present invention, an input amplifier amplifies an input signal, a smoothing circuit smoothes the output level of the input amplifier, and a comparator compares the output value of the smoothing circuit with an externally applied AGC level setting. The value of the signal is compared and the magnitude relationship is outputted, an up-down counter performs up-counting or down-counting according to the output of the comparator, and the input amplifier is amplified according to the count value of the up-down counter. Since the ratio is controlled, if the AGC level setting signal is changed, the AGC level also changes, and even at that time, the amplification ratio of the input amplifier gradually changes according to the change in the count value of the up/down counter.

〔Example〕

FIG. 1 is a block diagram showing one embodiment of an AGC circuit according to the present invention. As shown in the figure, input signal terminal 1
The analog input signal input from
The output of the operational amplifier 2 is connected to the input of the integrator 3 that smoothes the level of the output signal of the operational amplifier 2, and to the input of the switch SWI to SW4, the output of the integrator 3 is an analog signal that is the output of the integrator 3. A to convert into a digital signal
/D converter 4 input.

The output of the A/D converter 4 is input to one input of the comparator 5, the output of the comparator 5 is input to the pulse generator 6, and the multiple outputs of the pulse generator 6 are input to the up-down carantuff. is given to.

A plurality of outputs of the up-down carantuff are input to the decoder 8, a plurality of outputs of the decoder 8 are control inputs for controlling conduction/non-conduction of the switches SWI to SW4, and outputs of the switches SWI to SW4 are connected to the operational amplifier 2. It is applied to the negative phase input (-) of the operational amplifier 2 via a resistor constituting the input amplifier.

Further, AGC level setting data applied from the AGC level setting data input terminal 9 is applied to the other input of the comparator 5.

Furthermore, the positive phase input (+) of the operational amplifier 2 is grounded.

The operation of the output of this AGC circuit, which is output from the operational amplifier 2, will be explained next. The analog input signal input from the input signal terminal 1 is amplified by the operational amplifier 2,
This amplified signal is integrated by the integrator 3, thereby smoothing it to the average level of the input signal.

This analog input signal smoothed to an average level is converted into a digital signal by the A/D converter 4. The digital signal which is the output of the A/D converter 4 is given to one input of the comparator 5, and the digital AGC level given from the AGC level setting data input terminal 9 connected to the other input of the comparator 5. The comparison result signal (
For example, a signal of "H" or "L" level) is output from the comparator 5.

The output of the comparator 5 is input to a pulse generator 6, and the pulse generator 6 generates an up-count pulse or a down-count pulse according to the comparison result signal indicating the magnitude relationship output from the comparator 5. One of the two pulses is generated.

The up-down counter 7 performs up-counting or down-counting on one of the up-count pulses and the down-count pulses output from the pulse generator 6, and outputs the count value.

The decoder 8 makes one of the switches SWI to SW4 conductive according to the count value output from the up-down counter 7, and the output of the operational amplifier 2 indicates the turned-on switch and the corresponding feedback amount. Opposite phase input (-) of operational amplifier 2 via a resistor to control
will be given feedback.

As a result of this feedback, the output of the operational amplifier 2 continuously approaches the level of the AGC level setting data applied to the other input of the comparator 5, and eventually reaches the same level. In this way, the AGC level can be set using the AGC level setting data.

If you change the AGC level setting data, the AGC level will also change, but no matter how much you change the AGC level setting data, the count value of the up/down counter will only change gradually, so the output level of the AGC circuit will change suddenly. There will be no fluctuations.

In this embodiment, the output of the decoder 8 is 4 bits,
In other words, an example is shown in which the output of the up-down counter 7 is 2 bits and the amplification factor of the input amplifier is switched in four ways. The number of bits and the number of switching may be set differently from those in the embodiment.

Furthermore, the pulse generator 6 outputs either an up-count pulse or a down-count pulse to the up-down count, but the pulse generator 6 outputs either an up-count pulse or a down-count pulse. A down-count control signal may be output, and the up-down counter 7 may up-count or down-count the up-count and down-count pulses under control of the up-count and down-count control signals.

In addition, the output of the operational amplifier 2 smoothed by the integrator 3 is
The A/D converter 4 converts the data into digital data, and the digital comparator 5 compares this digital data with the digital AGC level setting data given from the AGC level setting data input terminal 9. 4 is deleted, the digital comparator 5 is replaced with an analog comparator, and the digital AGC level setting data given from the AGC level setting data terminal 9 is changed to AG.
Analog AGC given from C level setting signal terminal
Instead of the level setting signal, the output of the operational amplifier 2 smoothed by the integrator 3 is inputted as analog to the analog comparator and compared with the analog AGC level setting signal given from the AGC level setting signal terminal. You can also do it.

〔Effect of the invention〕

As described above, according to the present invention, there is provided an input amplifier that amplifies an input signal, a smoothing circuit that smoothes the output level of the input amplifier, an output value of the smoothing circuit, and an externally applied AGC level setting signal. A comparator that compares the value of and outputs the magnitude relationship, an up/down counter that counts up or down depending on the output of the comparator, and depending on the count value of the up/down counter,
Since a means for controlling the amplification factor of the input amplifier is provided, A
The GC level can be easily changed, and the A
This has the advantage that when changing the GC level, the output level of the AGC circuit can be changed gradually.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of an AGC circuit according to the present invention, and FIG. 2 is a block diagram showing a conventional AGC circuit. In the figure, 1 is an input signal terminal, 2 is an operational amplifier, 3 is an integrator, 4 is an A/D converter, 5 is a comparator, 6 is a pulse generator, 7 is an up/down counter, 8 is a decoder,
9 is the AGC level setting data input terminal, SWI or S
W4 is a switch. Note that the same reference numerals in each figure indicate the same or corresponding parts. Amendment to figure procedure (spontaneous) June 7, 1991 1゜Indication of the case Patent Application No. 2-272644 2゜Name of the invention AGC circuit 3゜Relationship with the case

Claims (1)

[Claims] (1) An input amplifier that amplifies an input signal, a smoothing circuit that smoothes the output level of the input amplifier, an output value of the smoothing circuit, and an externally applied AGC.
a comparator that compares the value of the level setting signal and outputs the magnitude relationship; an up/down counter that counts up or down depending on the output of the comparator; and a count value of the up/down counter and means for controlling an amplification factor of the input amplifier.