JPS60213126A - A/d and d/a converter - Google Patents

Abstract

PURPOSE:To reduce a zerocrossing point without trimming by correcting current sources for bipolar and MSB by respective test signals 011-1+1 and 100-0 so that respective current added values are zero. CONSTITUTION:A correcting current source 5 is connected so that its current added value for digital data 011-1 becomes one LSB by an operational amplifier 21 and a current source 1 for an MSB is variably controlled so that its current added value for digital data 100-0 is made to zero by an operational amplifier 22. Consequently, a conversion error for an analog amplitude zero point is reduced, listening distortion is reduced and trimming can be omitted.

Description

[Detailed description of the invention] Industrial applications The present invention is a system for digital audio.

This relates to a D-A converter.

Conventional Structures and Their Problems In recent years, digitalization of audio has been rapidly progressing, as seen in compact discs and digital audio tape recorders. These digital audio devices always use Mu-D converters and D-A converters, but because they require extremely high precision, they require a trimming process, making them extremely expensive. The current situation is that

The conventional MU converter and D-MU converter will be explained below.

FIG. 1 shows a circuit diagram of a conventional D-person converter, where 1 indicates the current value for MSB (3F!). , 4 is a switch that turns on and off current source 1, 1sFi current value - bipolar current source, 6Vi current addition point, 7 is a D-person converter including 1 to 6. In the main parts, 8 is an operational amplifier, 9 is a feedback resistor, and 10 is an analog voltage output point.

The operation of the conventional D-A converter configured as described above will be explained below.

First, the states of the N switches 3.4 are set according to the given N-bit digital input data. Then, the currents of the current sources 1 and 2 corresponding to each switch in the on state and the current of the current source 6 are added, and from the current addition point 6, the current is supplied to the negative phase input of the operational amplifier and converted into a voltage. , appears at the analog voltage output point 1o.

As described above, an analog voltage is obtained according to the applied digital input data, and D-me conversion is performed.

Note that the current source 6 is intended to provide both positive and negative polarity outputs.

Next, FIG. 2 shows a conventional example in which a successive comparison type Mu-D converter is constructed using the main part 7 of the D-mukonno (-) shown in FIG. 1.

In FIG. 2, 7 is the same as 7 shown in FIG. 1, 11 is an analog input point, and 12 is a resistor.

13 is a comparator, and 14 is a register for sequential comparison.

The operation of the conventional MuD controller configured as described above will be explained below.First, the input current value determined by the analog voltage applied to the analog input point 11 and the value of the resistor 12, and the D- The output current of the D-person converter 7 when only the MSB of the A converter 7 is set to 1 and only the switch 3 corresponding to MiSB is turned on is added, and the comparator 13 compares whether the value is positive or negative. If it is positive, 1 is stored, and if it is negative, 0 is stored in the MSB of the sequential comparison register. By sequentially repeating the operation '1M5B to LSB, the person-to-person conversion is performed.

As mentioned above, the M-D and D-A converters configured as shown in FIGS. 1 and 2 have large errors when manufactured, especially when the number of bits is large such as for digital audio. If used as is for digital audio, the distortion would be too large to be practical.

The error is when one bit is 1 and all the bits below it are 0.
It becomes large when the bit changes from a 0 state to a state where the bit is 0 and all the bits below it are 1, and vice versa. This error then becomes distortion.

Figure 3 shows that if the current sources 1.2 for each bit have similar percentage errors, A-
D, shows the distribution of the worst value of the absolute value of the D-A conversion error.

In order to reduce the conversion error as described above, a conventional method has been to trim the current sources 1 and 2 of each bit. However, the inclusion of this trimming process has caused a problem in that the cost is extremely high.

OBJECT OF THE INVENTION The present invention solves the above-mentioned conventional problems, and provides an A-D for digital audio that does not require trimming.
, a D-me converter, the present invention provides a current source for correction, and converts the current source to digital data 011...1 so that the current added value is 1Ls.
By making the current source for MSB variable and controlling it so that the current added value for digital data 100...0 becomes zero, the conversion error for the analog amplitude zero point can be reduced. reduce the
A-D that reduces audible distortion and does not require trimming.

This makes it possible to realize a D-A converter.

DESCRIPTION OF THE EMBODIMENTS As mentioned above, the conventional example D- shown in FIGS.
The A, A-D converter has a conversion error distribution as shown in Figure 3 unless trimmed.
As can be seen from the figure, the conversion error is the largest at the analog amplitude zero point, which means that the distortion at the zero crossing point of the audio signal is extremely severe.

Since the value of this distortion is constant with respect to the amplitude of the audio signal, the distortion rate increases as the signal level decreases, making it very harmful to the auditory sense.

Therefore, if the distortion at this zero-crossing point can be removed, the remaining distortion components will be proportional to the signal amplitude as shown by the dotted line in Figure 3, so it can be said that it does not pose much of a problem in terms of hearing. .

The distortion at this zero cross point is calculated using digital data 011...
The analog amplitude for 1 plus the analog amplitude for I LSB, and the digital data 100...
This is due to the error between the analog amplitude and 0.

FIG. 4 shows a circuit diagram of the D-person converter in the first embodiment of the present invention.
o is the same as the same number in the circuit diagram shown in Figure 1,
16 is a control input point, 16 is a control input resistor, 17.18 is a control input switch, 19.20 is a control level hold capacitor, and 21.22 is an operational amplifier.

The operation of the D-person converter of this embodiment configured as described above will be explained below.First, the operation of the portions 1 to 10 is exactly the same as that shown in FIG. Therefore, the explanation will be omitted here, and an example of a time chart of the 0 correction test signal is shown in FIG. 5, mainly explaining the correction operation of the current source 6 and the current source 1 for the MSB. In the example of FIG. 6, during one sample period of the audio signal, test signal 1, L channel data, test signal 2. It operates in the order of R channel data.

First, with test signal 1, switch 3 is turned off, and square 1.
The analog output of the sheep A now nabei thousand sovrl-spring song is connected from the terminal 15 to the operational amplifier 2 through the resistor 16 and switch 17.
1 input. Then, the current source 6 is controlled by the output voltage of the operational amplifier 21 in a direction in which the analog output voltage becomes zero. During the period when the switch 17 is off, the operational amplifier 2
The output of 1 is held by a capacitor 19.

Next, with test signal 2, turn on switch 3, turn on all switches 4, and send the analog output at that time to terminal 1.
6 to operational amplifier 22 through resistor 16 and switch 1B.
feed the input of Then, the current source 1 is controlled by the output voltage of the operational amplifier 22 in a direction in which the analog output voltage becomes zero. While the switch 18 is off, the output of the operational amplifier 22 is held by the capacitor 20.

By repeating the above operations, the analog output voltage for test signal 1 and the analog output voltage for test signal 2 both approach zero, and as a result, a D-A converter with very small error at the zero cross point can be realized. It is.

Note that the current source 2 and switch 4 in the embodiment shown in FIG.
One of them is turned on only when the test signal is 10, and is always turned off at other times.

As a result, the error at the zero crossing point approaches zero. However, if there is no +1 current source and switch, the error at the zero cross point is 1lt1LsB
However, the value is so small that it may be ignored in practical terms. Therefore, the present invention is effective even in such cases.

Next, a second embodiment of the present invention will be described with reference to the drawings.

FIG. 6 is a circuit diagram showing a second embodiment of the present invention. In FIG. 6, 1 to 2o are the same as those with the same numbers in FIG. 4, and 23 is a comparison.

The correction operation of this embodiment will be explained. The switches 17 and 18 in this embodiment also operate as shown in FIG. 6◇ First, the comparator 23 detects the polarity of the voltage at the current addition point 6 with respect to the test signal 1, and turns on the switch 17. The current source 5 is controlled in the same manner as in the first embodiment.

Next, current source 1 is similarly controlled in response to test signal 2.

This example is compared with the example shown in FIG.

Replacing two operational amplifiers with one comparator has the advantage of reducing costs and eliminating the influence of the difference in input offset between the vc and yI calculation amplifiers 21 and 22.

Next, a third embodiment of the present invention will be described with reference to the drawings.

FIG. 7 is a circuit diagram showing a third embodiment of the present invention. In FIG. 7, numerals 1 to 23 are the same as the same numbers in FIG. 6.

In this embodiment, the current source 5 of the embodiment shown in FIG. 6 is divided into a fixed current source 5a and a variable current source 5b.
b is controlled and corrected, and the operation is exactly the same as the embodiment shown in FIG.

By the way, for the variable current sources 1 and 5 in the embodiments shown in FIG. 4, FIG. 2M5, and FIG. It is possible to replace it with a partial converter.

FIG. 8 shows a fourth embodiment of the present invention in which the current sources 1 and 6 of the embodiment shown in FIG. 7 are replaced with auxiliary single-channel converters.

In FIG. 8, 1 to 23 are the same as those with the same numbers shown in FIG. 7, and are composed of a variable current source 5bi auxiliary and a part converter, and the current source 1 for MSB is also a fixed current source 1a and an auxiliary one. A part of the converter 1b is used. 24 and 26 are auxiliary and partially connected to the converter 6b by the output of the comparator 23 for the test signals 1 and 2.
, 1b for providing correction digital data.

Compared to the embodiment shown in FIG. 7, this embodiment has the advantage that the capacitors 19 and 20 are not required, so the number of external components is reduced when configured with an IC. All of the fourth embodiments are examples implemented in the iD~M converter of the present invention, but it goes without saying that these can be configured as a part of the sequential comparison Saint-D converter as explained in the section of the conventional example. Nor.

When implemented as an A-D converter, human
Since the comparator 13 for D compulsion can be used in common with the comparator 23 for correction, there is an advantage that it is economical.

Effects of the Invention The present invention provides test signals 011...111 and 1 for bipolar current source 6 and MSB current source 1, respectively.
By correcting the current addition value in the direction of zero for both 00...0, the error at the zero cross point is reduced without trimming, and the A-D for digital audio has a performance that is satisfactory to the auditory sense. By using a comparator to detect the polarity of the current added value to the test signal, the influence of offset can be eliminated, and it can also be used as an auxiliary variable current source. The use of a built-in converter has the excellent effect of eliminating the need for an external capacitor.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of a conventional D-person converter, FIG. 2 is a circuit diagram of a conventional human-D converter, FIG. 3 is a conversion error distribution diagram, and FIG. 4 is a first embodiment of the present invention. FIG. 6 is an explanatory diagram of the operation of the embodiment of FIG. 4, and FIGS. FIG. 6 is a circuit diagram of a D-A converter in third and fourth embodiments. 1...First current source, 2...Second current source, 3...First switch, 4......
Second switch, 6...Third current source, 6...
...Current addition means, 8~9°16~26...
- Control means. Name of agent: Patent attorney Toshio Nakao and one other person? Figure 1 Figure 3 - Vmabx, u ---1-+vmILxa1■
Game Mmu Condolence Figure 4 Figure 5 Suzu! SfB ni So No. 6FI4

Claims (1)

[Claims] (1) A first current source having a current value of I, a current source, a first switch for turning on and off the first current source, and a second current source. a second switch that turns on and off each of the current sources; a third current source that has a current value of 100%; current adding means for adding the current passing through each switch and the current of the third current source;
The output current value of the current adding means is set depending on the combination of the switches that are turned on among the switches of the first and third switches.
the output current value of the current adding means in response to a first test signal in which the current value of the current source is made variable, the first switch is off and all the second switches are on; The motor is characterized by comprising a control means for controlling the output current value of the current addition means for the second test signal such that the switch is on and all the second switches are off to become zero. The D-person converter according to claim 1 is characterized in that two current sources and the corresponding second switches are provided for each of the D-person converter and the D-person converter. 3) The control means samples the output voltage of the current-to-voltage conversion means provided at the output of the current addition means and the current-to-voltage conversion means with respect to the first and second test signals, and depending on the polarity, respectively Claim 1 or 2, characterized in that the first and second capacitors are charged or discharged, and the third current source and the first current source are controlled by the voltage of the capacitors. A-D, D-person converter as described in section. (4) The motor according to claim 1 or 2, characterized in that one or both of the third current source and the first current source is constructed of an auxiliary converter. D.
D-A converter.