JPH04140787A - Driving circuit for display device - Google Patents

Abstract

PURPOSE:To decrease the kinds of external voltages by providing a means which outputs plural voltages differing in level and a means which sends out one or two adjacent voltages among levels to a signal electrode according to an input image signal. CONSTITUTION:The values of digital video data D0, D1, and D2 which are inputted to a driving circuit and the value of a voltage sent out to a source line On are related as external voltages of only five levels V0 - V4 and a gradational display in eight stages is made as shown in the table. Namely, when video signal data consists of (n) bits, 2<(n-1)>+1 kinds of external voltage level are required although 2<n> kinds are required when voltage levels supplied to picture elements depend all upon external voltages. Consequently, the load on a voltage supply circuit is reduced and the number of terminals is decreased even on the driving circuit side. Further, voltages with a finer stage difference than the inter-level stage difference of an external voltage source are applied to the picture elements and fine gradational representation is realized.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a drive circuit for a display device, and more particularly to a drive circuit for a display device that can perform gradation display using an amplitude modulation drive method. The following description will be made by taking a matrix type liquid crystal display device as an example, but the present invention can also be applied to drive circuits for other types of display devices, such as EL (electroluminescence) display devices and flashlight displays.

(Prior art) When driving a liquid crystal display device, the response speed of the liquid crystal is faster than that of a CRT.
(Cathode Ray Tube) Because it is very low compared to the fluorescent materials used in displays, special display drive circuits are used. In other words, the liquid crystal display drive circuit does not directly apply the video signals that are sent to each pixel as they are, but rather
Video signals sampled corresponding to each picture element within one horizontal scanning period are held during that horizontal scanning period, and are output all at once at the beginning of the next horizontal scanning period or at an appropriate time in the middle thereof.

After the output of the video signal voltage to each picture element is started, the signal voltage is held for a time that sufficiently exceeds the response speed of the liquid crystal.

In order to maintain this signal voltage, conventional drive circuits use capacitors. Figure 6 shows 1 selected by the scanning signal.
A signal voltage output circuit (source line) that supplies drive voltage to N picture elements on the scanning line is shown, and the signal voltage output circuit for the n-th picture element is as shown in FIG. It consists of an analog switch SW, a sampling capacitor "fCsnp," a 7t log switch SW2, a bold capacitor Cs, and an output Vanofer amplifier.

The operation of the conventional signal voltage output will be explained with reference to FIG. The analog video signal v5 input to the analog switch sw1 is the sampling clock signal TSMPI~
The instantaneous voltages VSIIPI to VSII of the video signal V5 at each time point are sequentially sampled by T SMPN.
N is applied to each sampling capacitor CSMρ.

The n-th sampling capacitor c shp is charged with the video signal voltage value VSMPn corresponding to the n-th picture element and holds that value. The signal voltage V thus sequentially sampled and held at the beginning of one horizontal scanning period
sr+p+~VSfflρN is all analog switch s
Output pulses given to w2 all at once. The signal is transferred from each sampling capacitor CSMP to the hold capacitor CM by E, and is outputted to source lines 01 to ON connected to each picture element via amplifier A and amplifier A.

(Problems to be Solved by the Invention) The drive circuit described above is for the case where the video signal is given in analog form, but when the video signal is given in the form of a video signal or digital data, the drive circuit as shown in FIG. A driving circuit is used. Here, for the sake of simplicity, it is assumed that the video signal data consists of 2 bits (D8, DI). That is, the video signal data has four values of O to 3, and the signal voltage given to one element is one of the four levels of 8 to 3. FIG. 8 shows a signal voltage output circuit (source driver) for the n-th source line O1, l. 1st stage D flip-flop (sampling flip-flop) MSMP, 2nd stage FRI, Pflosob (hold flip-flop) M+, 1 decoder DEC, and 4-level external voltage source ■θ~v3 and source line Q
. Analog switches ASWll each provided between
~Constructed by ASW3. This circuit operates as follows. Video signal data D[lS DI is the sampling pulse TSMPn corresponding to the n-th picture element at the rising edge of the sampling pulse TSMPn.
lρ to holdoff tnonoffro, buM1. It is taken into I and held there. At the end of sampling for one horizontal scanning period, an output pulse OE is applied to the hold flip-flop MH, and the video signal data D8 and Dl held in the hold flip-flop MH are output to the decoder DEC. The decoder DEC is this 2 bit,
The video signal data D, ,D, of
0~3) Analog switch A SW 2~A
With any one of SW3 conductive, connect one of the four levels of external voltages ■8 to ■3 to the source line. . Output to.

In the example shown in Figure 8, the video signal data is 2 bits, so
Source line 0. The external voltage output to is 4(-
22) Level (Va to V3) was required. When the video signal data is given in 3 bits, the signal voltage output circuit becomes as shown in FIG. 9, and 23=8 levels (Vs to 7) of external voltages are required. In other words, in a digital video signal drive circuit configured in this way, if the digital video signal data is n bits, an external voltage of 2+'' level must be prepared. If the amount increases, the following problems will occur.

(1) As the types of voltages to be supplied increase, the voltage supply circuit becomes larger and the cost also increases.

(2) Since the number of input terminals of the LSI forming the drive circuit including the signal voltage output circuit described above increases, it becomes difficult to implement the LSI.

The present invention was made in view of the current situation, and
The object is to provide a drive circuit for digital video signals that can eliminate the above-mentioned drawbacks and reduce the number of types of external voltages.

(Means for Solving the Problems) A display device drive circuit of the present invention is a display device drive circuit provided with a plurality of parallel signal electrodes, and is a voltage supply circuit that outputs a plurality of voltages at different levels. and selective output means for sending only one of the plurality of levels or simultaneously two adjacent voltages to the signal electrode according to the input digital image signal, This achieves the above objective.

(Example) The invention will now be described with reference to examples.

FIG. 1 shows a signal voltage output circuit corresponding to the nth signal line (source line) of a liquid crystal display drive circuit when digital video signal data is composed of three pits. This circuit is a sampling flip-flop Ms gate ρ
, hold flip float 7'MH, selection circuit 20 and five analog switch f A, S Wa= A S
It is equipped with Wt. Sampling flip flow knob MS
Both r+ρ and hold flip-flop MH are composed of three D flip-flops corresponding to each bit Dit, DI, and D2 of the digital video signal data. 5
Analog switch ASW! ! One terminal of ~A S W a is connected to an external 5-level voltage source■8~~r 4
(only 6<Vl<V2<V3<V4), and the other terminal is commonly connected to the nth source line ○. connected to. Each analog switch A SW il-A
The control terminal of SW 4 is connected to the output 5il- of the selection circuit 20.
34 are sent out respectively.

The digital video signal data D9, Dl, and Da input to the sampling flip-flop knobs Ms and ρ are sampled sequentially by sampling pulses TSMPn corresponding to each source line O0, and are held free.

Sent to Pfrosob MH. After the sampling of the video signal data of all picture elements on one scanning line is completed, the 3-bit data D8, D, . D2 is the terminal C of the selection circuit 20,
, B, and A, respectively.

The relationship between the values of these inputs C, B, and A and the value of the output 5il-84 of the selection circuit 20 is shown in the table of FIG.

For example, video signal data (Da, Dl, D2) = (
When C1B,,A) is (0,0,0), the output Si!
only becomes 1, and the other outputs S1, Sl, SJ, and SJ all become O. This allows the analog switch ASWl
! Only the line becomes conductive, and the voltage VB of the external power supply is sent to the source line 0°. (C, B, A) = (
0, 1, O), only the output S1 becomes 1, only the analog switch ASW becomes conductive, and the power supply voltage ■1 becomes the source line ○. will be sent to. Similarly, (C
, B, A) = (0, 0, 1), then v2, and (C, B, A) = (0, i, H), ■3, (C,, BSA) = (1, 111) When , ■4 is the source line ○. will be sent to. The above is a case where only the external i4 pressure of Lebel is sent to the source line On.

Video signal data<DIls DI, D2) = (C
, B, A) are (1, 0, 0), the selection circuit 20
The two outputs of SII and Sl are 1 (other outputs S
2, SJ, S4 is 0). As a result, the two analog switches ASWs and ASW+ become conductive at the same time, and both external voltage sources VII and ■1 become source lines ○. connected to. An equivalent circuit in this case is shown in FIG. Here, RONI! is Analog Switch, Chi ASWil
, RON+ is the resistance of the analog switch ASW when it is conductive. In the case of Figure 3, the source line is on.
The voltage VON output to is R0Nil+ROM+ in a steady state. From this formula, v, < voN < v, and the voltages sent to the source line Orl are the external voltages ■8 and ■1.
It can be seen that it is at an intermediate level. Furthermore, R
By setting ON[I=RoNt, VON-(V
ll+Vl)/2, and it becomes possible to give the source line 01 a value exactly between 8 and V'l. Similarly,
By making all the conduction resistances of the analog switches A S W I - A S W a equal, (Ds, Dl
, D2) = (C, BSA) = (1, 1, 0), the voltage of (VI + V2), /2, (C, B,
A) When -(1,0,1), (V2+V3)/2
The voltage of each source line ○. Can be sent to.

The above two levels of external voltage are simultaneously applied to the source line 01,
This is a case where the data is sent to l.

The driving circuit of the liquid crystal display device of this embodiment (digital video signal data D2 that is input to this). This table (as shown)
The drive circuit of the present invention can perform 8-step gradation display using only 5 levels of external voltages f, Vs to 4.

FIG. 5 shows an example 1 in which the selection circuit 20 in FIG. 1 is specifically constituted by a logic circuit including an AND circuit and an OR circuit. In this example, the following = formula is derived from the logic table h) in FIG. 2, and these are realized using an AND circuit and an OR circuit.

SI! = A -B S+=A-100・C+A-B S2=A-B-C+A-B S3=A-10・(:+A-B-C 5a-A-B-C In the above embodiment, digital video Assuming that the signal data consists of 3 bits (X). As shown in Figure 9, if one of the external voltages is selected and applied directly to the picture element, the external voltage needs 23-8 levels. It is.

However, in this embodiment, it is possible to generate an intermediate level between the two types of external voltages, so it is sufficient to provide five levels of external voltages. Similarly, when the video signal data is 4 bits, in the above configuration, the external m of 2'=16 level is
It is necessary to prepare the pressure, but in this example, 23+1=9
Level is sufficient. In this way, when video signal data consists of n bits, if you try to find all the voltage levels applied to the picture elements as external voltages, you have to prepare 2n types of external voltage levels, but in this embodiment, 2+n types of external voltage levels must be prepared. −
Only mouth + 1 type is enough. This reduces the burden on the voltage supply circuit and also reduces the number of terminals on the drive circuit side. The degree of reduction in the number of required external voltage levels according to the present invention increases as the number of bits of video signal data increases.

(Effects of the Invention) According to the present invention, when expressing gradation by applying signal voltages of different levels to picture elements based on digital image signal data, the signal voltage sent to the signal electrodes can be changed directly from the external voltage of the Lebel. In addition to the case where two levels of external voltage are sent out simultaneously, there is a case where external voltages of two levels are sent out simultaneously. In the case of this two-level simultaneous transmission, it is possible to apply a voltage with a value intermediate between those levels to the picture element, which eliminates the need for as many external voltages to express a predetermined number of gradations, and requires fewer external voltages. Only a few external voltages are required. As a result, the external voltage supply circuit can be made smaller, and the number of terminals in the drive circuit of the display circuit can also be reduced. Furthermore, since it is possible to apply a voltage with a finer step difference to the pixel than the step difference between levels of an external voltage source, even in cases where it is difficult to generate a voltage with a fine difference with an external voltage generation circuit, it is possible to apply a voltage with a finer step difference to the picture element. Tonal expression becomes possible.

4. Dislocation in Figure 1 Figure 1 is a circuit diagram of the portion corresponding to one source line of the drive circuit of a liquid crystal display device using one embodiment of the present invention, and Figure 2
The figure shows a logical table of the relationship between the input and output of the selection circuit used in the example, and Figure 3 shows the relationship between the analog switches and the one when the two analog switches become conductive at the same time.
Figure 4 is a circuit diagram of the equivalent circuit of the source line in the book, Figure 4 is a diagram showing a table of the relationship between digital video signal data and voltage applied to picture elements in the embodiment, Figure 5 is a more specific diagram of the inside of the selection circuit. 6 is a circuit diagram of a drive circuit for analog video signals, FIG. 7 is a circuit diagram of only one source line extracted from the circuit, and FIG. 8 is a circuit diagram of two source lines. FIG. 9 is a circuit diagram of a driving circuit in which an external voltage is prepared for each bit of digital video signal data, and FIG. 9 is a circuit diagram of a similar driving circuit corresponding to 3-bit digital video signal data.

Dθ, Dl, D2...Video signal data, M5Hp...
・Sampling flip-flop knob, M+...Hold flip-flop, 20...Selection circuit, A S W
s-A SW J...Analog switch, On...
・Source line, TSMρ...sampling pulse,
OE...Pulse for output, ■8 to ■4...External voltage ID of Figure 6.

Claims (1)

[Claims] 1. A drive circuit for a display device provided with a plurality of parallel signal electrodes, comprising: voltage supply means for outputting a plurality of voltages at different levels; A drive circuit for a display device comprising selection output means for sending only one of the plurality of voltage levels or simultaneously sending two adjacent voltages to the signal electrode.