JPH0973283A - Generating circuit for gradation voltage of liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To generate gradation voltage of various kinds with simple constitution and to attain performing gamma compensation in which a display characteristic of liquid crystal is considered. SOLUTION: In a generating circuit for gradation voltage generating gradation voltage of a step-wave type, it has plural direct current voltage generating sections 50-53 generating fixed voltage having different values, voltage adding sections 54-57 having same numbers as the direct current voltage generating sections 50-53, and a step-wave voltage generating section 58 generating a step- wave. And each of direct current voltage generating sections 50-53 and each of voltage adding sections 54-57 group respectively, fixed voltage generated in the direct current voltage generating sections 50-53 in the same group is added to a step-wave by the voltage adding sections 54-57 in each group, and an adding ratio is set for each group.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a grayscale voltage generating circuit for a liquid crystal display device, and more particularly to a grayscale voltage generating circuit for generating a staircase-shaped grayscale voltage. Since the transmittance of the liquid crystal is determined by the magnitude of the liquid crystal voltage (voltage written in the liquid crystal), if the liquid crystal voltage is made variable in m steps, multi-gradation display of m gradations between the black level and the white level is possible. It will be possible. Therefore, conventionally, m kinds of gradation voltages from the first gradation voltage corresponding to the voltage of the minimum (or maximum) transmittance to the m-th gradation voltage corresponding to the voltage of the maximum (or minimum) transmittance are generated. However, one of them is selected as the liquid crystal voltage according to the gradation of the display data, but in such a method, the number of gradations and the gradation voltage have a one-to-one correspondence. Therefore, there is a drawback that a circuit for generating a grayscale voltage and a circuit for selecting a grayscale voltage are complicated in proportion to an increase in the number of grayscales, and such a drawback is not caused. There is a demand for a technique capable of achieving more gradation.

[0002]

2. Description of the Related Art As a conventional technique capable of further increasing the number of gradations without complicating the structure, there is, for example, one disclosed in Japanese Patent Laid-Open No. 5-158446. FIG. 9 is a block diagram (however, for one data line) of a main part of a liquid crystal display device to which the conventional technique is applied. 1 is a control circuit, 2 is a shift register, 3 is a first memory, 4 is a second memory, 5 is a decoder, 6 is a comparator, 7 is a third memory, 8 is a selector, 9 is a switch, 10 is a gradation voltage It is a generation circuit.

A brief description of the functions that each of these sections must have
Then, the control circuit 1 receives the horizontal sync signal of one display screen.
No. HS, vertical synchronizing signal VS of the same screen, and the same screen
Based on the display clock CLK for each pixel of the surface,
Various timing signals (T₁, T
₂, ………) and various clock signals (C₁, C₂, ……
...) is generated, and each pixel is composed of n bits
The displayed display data Di is converted into lower P bits and upper Q bits.
2 minutes (P + Q = n) for each
TA D_P, D_QHas the function of taking out as. In addition,
T₁, T₂Is a signal synchronized with HS, C₁, C₂Is CLK
Is a signal synchronized with. The shift register 2 is C₁Same as
In anticipation of T₁Are sequentially shifted, and i of the same number as the data lines are
It has a function to take out sequentially from each output. In addition, in the figure
Is the first output TS of the i outputs₁Is shown as a representative
ing. The first memory 3 includes i constituent units (in the figure,
One of them is shown; the same shall apply hereinafter), and each unit
Has a capacity of P bits + Q bits, and shifts for each unit.
Output of register 2 (TS₁~ TS_i) In response to D_P
And D_QHas a function of sequentially capturing. Second memory 4
Consists of i constituent units, where each unit is P bits + Q
Has the capacity of₂All in the first memory 3 in response to
It has a function to fetch data collectively. Decoder 5
Is composed of i constituent units, and each unit is D_PNumber of bits
2 corresponding to (P bit)^PHas a decode output of the book,
D_PA machine that selects one of the outputs according to the contents of
Has ability. The comparator 6 is composed of i constituent units, and
The unit is D in the second memory 4._QAnd the gradation voltage generation circuit 10?
Compared with other count data (described later) and output if they match.
It has the function of activating force. The selector 8 is i
It is composed of individual units, and is adapted to the decoding result of the decoder 5.
By turning on one of the internal switching elements
2 from the gradation voltage generation circuit 10^PType (4 for convenience
Type; voltage V) ₁~ V_FourA machine to choose one of
Has ability. Switch 9 starts from the beginning of the horizontal scanning period
Until the output of the comparator 6 becomes active,
Turn on and set the voltage output from the selector 8 to the data
Inn X₁It has a function to output to. In addition, FIG. 10 shows a liquid crystal.
Conceptual diagram of the panel (showing a 4x4 configuration for simplicity)
4 data lines X₁~ X_FourAnd 4 s
Can line Y₁~ Y_FourAre arranged in a cross shape, and at each intersection
The pixels are arranged. Each pixel is a scan line Y₁~
Y_FourWhen a predetermined ON voltage is applied to the
Data line X through the TFT that is connected
₁~ X_FourIt is composed of the liquid crystal capacitance CL to which the above voltage is written.
Has been established. DV₁~ DV_FourIs the scan driver
It is a coffa amplifier.

Next, the gradation voltage generating circuit 10 includes a counter 11 for counting C ₂ within a cycle of T ₂ and a counter 1.
A DA converter 12 for converting a count value of 1 (count data) into an analog voltage and a reference voltage VR _{1 of} 2 ^P types.
~ 2 ^P voltage sources 13 to 16 for generating VR ₄ and 2 ^P
And a number of adders 17-20, by the adder 17 to 20, having a function of generating 2 ^P kinds of voltages V ₁ ~V ₄ adds the analog voltage and the reference voltage VR ₁ to VR ₄ .

According to this structure, first, one of the 2 ^P kinds of voltages V _{1 to} V ₄ is selected according to the upper P bits of the n-bit display data, and then the selected voltage is selected. One row (the number of rows is 2 ^Q ) is the lower Q of the same display data.
After being selected according to the bit, the voltage of the selected stage is output as the liquid crystal voltage to the data line X ₁ . Here, the number of gradations m is 2 ⁿ (n is the number of bits of display data), and when n = 4, 16 gradations are obtained. 16
In the case of gradation, 16 kinds of gradation voltages are required by the method at the beginning, but 2 ^P kinds are sufficient with this technique. That is,
Since P <n, if P = 2 for convenience, the number of types of voltage can be significantly reduced from 16 types to 4 types.

Here, a specific circuit configuration of the gradation voltage generating circuit will be described. FIG. 11 is a configuration diagram thereof. In this example, while keeping the base voltage of the pnp transistor 31 constant by the reverse breakdown voltage of the Zener diode 32 (so-called Zener voltage V _Z ), the collector current I _{B of} the transistor 31 is kept. Is changed in a plurality of steps according to the output voltage VW of the operational amplifier 33. VW is
In this example, the size changes in four steps. That is, VW
Is determined by the combination of the input bits of the D-A conversion circuit 34 (the output bits of the counter 35). In this example, the output bits of the counter 35 are D1C and D0.
Since it is 2 bits of C, "00", "01", "1"
There are four types of voltages corresponding to each combination of "0" and "11". VW is applied to the collector of the transistor 31 through the voltage dividing circuit 36 composed of _four resistors R _{1 to} R _{4, and} from the four nodes N _{1 to} N _{4 of the} voltage dividing circuit 36,
Four types of voltages V _{1 to} V ₄ having a potential difference according to the voltage division ratio
And the magnitudes of V _{1 to} V ₄ are calculated by the following equation
Represented by In FIG. 11, 37 is a DC power supply, 38 and 39 are resistors, and 40 to 43 are operational amplifiers.

[0007] _{V 1 = R 1 × I B} + VW ......... V 2 = (R 1 + R 2) × I B + VW ......... V 3 = (R 1 + R 2 + R 3) × I B + VW ......... V _{4 = (R 1 + R 2} + R 3 + R 4) × I B + VW ......... Figure 12 is a waveform diagram of a VW and V ₁ ~V _4. VW is 0
There are four levels of V, 0.2V, 0.4V, and 0.6V, and V _{1 to} V ₄ are fixed voltages (1.8V,
It has a waveform obtained by adding VW to 2.6V, 3.4V and 4.2V). The potential difference between V _{1 and} V ₄ is 0.8V, although not particularly limited.

FIG. 13 is a timing chart of generation of gradation voltages. In one horizontal scanning period, the node N of the voltage dividing circuit 36
_From time t ₀ to time t ₁ when the potentials _{1 to} N ₄ are sufficiently stable
The potential of each voltage V _{1 to} V _{4 up} to V ₁ = 1.8
V, V ₂ = 2.6V, V ₃ = 3.4V, V ₄ = 4.2V
It is. At time t ₁ , the output bit D1C of the counter 35,
When DOC is "00", the potential of the voltages V ₁ ~V ₄ is + 0.2V is up and at time t ₂ output bits D1C of the counter 35, DOC becomes "01", the voltages V ₁
Potential of ~V ₄ is again + 0.2V up and at time t ₃ output bits D1C of the counter 35, DOC is "10", the potential of the voltage V ₁ ~V ₄ is again + 0.2V up, point At t ₄ , the output bit D1C of the counter 35,
When D0C becomes “11”, the potentials of the voltages V _{1 to} V ₄ are again increased by + 0.2V. Therefore, the voltage V ₁
The potential of V ₄ depends on the type of voltage (4) and the number of stairs (4
Becomes 16 types multiplied by stage), the 16th floor to minimize the potential (V ₁₎ of the 1st gradation point t _1, the largest V ₄₎ the 16th gradation potential (time t ₄ A key voltage is generated.

For example, the first gradation voltage is made to correspond to the image data "0000", the second gradation voltage is made to correspond to the image data "0001", ..., and the 16th floor. The selection operation when the adjusted voltage is made to correspond to “1111” of the image data is as follows. That is, the lower 2 bits of the image data and the output bit D1 of the counter 35
It is determined whether or not C and D0C match (this determination operation is performed by the comparator 6 in FIG. 9), and the switch 9 is selected according to the determination result.
Control the off timing of. For example, "0
If they match with "0", they are turned off at time t ₁ and "11"
If they match with each other, they are turned off at time t ₄ . Since the four types of voltages V _{1 to} V ₄ are selected by the upper 2 bits of the image data (this selection operation is performed by the selector 8 in FIG. 9), eventually, when the image data is “0000”, the time t ₁ V ₁ of the potential (1st gradation voltage) is selected,
Further, when the image data is “1111”, time t ₄
Therefore, the potential of V ₄ (16th gradation voltage) is selected.

[0010]

However, the conventional gray scale voltage generating circuit (FIG. 11) of a liquid crystal display device is useful in that it can generate various kinds of gray scale voltages with a simple structure. However, since the correction (so-called gamma correction) considering the display characteristics of the liquid crystal cannot be performed, the display quality is insufficient.

FIG. 14 shows a TV (Tran) which shows the display characteristics of the liquid crystal.
sparency-Voltage) curve diagram, the vertical axis is the liquid crystal transmittance T, and the horizontal axis is the liquid crystal voltage V. Note that this example is a normally white type characteristic in which the black level corresponds to the maximum liquid crystal voltage and the white level corresponds to the minimum liquid crystal voltage. Liquid crystal T
In the case of the V curve (A), the relationship of T = KV ^3.8 is established at the curve portion. 3.8 is called the gamma value of liquid crystal. However, K
Is a coefficient. Generally, the gamma value of various video sources is about the gamma value (2.2) of CRT by convention, so when various video sources are directly applied to a liquid crystal display device, a display near a white level or a black level is displayed. The gradation difference becomes small, which causes a problem in display quality such that delicate contrast cannot be expressed.

Gamma correction is an operation of bringing a gamma value of 3.8 closer to a gamma value of 2.2. B is a gamma-corrected characteristic line. In order to correct the characteristic line A like the characteristic line B, a substantially S-shaped correction curve C as shown in FIG. 15 may be considered. This correction curve C performs non-linear increase correction of the liquid crystal voltage from the black level to the substantially intermediate level, and also performs non-linear decrease correction of the liquid crystal voltage from the substantially intermediate level to the white level. Incidentally, a straight line D shown by a broken line is a line when gamma correction is not performed, in other words, a characteristic line of the conventional staircase voltage generating circuit.

[0013]

According to the present invention, there is provided a gray scale voltage generating circuit for generating a staircase-shaped gray scale voltage in order to realize a gray scale voltage generating circuit capable of performing gamma correction with a simple structure. A plurality of direct current voltage generators each generating a fixed voltage having a different value, a same number of voltage adders as the direct current voltage generators, and a staircase voltage generator generating a staircase wave, one for each A group is formed by the DC voltage generating unit and the voltage adding unit, and the voltage adding unit in each group adds the fixed voltage generated by the DC voltage generating unit in the group and the staircase, and, Each item of setting the addition ratio for each group is provided.

[0014]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a diagram showing a first embodiment of a gradation voltage generating circuit of a liquid crystal display device according to the present invention. In FIG. 1, 50 to 53 are fixed voltages VR _{1 having} different values.
~ ₄ DC voltage generators for generating VR4, 54-57
Similarly, 4 is a voltage adding unit, and 58 is a staircase voltage generating unit that generates four-stage staircase wave VW. The above-mentioned number (4) and the number of stages (4) are numbers for convenience of description and are not limited to these numbers. Incidentally, 16 kinds of gradation voltages can be generated by 4 × 4 stages.

Conceptually shown voltage adders 54 to 57 add VW and VR _j (j is 1 to 4; the same applies hereinafter) and output the added voltage V _j.
And the addition ratio of VR _j are characterized in that they can be freely set for each of the voltage adding sections 54 to 57. That is, each of the voltage adders 54 to 57 sets the first coefficient unit 6 _j for setting the coefficient K _j A for VR _j , the second coefficient unit 7 _j for setting the coefficient K _j B for VW, and each coefficient. It has an adder 8 _j that adds the applied VR _j and VW.

According to this structure, four types of voltage V
_{1 to} V ₄ are given by the following equations. V ₁ = VR ₁ × K ₁ A + VW x K ₁ B ……… V ₂ = VR ₂ × K ₂ A + VW x K ₂ B ……… V ₃ = VR ₃ × K ₃ A + VW x K ₃ B ……… V ₄ = VR ₄ × K ₄ A + VW x K ₄ B ......... Here, if all the coefficients are set to 1, the gamma correction is not performed, that is, the same as the straight line D in FIG.
By setting each coefficient (K _j A, K _j B) to an appropriate value, it is possible to easily obtain a curve close to the substantially S-shaped correction curve C in FIG. In the conceptual diagram of FIG. 1, each coefficient is generated by the first coefficient unit 6 _j and the second coefficient unit 7 _j , but these coefficient units can be easily configured by combining some resistors.

2 to 5 are views showing a second embodiment of the gradation voltage generating circuit of the liquid crystal display device according to the present invention. In FIG. 2, 91 to 94 are fixed voltages VR having different values.
_{1 to} VR ₄ generating DC voltage generator, 95 to 98 are four operational amplifiers corresponding to the adder of FIG. 1, 99 to 102
Is a resistor network corresponding to the first coefficient unit and the second coefficient unit of FIG.
103 is a staircase voltage generator that generates a staircase wave VW.

Each resistor network 99 to 102 is an input of an operational amplifier.
Resistance Rs_jAnd feedback resistance Rf_jConsists of each
Peamplifiers 95-98 are VR_jAnd the potential difference between VW and Rf
_jAnd Rs_jIt is amplified by the gain A determined by the ratio of_jage
Output. According to such a configuration, Rs_jAnd Rf_j
By changing the value of
The gain A can be adjusted individually. Figure 3 shows Rs_j
And Rf_jThere are four types of power when the value of
Pressure V₁~ V_Four3 is a potential level diagram of FIG. VW is 0.0V
Sometimes V₁= VR₁, V₂= VR₂, V_Three= V
R _Three, V_Four= VR_FourBecomes When considering gamma correction
VR_jThe preferred value of VR is₁= 2.14V, VR₂
= 2.5V, VR_Three= 2.9V, VR_Four= 4.0V
You. Here, the voltage of each step of the staircase wave VW is 0.0V,
Rs as well as 1.0V, 2.0V, 3.0V_j
And Rf_jIs set to the optimum value, VW = 0.
V when other than 0V₁~ V_FourThe potential level of
It can be just right. For example, V₁Is
Each potential level of 1.96V, 1.78V and 1.6V
Have and V_FourIs 3.73V, 3.45V, 3.1
It is possible to have each potential level of 8V.

FIG. 4 is a table in which each potential level in FIG. 3 is associated with gradation data. The black level of the gradation data “0000” corresponds to 4.00 V (= VR ₄ ) of V ₄ , and the white level of the gradation data “1111” corresponds to 1.60 V of V ₁ . Then, each gradation data ("000
1 "-" 1110 "), 3.73V of V _4, of V ₄ 3.45V, ........., V ₁ of 1.96V, respectively correspond to 1.78V.

FIG. 5 is a graph plotting the correspondence relationship of FIG. The horizontal axis is the voltage and the vertical axis is the display data, and a substantially S-shaped correction curve connecting the intersections of the display data and the voltage is obtained. Thus, according to the present embodiment,
By simply adjusting the gains A of the four operational amplifiers 95 to 98 individually, it is possible to generate four types of voltages V _{1 to} V ₄ that have been subjected to gamma correction. If the number of stages of each voltage is 4, then 4
It is possible to generate 16 types of gradation voltages, which is 4 types. The type of voltage and the number of stages are examples, and for example, 6
When generating four types of gradation voltages, the reference voltage V
The number of steps of the staircase wave VW may be set to 8 while the number of types of R ₁ , VR ₂ , ...

FIG. 6 is a diagram showing a third embodiment of the gradation voltage generating circuit of the liquid crystal display device according to the present invention, which is 110 to 11
Reference numeral ₃ designates a DC voltage generator for generating fixed voltages VR _{1 to} VR _{4 having} different values (reverse polarity of VR _{j in} the second embodiment), and 114 to 117 are four operational amplifiers corresponding to the adder of FIG. , 118 to 121 are the first coefficient unit and the second coefficient unit of FIG.
A resistor network corresponding to a coefficient unit, and 122 is a staircase voltage generator that generates a staircase wave VW. The difference from the second embodiment is that the operational amplifiers 114 to 117 are operated as inverting amplifiers. Therefore, the resistor networks 118 to 121 are connected to VR.
_{It has} an input resistance Rs _j for _j , an input resistance Rs _j ′ for VW, and a common feedback resistance Rf _j .

According to this structure, the gain for VR _j can be changed by adjusting the ratio of Rs _j and Rf, and the gain for VW can be adjusted by adjusting the ratio of Rs _j ′ and Rf. Can be changed. Therefore, the gains of VR _j and VW can be set individually, and fine gamma correction can be performed, which is an advantage.

FIG. 7 is a diagram showing a fourth embodiment of the grayscale voltage generating circuit of the liquid crystal display device according to the present invention, and 130 to 13 are shown.
Reference numeral 3 denotes a DC voltage generator that generates fixed voltages VR _{1 to} VR ₄ (but the same polarity as VR _{j of} the second embodiment) having different values, and 134 to 137 are four operational amplifiers corresponding to the adder of FIG. 138A-141A and 138B-141B
Is a resistance network corresponding to the first coefficient device and the second coefficient device of FIG. 1, and 142 is a staircase voltage generator that generates a staircase wave VW.

The resistor network 138A~141A is provided with a input resistor Rb _j for input resistors Ra _j and VW for VR _j, common input resistor Rs _j and feedback resistor Rf
equipped with _j . By adjusting the ratio of Rs _j and Rf _j , the gains of the operational amplifiers 134 to 137 can be individually set, and by adjusting the ratio of Ra _j and Rb _j , the operational amplifiers 134 to 137 can be adjusted. VR _j and V
The addition rate with W can be set freely.

FIG. 8 is a diagram showing a fifth embodiment of the gradation voltage generating circuit of the liquid crystal display device according to the present invention, which has substantially the same configuration as that of the fourth embodiment. That is, in this fifth embodiment, four DC voltage generators 130 to 13 are used.
3 is provided on the side of the resistor networks 138B to 141B,
Further, since one end of Ra _j of the resistor networks 138A to 141A is connected to the ground, it looks like a configuration different from that of the fourth embodiment, but the DC voltage generator 1 in both embodiments is different.
When the positive electrodes of 30 to 133 and Ra _j are connected by virtual wiring, both have substantially the same configuration, so that any embodiment can obtain common actions and effects.

[0026]

According to the present invention, in addition to being able to generate various kinds of gradation voltages with a simple structure, gamma correction can be performed in consideration of the display characteristics of the liquid crystal, which is an advantageous effect not seen in the prior art. It is possible to realize a gradation voltage generating circuit having

[Brief description of drawings]

FIG. 1 is a configuration diagram of a first embodiment.

FIG. 2 is a configuration diagram of a second embodiment.

FIG. 3 is a waveform diagram of the second embodiment.

FIG. 4 is a preferred voltage level diagram considering gamma correction in the second embodiment.

FIG. 5 is a graph showing a graphical solution of a preferred voltage level considering gamma correction.

FIG. 6 is a configuration diagram of a third embodiment.

FIG. 7 is a configuration diagram of a fourth embodiment.

FIG. 8 is a configuration diagram of a fifth embodiment.

FIG. 9 is a block diagram of a main part of a liquid crystal display device including a grayscale voltage generation circuit.

FIG. 10 is a conceptual configuration diagram of a liquid crystal panel.

FIG. 11 is a configuration diagram of a conventional grayscale voltage generation circuit.

FIG. 12 is a waveform diagram of FIG. 11.

13 is a voltage level diagram and a timing diagram of FIG. 11.

FIG. 14 is a graph showing a TV curve of liquid crystal.

15 is a preferred gamma correction characteristic diagram for the TV curve of FIG.

[Explanation of symbols]

 50-53: DC voltage generator 54-57: Voltage adder 58: Staircase voltage generator 91-94: DC voltage generator 95-98: Operational amplifier (voltage adder) 103: Staircase voltage generator 110-113 : DC voltage generating unit 114 to 117: operational amplifier (voltage adding unit) 122: staircase voltage generating unit 130 to 133: DC voltage generating unit 134 to 137: operational amplifier (voltage adding unit) 142: staircase voltage generating unit

Claims (1)

[Claims] 1. A gradation voltage generating circuit for generating a staircase gradation voltage, comprising: a plurality of DC voltage generating sections for generating fixed voltages having different values; and a voltage adding section of the same number as the DC voltage generating sections. , A staircase voltage generator that generates a staircase, and each of the DC voltage generator and the voltage adder are grouped one by one, and the voltage adder in each group A gradation voltage generation circuit for a liquid crystal display device, wherein a fixed voltage generated in a DC voltage generation unit and the staircase wave are added, and the addition ratio is set for each group.