JPH04138087A - Speed controller for rotary body - Google Patents

Abstract

PURPOSE:To obtain a speed detector comprising only one half period detector by sequentially detecting half periods of a rotational speed proportional signal, transferring the detection output with half period timing and then adding the detection output to the transferring output. CONSTITUTION:A frequency generator signal 3 is subjected to frequency conversion as the rotational speed of a motor 1 varies with time. Consequently, the time interval between adjacent leading edge and trailing edge of a shaped speed proportional signal, i.e. the time interval of half period, varies. A half period detector 7c outputs a detection output 8d corresponding to the time interval of half period. A transfer unit 12 transfers the detection output 8d immediately after elapse of half period thus producing a transfer output 8e. An adder 13 adds the detection output 8d and the transfer output 8e to produce a control output, i.e. a speed detection output 8f.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a speed control device for a rotating body, and particularly to an improvement of a speed control device that is simplified and highly accurate.

[Prior Art] In speed control of rotating bodies that require precise constant speed rotation, such as drums and capstans in video tape recorders, an AC signal with a frequency proportional to the rotational speed of the rotating body is used. A frequency generator (hereinafter referred to as FC) that generates a frequency generator and a speed detector that generates a control output according to the frequency of the FC signal that is the output thereof are widely used.

FIG. 3 is a block diagram showing its basic configuration,
(1) is the motor, (2) is the FG, (3) is the FG multiplied signal (
4) is a speed detector, (5) is a waveform shaper that creates a speed proportional signal (6) having a leading edge and a trailing edge from the FG multiplied signal 3), and (7) is a waveform shaper that creates a speed proportional signal (6) having a leading edge and a trailing edge. a period detector (9) for detecting and generating a corresponding control output (8);
) is a filter for smoothing or phase compensation of the control output (8), and (10) is a motor drive circuit.

Note that this conventional example shows a so-called direct drive system in which the rotating body and the rotor of the motor (1) are directly connected.

Now, in such a speed control system, it is generally well known that in order to increase the stability of the system and improve the rotational performance, the FG frequency may be set high. This is because, as shown in the explanation below, the higher the FC frequency is, the more the phase delay of the speed detector (4) is reduced, and the higher the ripple frequency of the output is, the later the filter (
This is because the time constant of 9) can also be small, increasing the phase margin of the control system.

However, in actual systems, FG
The frequency cannot be set unnecessarily high. Therefore, low FG
Various efforts have been made to obtain sufficient performance regardless of frequency, and the most typical method is phase compensation using a filter. However, this method stabilizes a system that is originally unstable or in a nearly unstable state by changing part of the gain or phase frequency characteristics of the system, and it is not intended to increase the frequency of the FC described above. Such fundamental performance improvements cannot be expected.

Incidentally, since the operation of the entire speed control device is already widely known, the following explanation will focus on the speed detector according to the present invention.

First, the operation of the conventional speed detector (4) shown in FIG. 3 will be explained.

If the rotational speed of the motor is Nmo and the FG frequency is fc, then both have a proportional relationship. KG here
is the velocity-frequency conversion constant.

Now, consider the case where the rotational speed changes over time.

That is, Nm (t) - Nmo + ΔNm (t) - (2)
shall be. FIG. 4 shows the operation of speed detection rA(4) at this time.

When the rotational speed of the motor (1) changes with time, F
The G-fold signal 3) is frequency-modified: A (FM), and as a result,
The length of time between adjacent leading edges of the velocity proportional signal (6) changes. The period detector (7) outputs a control voltage according to the amount of change in this time length.

That is, from FIG. 4, IIj control output V, (t) is T
<t≦T (n-0, ±1, upper 2-) to n
nil ite, vF (t)1wvFo+ΔvF (t)−
V, o+Kv-ΔTn -VFo+Kv- ((TnTn-1) T c 1 ... (3) Here, VFo is the motor rotation speed Nmo
is the control output voltage when . Further, Kv is a period-voltage conversion constant, and here the polarity is negative.

This is because the polarity of ΔT is opposite to that of ΔNm, so K
It is merely intended to simplify the explanation by assuming that v has a negative polarity, and the same applies to the embodiments of the present invention to be described later. Here, the leading edge of the speed proportional signal (6) is used to detect the time length, but the same effect can be achieved even if the trailing edge is used.

Now, as is clear from Figure 4, this process is F
The demodulation process of the M signal itself, that is, by detecting the so-called "zero-crossing time" of the FM modulated carrier wave, the change in the carrier wave period is determined, and by converting it into voltage, the original modulated signal is restored. Therefore, it is easy to imagine that the higher the modulation frequency, the greater the phase delay.

In fact, in equation (2), ΔNm(t) is a single sine wave,
That is, ΔNm(t) −ΔNmacos (2πfmt+θm) −(4
) Here, fm: Rotational speed fluctuation frequency θm
: Initial phase ΔNmo : Rotation speed fluctuation amplitude (peak/zero value), and the FGC signal, that is, the carrier wave, is Vc (t
) = sln (2πf c t) − (5)
When fm, θm, and ΔNmo are varied, the demodulated output is expanded into a Fourier series, the fundamental wave component is extracted, and the phase delay θV is examined. Then, θ■ is fm
It has become clear that it is proportional to fc and inversely proportional to fc.

Here, in equation (6), the expression "approximately equal" means that this speed detection method is not based on the frequency itself;
This is because the reciprocal of the frequency, that is, the change in the period, is detected and a voltage proportional to the amount of change is output. Therefore, if the fluctuation rate (ΔN m o /N m o ) is large, a slight error will occur. However, according to the calculation,
Even if the fluctuation rate is set to a value of 10% from peak to zero, which is so large that it is hardly a target in an actual system, the error in θV is less than 1%. Note that this phase delay has also been confirmed through experiments using an actual motor control system.

Figure 5 shows ΔNm(t) and ΔVF(t) when 0m-0[''1 in equation (4).Here, the numbers inside 0 indicate the detection time. In this case, the phase delay θ■ becomes δ from equation (6), which can be easily confirmed from the waveforms in FIG.

By the way, what becomes immediately clear from such calculations is that if the time length of a half cycle of the FC signal (3) is detected and converted to a voltage, the phase delay θV can be reduced to half of the equation (6). It means that it will become. This is because this is equivalent to doubling the FG frequency in the demodulation process described above.

However, in this case, unlike the case of detecting the -474 period, if the FGC signal 3) is distorted or an offset occurs in the waveform shaper (5) as shown in Figure 6, the rotation speed will change. Speed detector (5) even if it is not fluctuating
The outputs (arrows and c in FIG. 6) generate ripples, and the DC component also changes, resulting in increased rotational unevenness and deviations in the set speed due to the ripples.

Furthermore, since the frequency of the ripple fundamental wave component is the FG frequency, if a filter is added to avoid an increase in rotational unevenness, its time constant must be sufficiently large with respect to the ripple frequency. As a result, there are many drawbacks, such as the effect of improving the phase delay associated with speed detection as described above is canceled out, and other countermeasures are also required.

Therefore, in an actual speed control system, the method of detecting speed from a half cycle of the FGC signal 3) has no merit in terms of performance or cost and is hardly used.

On the other hand, in the case of the method of detecting the -period, as is clear from FIG. 6, even if an offset occurs in the waveform shaper (5), no ripples or fluctuations in the DC component occur. However, even with such a period detection method, as shown in Fig. 5, if there is a speed fluctuation, a ripple occurs in the FG frequency, and as a matter of course, the magnitude of the ripple is smaller than that of the half period detection method. , and the ripple frequency is also low, so the time constant of the subsequent filter (9) must be set large. Therefore, the synergistic effect of the above-mentioned θV and the phase delay due to the time constant element of the filter (9) greatly limits the performance of the control system.

As mentioned above, conventional speed detection generally uses a method of detecting one cycle of the FGC signal.
Due to system constraints, if the FC frequency cannot be set to the desired height, the actual situation is that the specifications have to be lowered, with the expectation that performance will be incomplete.

In contrast, the applicant has proposed that, as mentioned above, even if the FG frequency cannot be set to a sufficiently high level in light of the performance standards assuming a conventional system, the performance will not deteriorate. In other words, we proposed a rotating body speed control device that can achieve higher performance than conventional systems even at the same FC frequency (Patent Publication No. 2).
-19712).

This proposal will be explained below based on FIG.

In Figure 7, (1) is the motor, (2) is the FG, (3
) is the FG multiplied signal (4) is the speed detector, (5) is the FG multiplied signal 3) from the speed proportional signal (6) with leading and trailing edges.
The waveform shaper (7a) creates the velocity proportional signal (6
), the first period detector (7b) detects the time length or period between adjacent leading edges of the speed proportional signal (6) and generates a corresponding control output (8a). Detects the time length or period of and outputs the control output accordingly (
8b), the second period detector (11) generates the first
The output selector (8c) alternately selects and outputs the output (8a) of the second period detector (7a) and the output (8b) of the second period detector (7b), and (8c) is the output selector (11). ) output,
That is, the output of the speed detector (4), (9) is the output (8c
), or a filter for the purpose of phase compensation of the control system, and (10) is a motor drive circuit.

In the above configuration, in the same manner as the conventional example described above, (2)
Consider the case where the rotational speed changes over time as shown in the equation. The operation of the speed detector (4) at this time is shown in FIG.

When the rotational speed of the motor (1) changes with time, F
The G multiplied signal 3) is frequency modulated. Therefore, the time length between adjacent leading edges and the time length between adjacent trailing edges of the waveform-shaped velocity proportional signal (6) change. The first period detector (7a) outputs a control output in response to a change in time length between adjacent leading edges, and the second period detector (7b) outputs a control output in response to a change in time length between adjacent trailing edges. Output (8a) and (8b). These first and second period detectors (7a), (7
b) constitutes the same detection method as the conventional one-period detection method described above.

Therefore, control output (8a) is vFl, control output (8b)
If we set VF2 as VF2, then from Fig. 8, T <t≦T
(k-0, ±1, ±2,...)2k 2
+2 at V (t) - VFo + ΔVF, (t) t layer V + I (v · ΔT2k F〇 - v + Kv ((T2 - T2 -2) - Tc) ... (9) T <
t≦T (k-0, ±1, ±2,...) +1 to 2
2 to +3 at V (t) −VFo+ΔVF2(t) −v 10Kv
- +1 to ΔT2 O = V + Kv 1 (+1 to T2 -1 to 2) O - T el (10).

Now, the output selector (11) is connected to the first period detector (7a
) from time T2k when the output (8a) of the second period detector (7b) changes to time T2 when the output (8b) of the second period detector (7b) changes by +1, the output (8a) of the period detector (7a) of ml is , and from +1 at time T2 when the output (8b) of the second period detector (7b) changes to +2 at time T2 when the output (8a) of the first period detector (7a) changes. The output (8b) of the period detector (7b) is selected as the output (8C) of the speed detector (4), respectively. Therefore, if the output (8c) of the speed detector (4) is set to V, then vr(t)
- V (t) (72k<t I V (t) (+1 to T2, < (k-0, ±1, ± ≦" +1 to 2) L S T n+2) 2,...) ... ( 11) It becomes.

Here, as in the conventional example, in equation (4), fm,
By varying θm1ΔNmo, extracting the fundamental wave component by expanding the demodulated output VP into a Fourier series, and examining the phase delay θV, it was found that [C...(J2)]. Note that the approximate symbols in the above equation are used for the same reason as in the conventional example. From this, it can be seen that in the speed detector (4) of FIG. 7, the phase delay is reduced by about 25% compared to the conventional one-period detection method.

Similarly to the conventional example, FIG. 9 shows ΔNm(t) and ΔVF(t) at the set value shown in equation (7). The number within 0 represents the detection time. In this case, the phase delay θ■ is obtained from equation (12) as follows.

As is clear from FIG. 9, the ripple is also reduced and the ripple frequency is doubled, and in this respect, it has both the advantages of the half-cycle detection described above.

Furthermore, as the ripple frequency becomes higher, the time constant of the subsequent filter (9) can also be reduced, so it goes without saying that the phase delay of the control loop is synergistically reduced. Furthermore, according to this method, since the time length detection is the same as the conventional one-synchronous detection, the drawbacks in half-cycle detection, namely distortion of the FG multiplied signal 3) and offset of the waveform shaper (5), Problems such as ripples occurring in the control output and deviations in DC potential do not occur.

[Problem to be solved by the invention H As described above, the method proposed by the applicant has many superior features compared to conventional methods, but due to its configuration, it requires two period detectors. Therefore, the circuit scale becomes relatively large, and if there is a difference in characteristics between the two period detectors, there will be a difference in their detection outputs, so even if there is no speed fluctuation, ripples at the fundamental frequency fc will appear on the control output. There were two problems that appeared.

This invention was made to solve the above-mentioned problems, and an object thereof is to obtain a speed detector that can be configured with one half-cycle detector.

[Means for Solving the Problems] A speed control device for a rotating body according to the present invention includes a half-cycle detection means for sequentially detecting half-cycles of a rotational speed proportional signal to obtain a detection output, and a half-cycle detection means for obtaining a detection output by sequentially detecting half-cycles of a rotational speed proportional signal; The speed detector includes a transfer means for transferring data at the timing of , and an adding means for adding the detected output and the transferred output.

[Function] The speed detector according to the present invention sequentially detects half cycles of the rotational speed proportional signal by the half cycle detection means, outputs this detection output with a half cycle delay by the transfer means, and outputs the detected output with a half cycle delay using the transfer means. Add the outputs to get the control output.

[Example] An embodiment of the present invention will be described below with reference to the drawings.

In FIG. 1, the same members as those in the conventional structure shown in FIGS. 3 and 7 are given the same reference numerals, and their explanations will be omitted.

In Figure 1, (7c) is a half-cycle detector that detects the time length of a half-cycle of the speed proportional signal (6) and obtains a corresponding detection output (8d), and (11) is a time course of the subsequent half-cycle. A transmitter that transfers the detection output in synchronization with the edge of the speed proportional signal that arrives later to obtain the transfer output (8e), (12) is controlled by adding the detection output (8d) and the transfer output (8e). This is an adder that obtains the output, that is, the speed detector output (8f).

In the above configuration, as in the conventional example, as in equation (2),
Consider the case where the rotation speed changes over time. The operation of the speed detector (4) at this time is shown in FIG.

When the rotational speed of the motor (1) changes with time, F
The G multiplied signal 3) is frequency modulated. Therefore, the time length of adjacent leading and trailing edges of the waveform-shaped velocity proportional signal, that is, the time length of a half cycle changes. Half cycle detector (7c)
outputs a detection output (8d) according to the time length of this half cycle. The transfer device (11) transfers this detection output (8d) immediately after the next half cycle has elapsed, and obtains a transfer output (8e).

Therefore, the detection output (8d) is VF6, and the transfer output (8e)
If we set VF4 as VF4, then from Fig. 2, T,
j-0, ±1, ±2, ...) V (t)-V-Fo +ΔVF3(t)-V"Fo
+Kv-ΔTj""FO... (14) It is expressed as: As is clear from FIGS. 2 and 8, T here is understood to be the same as "2" if we consider the case where the rotational speed Nm and the FG multiplication signal 3) are the same as in the conventional example. V'Fo is a detection output when the rotational speed of the motor is constant at Nmo.

Kv is set the same as in the conventional example.

On the other hand, the output (8e) of the transfer device (11) is T, <t≦T
j+, V (t) at (j-0, ±1, ±2,...) -V=F, +ΔVP4(t)=V-+K
It is expressed as v·ΔTj−1 FO ″VFO c +Kv ((T,, −Tj−2) −2.

Now, the adder (12) has a detection output (8d) and a transfer output (
8e) is added to obtain the control output, that is, the speed detector output (8e).
Since we obtain f), T, <t≦Tj+l (j-0, ±1, ±2,...)
In, V-F (t) = V (t) + VF4 (t)-2V=
+Kv (ΔT, +ΔTj−,)FOJ ″2VF.

-2v -ro 1K v [(Tj-Tj-2") Te1 becomes.

As mentioned above, T, -T, J 2 have '``j-2-''2-2'', so Tj< t≦Tj+1 (j -0,+1,±2,・
), V-F(t) -2V" +KV ((72 to -T2 to -2) -T
CIO −v,, (t) −(17), which agrees with equations (9) and (11).

However, 2V'. -■,. shall be.

Similarly, Tj+l<t≦Tj+2(j-01±1,±2,...
), V~F (1) −2V −PO+ K v (< TJ+l r J
-1) Tel "" 2 V -+ K V ((T2, t Tz
k−t) FO ˜Tc) −vF2(t) −(18), which agrees with equations (10) and (11).

In equations (17) and (18), v-. Since is the set value when there is no speed fluctuation, it means that it is sufficient to set it as V ″ vFO .This is a parameter that has nothing to do with the transmission characteristics of speed fluctuation, so the configuration in Figure 7 and Figure 7. It is clear from this that the configuration shown in FIG. 1 has completely equivalent performance.

Therefore, according to the present invention, the characteristics of the speed detector, namely:
It has been proven that the effects such as reduction in phase delay, improvement in ripple, and no change in DC potential are completely equivalent to the invention previously proposed by the present applicant. Furthermore, since a single half-cycle detector can be used, it is possible to simplify the circuit and reduce the cost of the device.

Furthermore, the configuration previously proposed by the present applicant has a problem in that ripples at the fundamental frequency fc occur in the output when there is a difference in characteristics between the two period detectors, but according to the configuration of the present invention,
Since there is only one half-cycle detector, this problem does not occur, and an extremely highly accurate device can be realized.

The configuration of the transmitter (11) and adder (12) is very similar to a transversal acyclic filter.In fact, if the speed fluctuation is made infinitely small, the transfer interval is T c / 2. and in its limit, the delay becomes T
It will be easy to understand that this is a transversal filter with c/2 and a coefficient of 1.

In the above embodiment, the waveform shaper (5) is provided at the first stage of the speed detector (4), but if the FG multiplied signal 3) has a waveform like the speed proportional signal (6), that is, the leading edge and If the waveform has a trailing edge, the waveform shaper (5) can be omitted.

Furthermore, as a method for detecting a half cycle, there are methods to achieve the conversion operation, such as a method that utilizes the charging and discharging of a conventionally commonly used CR circuit, or a method that counts the length of the period using a separately obtained clock signal. Any method is acceptable as long as it is possible.

Furthermore, although the detection output (8d) is shown as a sample-and-hold type, it may also be a counted value (count value) obtained by counting the length of a half cycle using a clock signal as described above. (11) transfers this count value and outputs it (
It is clear that 8e) is sufficient. Of course, the adder (12) may also add these two counts.

Also, although the output (8f) of the speed detector (4) is shown in a sample-and-hold format, the same effect can be obtained even if the so-called pulse width modulation (PWM) method is used, which changes the output duty according to changes in the cycle. It is clear that the following can be obtained.

In addition, in the above embodiments, the rotating body was directly driven, but
It goes without saying that similar effects can be obtained with other drive systems such as belt drive.

[Effects of the Invention] As described above, according to the present invention, the time length between adjacent edges of the rotational speed proportional signal, that is, the half cycle is detected, and this is transferred at the timing of every half cycle, and the detected output is Since the control output is obtained by adding the above, it is possible to obtain the same effect as the method previously proposed by the applicant, and also has the advantage of being able to produce a device at a low cost and with high accuracy. effective.

[Brief explanation of drawings]

Fig. 1 is a block diagram showing one embodiment of the speed control device for a rotating body according to the present invention, Fig. 2 is a timing diagram for explaining the operation of the speed detector in Fig. 1, and Fig. 3 is a diagram of a conventional system. The block diagram, Figure 4 is a timing diagram for explaining the operation of the speed detector in Figure 3, and Figure 5 is a timing diagram for explaining the operation of the speed detector in Figure 3.
Figure 6 is a waveform diagram showing the influence of offset in the method of detecting a half-frequency device; Figure 7 is a waveform diagram calculated using specific values based on the speed detector shown in Figure 7; FIG. 8 is a timing diagram for explaining the operation of the speed detector in FIG. 7, and FIG. 9 is a block diagram showing an embodiment of the invention proposed in FIG. It is a control output waveform diagram calculated using numerical values. In the figure, (1) is a motor, (2) is a frequency generator,
(4) is a speed detector, (7c) is a half-period detector, (11
) is a transfer device, (12) is an adder, and (12) is a motor drive circuit. Note that the same symbols in each figure indicate the same or equivalent parts.

Claims (1)

[Claims] A frequency generator that generates an alternating current signal with a frequency proportional to the rotational speed of a rotating body, and a rotational speed proportional signal having a leading edge and a trailing edge obtained based on the output of the frequency generator. A speed control device for a rotating body including a speed detector that generates a control output according to a frequency, and a drive circuit that drives the rotating body according to the output of the speed detector, wherein the speed detector is configured to control the rotation speed of the rotating body. A half-circuit device that sequentially detects the time length between the leading edge of a speed proportional signal and the trailing edge that follows it, and the time length between the trailing edge and the trailing edge that follows it, and sequentially generates a detection output according to the length. a period detecting means, in which the detection output is inputted and the detection output is inputted, and the period detection means synchronizes with the leading edge or the trailing edge of the rotational speed proportional signal immediately after the next time length following the time length corresponding to the detection output has elapsed. A speed control device for a rotating body, comprising: a transfer means for transferring a detection output; and an addition means for adding the detection output and the output of the transfer means.