JPH04132212A - Manufacture of semiconductor film - Google Patents
Manufacture of semiconductor filmInfo
- Publication number
- JPH04132212A JPH04132212A JP25196490A JP25196490A JPH04132212A JP H04132212 A JPH04132212 A JP H04132212A JP 25196490 A JP25196490 A JP 25196490A JP 25196490 A JP25196490 A JP 25196490A JP H04132212 A JPH04132212 A JP H04132212A
- Authority
- JP
- Japan
- Prior art keywords
- amorphous
- film
- heat treatment
- glass substrate
- melting point
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 11
- 238000004519 manufacturing process Methods 0.000 title claims description 11
- 229910021417 amorphous silicon Inorganic materials 0.000 claims abstract description 29
- 238000000034 method Methods 0.000 claims abstract description 29
- 239000000758 substrate Substances 0.000 claims abstract description 28
- 238000010438 heat treatment Methods 0.000 claims abstract description 18
- 238000002844 melting Methods 0.000 claims abstract description 17
- 230000008018 melting Effects 0.000 claims abstract description 17
- 239000007790 solid phase Substances 0.000 claims abstract description 13
- 239000010408 film Substances 0.000 claims description 23
- 239000010409 thin film Substances 0.000 claims description 14
- 229910021419 crystalline silicon Inorganic materials 0.000 claims description 13
- 230000002776 aggregation Effects 0.000 claims description 4
- 238000005054 agglomeration Methods 0.000 claims description 3
- 238000000059 patterning Methods 0.000 claims 1
- 239000011521 glass Substances 0.000 abstract description 20
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract description 11
- 239000007791 liquid phase Substances 0.000 abstract description 8
- 239000013078 crystal Substances 0.000 abstract description 5
- 238000000926 separation method Methods 0.000 description 4
- 239000012071 phase Substances 0.000 description 3
- 238000000137 annealing Methods 0.000 description 2
- 230000001678 irradiating effect Effects 0.000 description 2
- 238000005224 laser annealing Methods 0.000 description 2
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 2
- 230000002269 spontaneous effect Effects 0.000 description 2
- 238000001947 vapour-phase growth Methods 0.000 description 2
- 235000010724 Wisteria floribunda Nutrition 0.000 description 1
- 238000004220 aggregation Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 238000002425 crystallisation Methods 0.000 description 1
- 230000008025 crystallization Effects 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 229910052736 halogen Inorganic materials 0.000 description 1
- 150000002367 halogens Chemical class 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 230000003685 thermal hair damage Effects 0.000 description 1
- 239000002966 varnish Substances 0.000 description 1
Landscapes
- Thin Film Transistor (AREA)
- Recrystallisation Techniques (AREA)
Abstract
Description
【発明の詳細な説明】
(産業上の利用分野)
本発明は、絶縁基板上に薄膜トランジスタ等の素子を集
積化して電子デバイスを作製する際に、その半導体活性
層となる多結晶Si薄膜を形成するための製造方法に関
する。Detailed Description of the Invention (Industrial Application Field) The present invention is directed to the formation of a polycrystalline Si thin film that will become a semiconductor active layer when manufacturing electronic devices by integrating elements such as thin film transistors on an insulating substrate. It relates to a manufacturing method for.
(従来の技術)
従来、絶縁基板上に多結晶Si薄膜を形成する製造方法
としては、絶縁基板上に非晶質Si薄膜を着膜し、ファ
ーネス・アニール法やレーザーアニール法等の熱処理を
行なうことにより、非晶質Si薄膜中に含まれる核を中
心として自然発生的に固相成長させて多結晶化する方法
が用いられている。しかしなから上記方法は、自然発生
的に固相成長させるため、多結晶化したグレインの位置
や個数の制御が困難であり、また、グレインとしての結
晶性が悪いため大きなグレインとすることが困難であっ
た。(Prior art) Conventionally, as a manufacturing method for forming a polycrystalline Si thin film on an insulating substrate, an amorphous Si thin film is deposited on the insulating substrate, and heat treatment such as a furnace annealing method or a laser annealing method is performed. Accordingly, a method is used in which the amorphous Si thin film undergoes spontaneous solid-phase growth centering around nuclei contained in the amorphous Si thin film to become polycrystalline. However, since the above method uses spontaneous solid-phase growth, it is difficult to control the position and number of polycrystalline grains, and it is difficult to form large grains due to the poor crystallinity of the grains. Met.
そこで近年、複数に分離したSi薄膜に熱処理を施し、
凝集反応により結晶化させて核を形成し、この核を中心
として多結晶を成長させる方法が提案されている。Therefore, in recent years, heat treatment has been applied to Si thin films separated into multiple parts.
A method has been proposed in which a nucleus is formed by crystallization through an aggregation reaction, and a polycrystal is grown around this nucleus.
この方法は、絶縁基板上に着膜したSi薄膜を複数のド
ツト分離形状に微細パターニングし、次に熱処理を行い
、凝集反応により結晶Siの核を形成し、更に個々の結
晶Siを核としてCVD法により気相成長させ、前記該
を中心として多結晶を成長させるものである。この方法
によると、結晶Siの核の個数及び位置の制御が容易で
あり、大きなグレインとすることができるという利点が
ある。In this method, a Si thin film deposited on an insulating substrate is finely patterned into a plurality of separated dot shapes, then heat treated to form crystalline Si nuclei through an agglomeration reaction, and then CVD using individual crystalline Si as nuclei. This method uses vapor phase growth to grow polycrystals around the crystals. This method has the advantage that the number and position of crystalline Si nuclei can be easily controlled and large grains can be formed.
(発明が解決しようとする課題)
しかしなから上記方法によれば、気相成長させる際に、
絶縁基板の温度を高温(700〜1000℃)ニスる高
温プロセスが必要になる。液晶デイスプレィ等の大面積
デバイスにおいては、高温プロセスを施すことのできな
いガラス基板が絶縁基板として用いられるので、上記方
法ではガラス基板上に多結晶Si薄膜を形成することが
できないという問題点があった。(Problem to be solved by the invention) However, according to the above method, during vapor phase growth,
A high-temperature process is required to varnish the insulating substrate at a high temperature (700 to 1000°C). In large-area devices such as liquid crystal displays, glass substrates that cannot be subjected to high-temperature processes are used as insulating substrates, so the above method has the problem of not being able to form polycrystalline Si thin films on glass substrates. .
本発明は上記実情に鑑みてなされたもので、ガラス基板
上に大きなグレインの集合体から成る多結晶Si薄膜を
形成することができる半導体膜の製造方法を提供するこ
とを目的とする。The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a method for manufacturing a semiconductor film that can form a polycrystalline Si thin film consisting of a large grain aggregate on a glass substrate.
(課題を解決するための手段)
上記従来例の問題点を解消するため本発明に係る半導体
膜の製造方法は、次の工程を具備することを特徴として
いる。(Means for Solving the Problems) In order to solve the problems of the conventional example described above, a method for manufacturing a semiconductor film according to the present invention is characterized by comprising the following steps.
第1の工程として、絶縁基板上に着膜されたSi薄膜を
複数のドツト分離形状に微細パターニングし、熱処理を
行なうことによる凝集反応により結晶Siから成る単一
ドメイン咳を形成する。In the first step, a Si thin film deposited on an insulating substrate is finely patterned into a plurality of separated dot shapes, and a single domain composed of crystalline Si is formed by agglomeration reaction caused by heat treatment.
第2の工程として、前記単一ドメイン核を覆うように非
晶lsiを着膜する。As a second step, amorphous lsi is deposited to cover the single domain core.
第3の工程として、非晶質Siの融点より高く結晶Si
の融点より低い温度の範囲て熱処理を行ない、前記単一
ドメイン核を中心とした固相成長により前記非晶質Si
の膜全体を多結晶Siとする。As the third step, crystalline Si is heated to a temperature higher than the melting point of amorphous Si.
Heat treatment is performed in a temperature range lower than the melting point of the amorphous Si by solid phase growth centered on the single domain nucleus.
The entire film is made of polycrystalline Si.
(作用)
本発明方法によれば、非晶質Siの融点と結晶Siの融
点が異なる点を利用し、単一ドメイン核を覆うように着
膜した非晶質Si膜を、非晶質Siの融点より高く結晶
Siの融点より低い温度の範囲で熱処理を行なう。この
プロセスにより、時的に液相となったSiが同相となる
とき、固相のまま存在する前記単一ドメイン核を中心と
して固相成長し、前記非晶質Siの膜全体を大きなグレ
インを有する多結晶Siとすることかできる。(Function) According to the method of the present invention, the melting points of amorphous Si and crystalline Si are different, and an amorphous Si film deposited to cover a single domain nucleus is The heat treatment is performed in a temperature range higher than the melting point of crystalline Si and lower than the melting point of crystalline Si. Through this process, when the Si, which has temporarily become a liquid phase, becomes the same phase, it grows in a solid phase centered on the single domain nucleus that remains in the solid phase, and the entire amorphous Si film is grown into large grains. It is also possible to use polycrystalline Si having the following properties.
(実施例)
本発明の半導体膜の製造方法の実施例について第1図及
び第2図を参照しなから説明する。(Example) An example of the method for manufacturing a semiconductor film of the present invention will be described with reference to FIGS. 1 and 2.
ガラス基板1上にLPCVD法を用いて非晶質Si膜2
を厚さ200A着膜する(第1図(a)。An amorphous Si film 2 is formed on a glass substrate 1 using the LPCVD method.
is deposited to a thickness of 200A (Fig. 1(a)).
第2図(a))。次いで、フォトリソ法により前記非晶
質Si薄膜2を5μmピッチで3×3μmの大きさの複
数のドツト分離部2aが複数列並ぶ形状に微細パターニ
ングする(第1図(b)、第2図(b))。Figure 2(a)). Next, the amorphous Si thin film 2 is finely patterned by photolithography into a shape in which a plurality of dot separation parts 2a each having a size of 3×3 μm are lined up in multiple rows at a pitch of 5 μm (Fig. 1(b), Fig. 2(b)). b)).
ガラス基板1上方からエキシマレーザ光(KrF、波長
248nm、エネルギー密度400mJ/cm’)を照
射して熱処理を行なうとドツト分離部2aが解けて液相
になる。その際、各液相の体積が小さいので表面張力に
より凝集し、ガラス基板1側から冷却されると、前記液
相が同相となるときに直径0.7μm以下の単結晶から
成る単一ドメイン核2bを形成する(第1図(C)、第
2図(C))。熱処理前のドツト分離部2aは非晶質で
あるが、熱処理及び冷却後は、体積か小さいので単結晶
Siから構成される単一ドメイン核となる。When heat treatment is performed by irradiating excimer laser light (KrF, wavelength 248 nm, energy density 400 mJ/cm') from above the glass substrate 1, the dot separation portions 2a are dissolved and become a liquid phase. At this time, since the volume of each liquid phase is small, they aggregate due to surface tension, and when the liquid phases are cooled from the glass substrate 1 side, when the liquid phases become the same phase, a single domain nucleus consisting of a single crystal with a diameter of 0.7 μm or less 2b (Fig. 1(C), Fig. 2(C)). The dot separation part 2a before heat treatment is amorphous, but after heat treatment and cooling, since the volume is small, it becomes a single domain nucleus composed of single crystal Si.
次に、前記単一ドメイン核2bを覆うように、ガラス基
板1上にLPCVD法を用いて非晶質Si膜3を厚さ1
00OA着膜する(第1図(d)。Next, an amorphous Si film 3 is deposited to a thickness of 1 on the glass substrate 1 using the LPCVD method so as to cover the single domain nucleus 2b.
00OA film is deposited (Fig. 1(d)).
第2図(d))。Figure 2(d)).
ガラス基板1上方からエキシマレーザ光(KrF、波長
248nm、エネルギー密度350mJ/cm’)を照
射して熱処理を行なう。この熱処理は、非晶質S1の融
点(1350’ K)より高く結晶Siの融点(168
3@K)より低い温度の範囲になるように、レーザ光の
エネルギー密度を制御する。このプロセスにより、単一
ドメイン核2bを融解させずに非晶質Si膜3のみを融
解させ、−時的に液相となったSiがガラス基板1側か
ら冷却されて固相となる際、固相のまま存在する6単一
ドメイン核2bを中心として、複数のドメイン3aが固
相成長する。そして、複数のドメイン3aを有する2〜
4μmの大きなグレイン4が形成されることにより、非
晶質Si膜3全体にわたって多結晶Siとすることがで
きる(第1図(e)、第2図(e))。Heat treatment is performed by irradiating the glass substrate 1 with excimer laser light (KrF, wavelength 248 nm, energy density 350 mJ/cm') from above. This heat treatment lowers the melting point of crystalline Si (168' K) higher than the melting point of amorphous S1 (1350' K).
3@K) Control the energy density of the laser beam so that it is in a lower temperature range. Through this process, only the amorphous Si film 3 is melted without melting the single domain core 2b, and - when the Si, which has temporarily become a liquid phase, is cooled from the glass substrate 1 side and becomes a solid phase, A plurality of domains 3a grow in a solid phase around a six single domain core 2b that remains in a solid phase. And 2~ having multiple domains 3a
By forming large grains 4 of 4 μm, polycrystalline Si can be formed over the entire amorphous Si film 3 (FIGS. 1(e) and 2(e)).
上記半導体膜の製造方法の熱処理において用いられたレ
ーザ光は、着膜された非晶質Si膜膜部部分までしか到
達しないので、非晶質Si膜膜部部分高温となってもガ
ラス基板1に熱的なダメージを与えることがない。従っ
て、ガラス基板1を劣化させることなくガラス基板1上
に多結晶Si薄膜を形成することができる。また、レー
ザアニール法以外にハロゲンランプの光を集光させて照
射するフラッシュアニール法を用いてもよい。The laser light used in the heat treatment of the semiconductor film manufacturing method described above reaches only the deposited amorphous Si film portion, so even if the amorphous Si film portion reaches a high temperature, the glass substrate will not cause thermal damage. Therefore, a polycrystalline Si thin film can be formed on the glass substrate 1 without deteriorating the glass substrate 1. Further, instead of the laser annealing method, a flash annealing method in which light from a halogen lamp is focused and irradiated may be used.
(発明の効果)
本発明方法によれば、非晶質Siの融点と結晶Siの融
点が異なる点を利用し、単一ドメイン核を覆うように着
膜した非晶質Si膜を、非晶質Siの融点より高く結晶
Siの融点より低い温度の範囲て熱処理を行なう。この
プロセスにより、時的に液相となったSiか固相となる
とき、同相のまま存在する前記単一ドメイン核を中心と
して固相成長させるので、高温プロセスを施すことがで
きないガラス基板に着膜された非晶質Siの膜全体を、
大きなグレインを有する多結晶Siとすることができる
。従って、ガラス基板上に品質の良い半導体膜を製造す
ることかできる。(Effects of the Invention) According to the method of the present invention, the melting points of amorphous Si and crystalline Si are different, and an amorphous Si film deposited to cover a single domain nucleus is The heat treatment is performed within a temperature range higher than the melting point of pure Si and lower than the melting point of crystalline Si. Through this process, when Si, which temporarily becomes a liquid phase, becomes a solid phase, it grows in a solid phase centering on the single domain nucleus that remains in the same phase, so it can attach to a glass substrate that cannot be subjected to high-temperature processes. The entire amorphous Si film is
It can be polycrystalline Si with large grains. Therefore, a high quality semiconductor film can be manufactured on a glass substrate.
第1図Ca)乃至(e)は本発明方法実施例の半導体膜
の製造プロセスの断面説明図、第2図(a)乃至(e)
は本発明方法実施例の半導体膜の製造プロセスの平面説
明図である。
l・・・・・・ガラス基板
2・・・・・・非晶質Si膜
2a・・・ドツト分離部
2b−ソ・単一ドメイン核
3・・・・・・非晶質Si膜
3a・・・ドメイン
4・・・・・・グレイン
出 願 人 富士ゼロックス株式会社
代理人弁理士 阪 本 清 孝
代理人弁理士 船 津 暢 宏
第1図Fig. 1 Ca) to (e) are cross-sectional explanatory diagrams of the manufacturing process of a semiconductor film according to an embodiment of the method of the present invention, and Fig. 2 (a) to (e)
FIG. 2 is a plan view illustrating a semiconductor film manufacturing process according to an embodiment of the method of the present invention. l...Glass substrate 2...Amorphous Si film 2a...Dot separation section 2b-Single domain nucleus 3...Amorphous Si film 3a... ...Domain 4...Grain Applicant Fuji Xerox Co., Ltd. Representative Patent Attorney Kiyotaka Sakamoto Representative Patent Attorney Nobuhiro Funatsu Figure 1
Claims (1)
状に微細パターニングし、熱処理を行なうことによる凝
集反応により結晶Siから成る単一ドメイン核を形成す
る工程と、前記単一ドメイン核を覆うように非晶質Si
を着膜する工程と、 非晶質Siの融点より高く結晶Siの融点より低い温度
の範囲で熱処理を行ない、前記単一ドメイン核を中心と
した固相成長により前記非晶質Siの膜全体を多結晶S
iとする工程と、 を具備する半導体膜の製造方法。[Scope of Claims] A step of finely patterning a Si thin film deposited on an insulating substrate into a plurality of separated dot shapes, and forming a single domain nucleus made of crystalline Si through an agglomeration reaction by heat treatment; Amorphous Si covers single domain core
and heat treatment at a temperature higher than the melting point of amorphous Si and lower than the melting point of crystalline Si, and the entire film of amorphous Si is grown by solid phase growth centered on the single domain nucleus. Polycrystalline S
A method for manufacturing a semiconductor film, comprising a step of i.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP25196490A JP2861345B2 (en) | 1990-09-25 | 1990-09-25 | Method for manufacturing semiconductor film |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP25196490A JP2861345B2 (en) | 1990-09-25 | 1990-09-25 | Method for manufacturing semiconductor film |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH04132212A true JPH04132212A (en) | 1992-05-06 |
JP2861345B2 JP2861345B2 (en) | 1999-02-24 |
Family
ID=17230611
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP25196490A Expired - Lifetime JP2861345B2 (en) | 1990-09-25 | 1990-09-25 | Method for manufacturing semiconductor film |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2861345B2 (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5766989A (en) * | 1994-12-27 | 1998-06-16 | Matsushita Electric Industrial Co., Ltd. | Method for forming polycrystalline thin film and method for fabricating thin-film transistor |
US5879447A (en) * | 1992-04-30 | 1999-03-09 | Kabushiki Kaisha Toshiba | Semiconductor device and its fabricating method |
JP2002359195A (en) * | 2001-06-01 | 2002-12-13 | Fujitsu Ltd | Method for manufacturing semiconductor device |
JP2009004629A (en) * | 2007-06-22 | 2009-01-08 | Semiconductor Energy Lab Co Ltd | Method and apparatus for forming polycrystalline semiconductor film |
WO2016155149A1 (en) * | 2015-03-27 | 2016-10-06 | 京东方科技集团股份有限公司 | Preparation method for polycrystalline silicon thin film, semiconductor device, display substrate and display device |
CN106229254A (en) * | 2016-08-31 | 2016-12-14 | 京东方科技集团股份有限公司 | The manufacture method of a kind of polysilicon and polysilicon membrane |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102709160B (en) * | 2012-03-01 | 2018-06-22 | 京东方科技集团股份有限公司 | The production method and low-temperature polysilicon film of a kind of low-temperature polysilicon film |
-
1990
- 1990-09-25 JP JP25196490A patent/JP2861345B2/en not_active Expired - Lifetime
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5879447A (en) * | 1992-04-30 | 1999-03-09 | Kabushiki Kaisha Toshiba | Semiconductor device and its fabricating method |
US6066872A (en) * | 1992-04-30 | 2000-05-23 | Kabushiki Kaisha Toshiba | Semiconductor device and its fabricating method |
US6093243A (en) * | 1992-04-30 | 2000-07-25 | Kabushiki Kaisha Toshiba | Semiconductor device and its fabricating method |
US5766989A (en) * | 1994-12-27 | 1998-06-16 | Matsushita Electric Industrial Co., Ltd. | Method for forming polycrystalline thin film and method for fabricating thin-film transistor |
JP2002359195A (en) * | 2001-06-01 | 2002-12-13 | Fujitsu Ltd | Method for manufacturing semiconductor device |
JP2009004629A (en) * | 2007-06-22 | 2009-01-08 | Semiconductor Energy Lab Co Ltd | Method and apparatus for forming polycrystalline semiconductor film |
WO2016155149A1 (en) * | 2015-03-27 | 2016-10-06 | 京东方科技集团股份有限公司 | Preparation method for polycrystalline silicon thin film, semiconductor device, display substrate and display device |
US10062566B2 (en) | 2015-03-27 | 2018-08-28 | Boe Technology Group Co., Ltd. | Semiconductor device, display substrate, display device, and method for manufacturing polysilicon film |
CN106229254A (en) * | 2016-08-31 | 2016-12-14 | 京东方科技集团股份有限公司 | The manufacture method of a kind of polysilicon and polysilicon membrane |
Also Published As
Publication number | Publication date |
---|---|
JP2861345B2 (en) | 1999-02-24 |
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