CN106229254A - The manufacture method of a kind of polysilicon and polysilicon membrane - Google Patents
The manufacture method of a kind of polysilicon and polysilicon membrane Download PDFInfo
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- CN106229254A CN106229254A CN201610800014.0A CN201610800014A CN106229254A CN 106229254 A CN106229254 A CN 106229254A CN 201610800014 A CN201610800014 A CN 201610800014A CN 106229254 A CN106229254 A CN 106229254A
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- 229910021420 polycrystalline silicon Inorganic materials 0.000 title claims abstract description 94
- 229920005591 polysilicon Polymers 0.000 title claims abstract description 92
- 238000000034 method Methods 0.000 title claims abstract description 71
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 46
- 239000012528 membrane Substances 0.000 title claims abstract description 19
- 239000013078 crystal Substances 0.000 claims abstract description 55
- 229910021417 amorphous silicon Inorganic materials 0.000 claims abstract description 50
- 239000000758 substrate Substances 0.000 claims abstract description 26
- 238000005224 laser annealing Methods 0.000 claims abstract description 22
- RKTYLMNFRDHKIL-UHFFFAOYSA-N copper;5,10,15,20-tetraphenylporphyrin-22,24-diide Chemical compound [Cu+2].C1=CC(C(=C2C=CC([N-]2)=C(C=2C=CC=CC=2)C=2C=CC(N=2)=C(C=2C=CC=CC=2)C2=CC=C3[N-]2)C=2C=CC=CC=2)=NC1=C3C1=CC=CC=C1 RKTYLMNFRDHKIL-UHFFFAOYSA-N 0.000 claims abstract description 17
- 238000002425 crystallisation Methods 0.000 claims abstract description 13
- 230000008025 crystallization Effects 0.000 claims abstract description 13
- 229910021419 crystalline silicon Inorganic materials 0.000 claims abstract description 7
- 238000000137 annealing Methods 0.000 claims description 6
- 239000010410 layer Substances 0.000 description 108
- 239000010408 film Substances 0.000 description 50
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 8
- 239000010703 silicon Substances 0.000 description 8
- 230000015572 biosynthetic process Effects 0.000 description 7
- 238000005516 engineering process Methods 0.000 description 7
- 229910052710 silicon Inorganic materials 0.000 description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 7
- 239000012071 phase Substances 0.000 description 6
- 238000009826 distribution Methods 0.000 description 5
- 229910052581 Si3N4 Inorganic materials 0.000 description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 239000000377 silicon dioxide Substances 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- 239000010409 thin film Substances 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- HGCGQDMQKGRJNO-UHFFFAOYSA-N xenon monochloride Chemical compound [Xe]Cl HGCGQDMQKGRJNO-UHFFFAOYSA-N 0.000 description 2
- -1 KrF Chemical compound 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- ISQINHMJILFLAQ-UHFFFAOYSA-N argon hydrofluoride Chemical compound F.[Ar] ISQINHMJILFLAQ-UHFFFAOYSA-N 0.000 description 1
- 238000003491 array Methods 0.000 description 1
- 238000005660 chlorination reaction Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 239000002355 dual-layer Substances 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 239000007792 gaseous phase Substances 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 230000006698 induction Effects 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- VDGJOQCBCPGFFD-UHFFFAOYSA-N oxygen(2-) silicon(4+) titanium(4+) Chemical compound [Si+4].[O-2].[O-2].[Ti+4] VDGJOQCBCPGFFD-UHFFFAOYSA-N 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 238000001953 recrystallisation Methods 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 239000007790 solid phase Substances 0.000 description 1
- 238000007738 vacuum evaporation Methods 0.000 description 1
- 229910052724 xenon Inorganic materials 0.000 description 1
- FHNFHKCVQCLJFQ-UHFFFAOYSA-N xenon atom Chemical compound [Xe] FHNFHKCVQCLJFQ-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02587—Structure
- H01L21/0259—Microstructure
- H01L21/02595—Microstructure polycrystalline
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Ceramic Engineering (AREA)
- Recrystallisation Techniques (AREA)
Abstract
The embodiment of the invention discloses manufacture method and the polysilicon membrane of a kind of polysilicon, including: on underlay substrate, form the film layer for planting crystal seed；Formed on the surface of film layer to set multiple groove structures of spacing equidistant array arrangement；Film layer is formed comprise be planted in each groove structure in constitute the amorphous silicon layer of crystal seed；Amorphous silicon layer is carried out laser annealing process, makes non-crystalline silicon start growth crystallization from the position of each crystal seed, form the polysilicon layer of the tetragonal system with spacing crystallite dimension.Owing to each groove structure is square array arrangement on the surface of film layer, therefore, the crystal seed being planted in each groove structure may be constructed square arrangement, the amorphous silicon layer arranged on it can be made from the position of each crystal seed when carrying out laser annealing and processing to start growth crystallization, thus obtain the crystallite dimension polysilicon compared with the tetragonal system big, crystallite dimension is single and crystalline phase is stable.
Description
Technical field
The present invention relates to polysilicon manufacturing technology field, the manufacture method of a kind of polysilicon and polysilicon membrane.
Background technology
In display floater manufacturing, polycrystalline silicon technology, owing to having preferable mobility, progressively becomes display floater
The direction of technological innovation, this polysilicon displays making to have the advantages such as frivolous, low power consuming, high brightness, high-resolution enjoys
Attract attention.
In the prior art, the manufacture method of polysilicon membrane includes quasi-molecule laser annealing, solid phase crystallization, metal inducement
The multiple manufacture method such as crystallization.And use quasi-molecule laser annealing technique, obtaining polysilicon membrane is the unique amount of having been carried out
The method produced.
Grain size and the focus controlling always polysilicon Display Technique area research of crystal grain single size.Cause
The polysilicon grain quantity covered by the channel region of thin film transistor (TFT) in polysilicon displays backboard and distribution situation, will be directly
The electric properties such as the uniformity having influence on mobility size, mobility and threshold voltage.Utilize the polysilicon that prior art makes
Crystallite dimension is less than normal, and grain size distribution is uneven, and the crystal grain of the stable tetragonal system of crystalline phase is difficult to ensure that.By this
When the polysilicon that size is less is applied in the backboard of polysilicon displays, it may appear that carrier mobility is low, mobility and threshold
The problems such as threshold voltage is uneven.Therefore, crystallite dimension how is made compared with the tetragonal big, crystallite dimension is single and crystalline phase is stable
The polysilicon of system is a difficult problem urgently to be resolved hurrily.
Summary of the invention
In view of this, the embodiment of the present invention provides manufacture method and the polysilicon membrane of a kind of polysilicon, existing in order to solve
The polysilicon grain size having manufacture method to produce is less, and grain size distribution is uneven, and is difficult to ensure that as tetragonal crystal
The problem of system.
Therefore, the embodiment of the present invention provides the manufacture method of a kind of polysilicon, including:
Underlay substrate is formed the film layer for planting crystal seed；
Formed on the surface of described film layer to set multiple groove structures of spacing equidistant array arrangement；
Described film layer is formed comprise be planted in each described groove structure in constitute the amorphous silicon layer of crystal seed；
Described amorphous silicon layer is carried out laser annealing process, makes non-crystalline silicon start grown junction from the position of each described crystal seed
Crystalline substance, forms the polysilicon layer of the tetragonal system with described spacing crystallite dimension.
In a kind of possible implementation, in the manufacture method of the above-mentioned polysilicon of embodiment of the present invention offer,
Forming the film layer for planting crystal seed on underlay substrate is one below or combination:
The cushion formed on underlay substrate；
It is arranged at the polysilicon on described cushion.
In a kind of possible implementation, in the manufacture method of the above-mentioned polysilicon of embodiment of the present invention offer, when
When described film layer is at least two, formed to set the arrangement of spacing equidistant array many on the surface of non-first described film layer
Individual groove structure, specifically includes:
Each groove structure that an above described film surface is formed sets two times of spacing, on the surface of film layer this described
Form multiple groove structures of equidistant array arrangement；And the surface of this film layer formed groove structure on underlay substrate
The orthographic projection location overlap of the groove structure that the surface of orthographic projection and a upper described film layer is formed.
In a kind of possible implementation, in the manufacture method of the above-mentioned polysilicon of embodiment of the present invention offer,
The surface of first described film layer is formed to set multiple groove structures of spacing equidistant array arrangement, specifically includes:
With 3 μm for setting spacing, form multiple grooves knot of equidistant array arrangement on the surface of first described film layer
Structure.
In a kind of possible implementation, in the manufacture method of the above-mentioned polysilicon of embodiment of the present invention offer,
The surface of described film layer is formed to set multiple groove structures of spacing equidistant array arrangement, specifically includes:
To set spacing, form multiple grooves knot that the degree of depth is 0.1 μm and a diameter of 1-2 μm on the surface of described film layer
Structure.
In a kind of possible implementation, in the manufacture method of the above-mentioned polysilicon of embodiment of the present invention offer,
Before described amorphous silicon layer is carried out laser annealing process, also include:
Described amorphous silicon layer is set temperature and sets the heat treated of duration.
In a kind of possible implementation, in the manufacture method of the above-mentioned polysilicon of embodiment of the present invention offer, right
Described amorphous silicon layer is set temperature and sets the heat treated of duration, specifically includes:
At a temperature of keeping 400 DEG C, described amorphous silicon layer is carried out the heat treated of 0.5-3 hour.
In a kind of possible implementation, in the manufacture method of the above-mentioned polysilicon of embodiment of the present invention offer, right
Described amorphous silicon layer carries out laser annealing process, specifically includes:
Use excimer laser or solid-state laser, described amorphous silicon layer is made annealing treatment.
In a kind of possible implementation, in the manufacture method of the above-mentioned polysilicon of embodiment of the present invention offer, right
Described amorphous silicon layer carries out laser annealing process, specifically includes:
Employing laser pulse frequency is 300Hz, and Duplication is 95%, and laser scan rate is 6mm/s, laser energy density
For 300-500mJ/cm2Laser, described amorphous silicon layer is made annealing treatment.
The embodiment of the present invention additionally provides a kind of polysilicon membrane, and described polysilicon membrane uses above-mentioned manufacture method system
?.
The present invention has the beneficial effect that:
The manufacture method of a kind of polysilicon that the embodiment of the present invention provides and polysilicon membrane, including: on underlay substrate
Form the film layer for planting crystal seed；Formed on the surface of film layer to set multiple grooves knot of spacing equidistant array arrangement
Structure；Film layer is formed comprise be planted in each groove structure in constitute the amorphous silicon layer of crystal seed；Amorphous silicon layer is carried out laser move back
Fire processes, and makes non-crystalline silicon start growth crystallization from the position of each crystal seed, and formation has the tetragonal system of spacing crystallite dimension
Polysilicon layer.Owing to each groove structure is square array arrangement on the surface of film layer, therefore, it is planted in each groove structure
Crystal seed may be constructed square arrangement, and the amorphous silicon layer arranged on it can be made from each crystal seed when carrying out laser annealing and processing
Position starts growth crystallization, thus it is many compared with the tetragonal system big, crystallite dimension is single and crystalline phase is stable to obtain crystallite dimension
Crystal silicon.
Accompanying drawing explanation
Fig. 1 is the flow chart of polysilicon manufacture method in the embodiment of the present invention；
Fig. 2 is the structural representation of ground floor polysilicon in the embodiment of the present invention；
Fig. 3 is the structural representation of second layer polysilicon in the embodiment of the present invention；
Fig. 4 is ground floor crystal seed distribution schematic diagram in the embodiment of the present invention；
Fig. 5 is second layer crystal seed distribution schematic diagram in the embodiment of the present invention；
Fig. 6 be in the embodiment of the present invention orthographic projection on underlay substrate of the ground floor crystal seed and second layer crystal seed at substrate base
The superposition schematic diagram of the orthographic projection on plate.
Detailed description of the invention
Below in conjunction with the accompanying drawings, manufacture method and the concrete reality of polysilicon membrane to the polysilicon that the embodiment of the present invention provides
The mode of executing is described in detail.
The manufacture method of a kind of polysilicon that the embodiment of the present invention provides, as it is shown in figure 1, specifically include following steps:
S101, formed on underlay substrate for planting the film layer of crystal seed；
S102, the multiple groove structures arranged with the setting equidistant array of spacing in the formation of the surface of film layer；
S103, formed on film layer comprise be planted in each groove structure in constitute the amorphous silicon layer of crystal seed；
S104, amorphous silicon layer is carried out laser annealing process, make non-crystalline silicon start growth crystallization, shape from the position of each crystal seed
Become to have the polysilicon layer of the tetragonal system of spacing crystallite dimension.
The manufacture method of above-mentioned polysilicon that the embodiment of the present invention provides, owing to each groove structure is four on the surface of film layer
Square array is arranged, and therefore, the crystal seed being planted in each groove structure may be constructed square arrangement, can make setting on it
Amorphous silicon layer starts growth crystallization when carrying out laser annealing and processing from the position of each crystal seed, thus obtain crystallite dimension relatively big,
The polysilicon of the tetragonal system that crystallite dimension is single and crystalline phase is stable.
In the specific implementation, in the manufacture method of the above-mentioned polysilicon of embodiment of the present invention offer, step S101 is at lining
Formed on substrate for planting the film layer of crystal seed, be specifically as follows one below or combination:
The cushion formed on underlay substrate；
It is arranged at the polysilicon on cushion.
Specifically, the film layer being used for planting crystal seed can be one or more layers.As in figure 2 it is shown, when making one layer of polysilicon
Time, can be the cushion 2 formed on underlay substrate 1 for planting the film layer of crystal seed.When making, multilamellar such as two-layer is many
During crystal silicon, as it is shown on figure 3, can be the cushion 2, Yi Jishe formed on underlay substrate 1 for planting the film layer of crystal seed
It is placed in the ground floor polysilicon 5 on cushion 2.
In the specific implementation, in the manufacture method of the above-mentioned polysilicon of embodiment of the present invention offer, when plantation crystal seed
When film layer is at least two, can be formed on the surface of non-first film layer to set the multiple recessed of spacing equidistant array arrangement
Groove structure 4, specifically includes:
Each groove structure 4 that an above film surface is formed sets two times of spacing, in the surface formation etc. of this film layer
Multiple groove structures 4 of pitch arrays arrangement；And the surface of this film layer formed groove structure 4 on underlay substrate 1 just
The orthographic projection location overlap of the groove structure 4 that the surface of projection and a upper film layer is formed.
Specifically, to be formed as a example by the film layer planting crystal seed has two on underlay substrate 1, as it is shown on figure 3, two
Film layer is respectively cushion 2 and ground floor polysilicon 5, and cushion 2 is first film layer, and ground floor polysilicon 5 is second
Film layer.As shown in Figure 4, spacing can be set as d in the formation of cushion 2 surface1In array arrangement each groove structure 4, this
Time, ground floor crystal seed will be to set spacing d on the surface of cushion 21Equidistantly array arrangement, the ground floor grown is many
The crystallite dimension of crystal silicon layer is d1；As it is shown in figure 5, formed on ground floor polysilicon 5 surface to set spacing d1Two times for set
Spacing d2In array arrangement groove structure 4, and ground floor polysilicon 5 surface formed groove structure 4 at underlay substrate 1
On orthographic projection and the orthographic projection location overlap of groove structure 4 formed on cushion 2 surface, as shown in Figure 6, now, second
Layer crystal kind will be to set spacing d on the surface of ground floor polysilicon 52Equidistantly array arrangement, the second layer grown is many
The crystallite dimension of crystal silicon layer is d2.The polycrystalline of big crystallite dimension can be grown by the way of above-mentioned multilamellar crystal seed spacing is incremented by
Silicon, and can ensure that crystallite dimension is homogeneous.
In the specific implementation, in the manufacture method of the above-mentioned polysilicon of embodiment of the present invention offer, at first film layer
Surface formed with set spacing equidistant array arrangement multiple groove structures 4, specifically include:
With 3 μm for setting spacing, form multiple groove structures 4 of equidistant array arrangement on the surface of first film layer.
I.e. homogeneous in order to ensure the crystallite dimension of polysilicon layer that ground floor grows, it is typically chosen the crystallite dimension about 3 μm.Specifically
Ground, as shown in Figures 2 and 3, first film layer is cushion 2, and being formed on the surface of cushion 2 with 3 μm is to set between spacing etc.
Multiple groove structures 4 away from array arrangement.
In the specific implementation, in the manufacture method of the above-mentioned polysilicon of embodiment of the present invention offer, on the surface of film layer
Formed to set multiple groove structures 4 of spacing equidistant array arrangement, specifically include:
To set spacing, form multiple groove structures 4 that degree of depth a is 0.1 μm and diameter b is 1-2 μm on the surface of film layer.
Specifically, can use line stepper that film layer carries out the exposure technology of 1-2 μm with 3 μm for setting spacing, then use etching machine
Film layer after exposure-processed carries out dry etching, and carving hole depth is 0.1 μm, thus obtains with 3 μm equidistant array arrangements
The degree of depth is 0.1 μm and a diameter of multiple groove structure of 1-2 μm 4.
In the specific implementation, in the manufacture method of the above-mentioned polysilicon of embodiment of the present invention offer, such as Fig. 2 and Fig. 3 institute
Show, in order to make amorphous silicon layer 3 be in molten condition, be beneficial to follow-up amorphous silicon layer 3 is carried out laser annealing process time, non-crystalline silicon
Layer 3 can preferably carry out recrystallization and generate polysilicon.In execution step S104, amorphous silicon layer 3 is carried out laser annealing and process it
Before, it is also possible to including: amorphous silicon layer 3 is set temperature and sets the heat treated of duration.
Specifically, in the manufacture method of the above-mentioned polysilicon of embodiment of the present invention offer, at a temperature of keeping 400 DEG C,
Amorphous silicon layer 3 is carried out the heat treated of 0.5-3 hour.
In the specific implementation, in the manufacture method of the above-mentioned polysilicon of embodiment of the present invention offer, step S104 is to non-
Crystal silicon layer 3 carries out laser annealing process, specifically includes:
Use excimer laser or solid-state laser, amorphous silicon layer 3 is made annealing treatment.
Specifically, excimer laser can select the excimer lasers such as chlorination xenon, KrF, argon fluoride, and solid-state swashs
Light device can select the green solid-state lasers of 532nm wavelength, does not limits at this.
Specifically, in the manufacture method of the above-mentioned polysilicon of embodiment of the present invention offer, can be real in the following way
Existing step S104 carries out laser annealing process to amorphous silicon layer 3:
Employing laser pulse frequency is 300Hz, and Duplication is 95%, and laser scan rate is 6mm/s, laser energy density
For 300-500mJ/cm2Laser L, amorphous silicon layer 3 is made annealing treatment.
In the manufacture method of the above-mentioned polysilicon of embodiment of the present invention offer, can be according to the concrete required maximum formed
Crystallite dimension is designed for planting the film number of plies amount of crystal seed.Correspondingly need difference deposition of amorphous silicon layers 3 on each film layer,
Process amorphous silicon layer 3 through laser annealing, the polysilicon of the tetragonal system that crystallite dimension is bigger and crystalline phase is stable can be obtained.Under
Face illustrates as a example by the polysilicon making the tetragonal system that crystallite dimension is 6 μm, specifically comprises the following steps that
1, on underlay substrate 1, form cushion 2, afterwards, on the surface of cushion 2 to set spacing 3 μm, use line step
Enter machine and cushion 2 is carried out the exposure technology of 1-2 μm, then use etching machine that the cushion 2 after exposure-processed carries out dry method quarter
Erosion, carving hole depth is 0.1 μm, and forming the degree of depth with 3 μm equidistant array arrangements is 0.1 μm and a diameter of multiple groove of 1-2 μm
Structure 4.
Specifically, chemical gaseous phase depositing process can be strengthened with using plasma and form cushion 2, it is also possible to use and spatter
Penetrate, the method such as vacuum evaporation and low-pressure chemical vapor deposition, do not limit at this.Cushion 2 is in preventing underlay substrate 1
Impurity diffuses up in subsequent technique and affects the quality of the polysilicon formed afterwards.Cushion 2 can be monolayer titanium dioxide
Silicon thin film structure, it is also possible to for double-layer silicon nitride/silica thin film structure.With cushion 2 for dual layer nitride silicon/silicon dioxide
As a example by membrane structure, can be initially formed the silicon nitride layer that thickness is 50-300nm, then forming thickness on silicon nitride layer is
The silicon dioxide layer of 100-300nm.
2, the thickness constituting crystal seed within the formation of the surface of cushion 2 comprises and is planted in each groove structure 4 is 100-300nm
Amorphous silicon layer 3.
3, at a temperature of keeping 400 DEG C, amorphous silicon layer 3 is carried out the heat treated of 0.5-3 hour.
4, the laser pulse frequency using xenon chloride excimer laser to send is 300Hz, and Duplication is 95%, and laser is swept
Retouching speed is 6mm/s, and laser energy density is that the laser L of 300-500mJ/cm2 carries out laser annealing process to amorphous silicon layer 3.
Amorphous silicon layer 3 can start growth crystallization from the position of each crystal seed, thus obtains the first of the tetragonal system that crystallite dimension is 3 μm
Layer polysilicon 5.
5, on the surface of ground floor polysilicon 5 to set spacing 6 μm, use line stepper that ground floor polysilicon 5 is carried out
The exposure technology of 1-2 μm, then use etching machine that the ground floor polysilicon 5 after exposure-processed carries out dry etching, carve hole depth
Being 0.1 μm, forming the degree of depth with 6 μm equidistant array arrangements is 0.1 μm and multiple groove structures 4 of a diameter of 1-2 μm.
6, the thickness constituting crystal seed within the formation of the surface of ground floor polysilicon 5 comprises and is planted in each groove structure 4 is
The amorphous silicon layer 3 of 100-300nm.
7, at a temperature of keeping 400 DEG C, amorphous silicon layer 3 is carried out the heat treated of 0.5-3 hour.
8, the laser pulse frequency using xenon chloride excimer laser to send is 300Hz, and Duplication is 95%, and laser is swept
Retouching speed is 6mm/s, and laser energy density is 300-500mJ/cm2Laser L amorphous silicon layer 3 is carried out laser annealing process.
Ground floor polysilicon 5 is while the film layer as plantation crystal seed, and also as an inducing layer, induction amorphous silicon layer 3 is from each crystalline substance
The position planted starts quickly and more to grow crystallization with having orientation, it is thus achieved that crystallite dimension is the second of the tetragonal system of 6 μm
Layer polysilicon.
Specifically, underlay substrate 1 can be glass substrate, it is also possible to for silicon nitride/flexible polyimide/glass substrate,
Do not limit at this.
Based on same inventive concept, embodiments providing a kind of polysilicon membrane, this polysilicon membrane uses this
The above-mentioned manufacture method that inventive embodiments provides obtains.The enforcement of this polysilicon membrane may refer to the making side of above-mentioned polysilicon
The embodiment of method, repeats no more in place of repetition.This polysilicon membrane is applicable to polycrystalline silicon active matrix organic LED and shows
Show the polysilicon displays such as device and polycrystalline SiTFT liquid crystal display.
The manufacture method of the above-mentioned polysilicon that the embodiment of the present invention provides and polysilicon membrane, including: on underlay substrate
Form the film layer for planting crystal seed；Formed on the surface of film layer to set multiple grooves knot of spacing equidistant array arrangement
Structure；Film layer is formed comprise be planted in each groove structure in constitute the amorphous silicon layer of crystal seed；Amorphous silicon layer is carried out laser move back
Fire processes, and makes non-crystalline silicon start growth crystallization from the position of each crystal seed, and formation has the tetragonal system of spacing crystallite dimension
Polysilicon layer.Owing to each groove structure is square array arrangement on the surface of film layer, therefore, it is planted in each groove structure
Crystal seed may be constructed square arrangement, and the amorphous silicon layer arranged on it can be made from each crystal seed when carrying out laser annealing and processing
Position starts growth crystallization, thus it is many compared with the tetragonal system big, crystallite dimension is single and crystalline phase is stable to obtain crystallite dimension
Crystal silicon.
Obviously, those skilled in the art can carry out various change and the modification essence without deviating from the present invention to the present invention
God and scope.So, if these amendments of the present invention and modification belong to the scope of the claims in the present invention and equivalent technologies thereof
Within, then the present invention is also intended to comprise these change and modification.
Claims (10)
1. the manufacture method of a polysilicon, it is characterised in that including:
Underlay substrate is formed the film layer for planting crystal seed；
Formed on the surface of described film layer to set multiple groove structures of spacing equidistant array arrangement；
Described film layer is formed comprise be planted in each described groove structure in constitute the amorphous silicon layer of crystal seed；
Described amorphous silicon layer is carried out laser annealing process, makes non-crystalline silicon start growth crystallization, shape from the position of each described crystal seed
Become to have the polysilicon layer of the tetragonal system of described spacing crystallite dimension.
2. manufacture method as claimed in claim 1, it is characterised in that form the film layer for planting crystal seed on underlay substrate
For one below or combination:
The cushion formed on underlay substrate；
It is arranged at the polysilicon on described cushion.
3. manufacture method as claimed in claim 2, it is characterised in that when described film layer is at least two, at non-first
The surface of described film layer is formed to set multiple groove structures of spacing equidistant array arrangement, specifically includes:
Each groove structure that an above described film surface is formed sets two times of spacing, is formed on the surface of film layer this described
Equidistantly multiple groove structures of array arrangement；And the groove structure just throwing on underlay substrate formed on the surface of this film layer
The orthographic projection location overlap of the groove structure that the surface of shadow and a upper described film layer is formed.
4. manufacture method as claimed in claim 3, it is characterised in that between the surface of first described film layer is formed to set
The multiple groove structures arranged away from equidistant array, specifically include:
With 3 μm for setting spacing, form multiple groove structures of equidistant array arrangement on the surface of first described film layer.
5. the manufacture method as described in any one of claim 1-4, it is characterised in that formed on the surface of described film layer to set
Multiple groove structures of spacing equidistant array arrangement, specifically include:
To set spacing, forming the degree of depth on the surface of described film layer is 0.1 μm and multiple groove structures of a diameter of 1-2 μm.
6. the manufacture method as described in any one of claim 1-4, it is characterised in that move back described amorphous silicon layer is carried out laser
Before fire processes, also include:
Described amorphous silicon layer is set temperature and sets the heat treated of duration.
7. manufacture method as claimed in claim 6, it is characterised in that when described amorphous silicon layer being set temperature and sets
Long heat treated, specifically includes:
At a temperature of keeping 400 DEG C, described amorphous silicon layer is carried out the heat treated of 0.5-3 hour.
8. the manufacture method as described in any one of claim 1-4, it is characterised in that described amorphous silicon layer is carried out laser annealing
Process, specifically include:
Use excimer laser or solid-state laser, described amorphous silicon layer is made annealing treatment.
9. the manufacture method as described in any one of claim 1-4, it is characterised in that described amorphous silicon layer is carried out laser annealing
Process, specifically include:
Employing laser pulse frequency is 300Hz, and Duplication is 95%, and laser scan rate is 6mm/s, and laser energy density is
300-500mJ/cm2Laser, described amorphous silicon layer is made annealing treatment.
10. a polysilicon membrane, it is characterised in that described polysilicon membrane uses as described in any one of claim 1-9
Manufacture method prepares.
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