CN106229254B - A kind of production method and polysilicon membrane of polysilicon - Google Patents
A kind of production method and polysilicon membrane of polysilicon Download PDFInfo
- Publication number
- CN106229254B CN106229254B CN201610800014.0A CN201610800014A CN106229254B CN 106229254 B CN106229254 B CN 106229254B CN 201610800014 A CN201610800014 A CN 201610800014A CN 106229254 B CN106229254 B CN 106229254B
- Authority
- CN
- China
- Prior art keywords
- layer
- polysilicon
- amorphous silicon
- film layer
- spacing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 229910021420 polycrystalline silicon Inorganic materials 0.000 title claims abstract description 95
- 229920005591 polysilicon Polymers 0.000 title claims abstract description 93
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 47
- 239000012528 membrane Substances 0.000 title claims abstract description 19
- 239000013078 crystal Substances 0.000 claims abstract description 63
- 229910021417 amorphous silicon Inorganic materials 0.000 claims abstract description 57
- 239000000758 substrate Substances 0.000 claims abstract description 26
- 238000005224 laser annealing Methods 0.000 claims abstract description 22
- RKTYLMNFRDHKIL-UHFFFAOYSA-N copper;5,10,15,20-tetraphenylporphyrin-22,24-diide Chemical compound [Cu+2].C1=CC(C(=C2C=CC([N-]2)=C(C=2C=CC=CC=2)C=2C=CC(N=2)=C(C=2C=CC=CC=2)C2=CC=C3[N-]2)C=2C=CC=CC=2)=NC1=C3C1=CC=CC=C1 RKTYLMNFRDHKIL-UHFFFAOYSA-N 0.000 claims abstract description 17
- 238000002425 crystallisation Methods 0.000 claims abstract description 13
- 230000008025 crystallization Effects 0.000 claims abstract description 13
- 238000010438 heat treatment Methods 0.000 claims description 10
- 238000000034 method Methods 0.000 claims description 9
- 238000000137 annealing Methods 0.000 claims description 6
- 239000010410 layer Substances 0.000 description 149
- 239000010408 film Substances 0.000 description 50
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 8
- 239000010703 silicon Substances 0.000 description 8
- 238000005516 engineering process Methods 0.000 description 7
- 229910052710 silicon Inorganic materials 0.000 description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 7
- 239000012071 phase Substances 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 238000009826 distribution Methods 0.000 description 5
- 229910052581 Si3N4 Inorganic materials 0.000 description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 4
- 238000005530 etching Methods 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 239000000377 silicon dioxide Substances 0.000 description 3
- 239000010409 thin film Substances 0.000 description 3
- 238000003491 array Methods 0.000 description 2
- XJHCXCQVJFPJIK-UHFFFAOYSA-M caesium fluoride Chemical compound [F-].[Cs+] XJHCXCQVJFPJIK-UHFFFAOYSA-M 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- HGCGQDMQKGRJNO-UHFFFAOYSA-N xenon monochloride Chemical compound [Xe]Cl HGCGQDMQKGRJNO-UHFFFAOYSA-N 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 1
- ISQINHMJILFLAQ-UHFFFAOYSA-N argon hydrofluoride Chemical compound F.[Ar] ISQINHMJILFLAQ-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000005660 chlorination reaction Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 239000002355 dual-layer Substances 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- VDGJOQCBCPGFFD-UHFFFAOYSA-N oxygen(2-) silicon(4+) titanium(4+) Chemical compound [Si+4].[O-2].[O-2].[Ti+4] VDGJOQCBCPGFFD-UHFFFAOYSA-N 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 238000001953 recrystallisation Methods 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 239000007790 solid phase Substances 0.000 description 1
- 238000007738 vacuum evaporation Methods 0.000 description 1
- 229910052724 xenon Inorganic materials 0.000 description 1
- FHNFHKCVQCLJFQ-UHFFFAOYSA-N xenon atom Chemical compound [Xe] FHNFHKCVQCLJFQ-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02587—Structure
- H01L21/0259—Microstructure
- H01L21/02595—Microstructure polycrystalline
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
Abstract
The embodiment of the invention discloses a kind of production method of polysilicon and polysilicon membranes, comprising: the film layer for planting crystal seed is formed on underlay substrate;It is formed on the surface of film layer to set multiple groove structures of the equidistant array arrangement of spacing;The amorphous silicon layer for constituting crystal seed in each groove structure comprising being planted in is formed in film layer;Laser annealing processing is carried out to amorphous silicon layer, amorphous silicon is made to grow crystallization since the position of each crystal seed, forms the polysilicon layer with the tetragonal system of spacing crystallite dimension.Since each groove structure is in square array arrangement on the surface of film layer, therefore, the crystal seed being planted in each groove structure may be constructed square arrangement, the amorphous silicon layer being arranged thereon can be made to grow crystallization since the position of each crystal seed when carrying out laser annealing processing, to obtain the polysilicon for the tetragonal system that crystallite dimension is larger, crystallite dimension is single and crystal phase is stable.
Description
Technical field
The present invention relates to polysilicon manufacturing technology field, the production method and polysilicon membrane of espespecially a kind of polysilicon.
Background technique
In display panel manufacturing, polycrystalline silicon technology gradually becomes display panel due to possessing preferable mobility
The direction of technological innovation, this to have many advantages, such as frivolous, low power consuming, high brightness, high-resolution polysilicon displays by
It attractes attention.
In the prior art, the production method of polysilicon membrane includes quasi-molecule laser annealing, solid phase crystallization, metal inducement
A variety of production methods such as crystallization.And excimer laser annealing process is used, it is the unique amount of having been carried out to obtain polysilicon membrane
The method of production.
The control of grain size and crystal grain single size is always the hot spot of polysilicon field of display technology research.Cause
The polysilicon grain quantity and distribution situation covered by the channel region of thin film transistor (TFT) in polysilicon displays backboard, will be direct
Influence mobility size, the electric properties such as uniformity of mobility and threshold voltage.The polysilicon made using the prior art
Crystallite dimension is less than normal, and grain size distribution is uneven, and the crystal grain of the stable tetragonal system of crystal phase is difficult to ensure.It will be this
When the lesser polysilicon of size is applied in the backboard of polysilicon displays, it may appear that carrier mobility is low, mobility and threshold
The problems such as threshold voltage is uneven.Therefore, the tetragonal that crystallite dimension is larger, crystallite dimension is single and crystal phase is stable how is made
The polysilicon of system is problem urgently to be resolved.
Summary of the invention
In view of this, the embodiment of the present invention provides the production method and polysilicon membrane of a kind of polysilicon, it is existing to solve
The polysilicon grain size for having production method to produce is smaller, and grain size distribution is uneven, and is difficult to ensure as tetragonal crystal
The problem of being.
Therefore, the embodiment of the present invention provides a kind of production method of polysilicon, comprising:
The film layer for planting crystal seed is formed on underlay substrate;
It is formed on the surface of the film layer to set multiple groove structures of the equidistant array arrangement of spacing;
The amorphous silicon layer for constituting crystal seed in each groove structure comprising being planted in is formed in the film layer;
Laser annealing processing is carried out to the amorphous silicon layer, makes amorphous silicon grown junction since the position of each crystal seed
Crystalline substance forms the polysilicon layer with the tetragonal system of the spacing crystallite dimension.
In one possible implementation, in the production method of above-mentioned polysilicon provided in an embodiment of the present invention, In
It is formed on underlay substrate and is one of the following or combines for planting the film layer of crystal seed:
The buffer layer formed on underlay substrate;
The polysilicon being set on the buffer layer.
In one possible implementation, in the production method of above-mentioned polysilicon provided in an embodiment of the present invention, when
When the film layer is at least two, formed on the surface of non-first film layer to set the more of the equidistant array arrangement of spacing
A groove structure, specifically includes:
Two times of each groove structure setting spacing that the above film surface is formed, on the surface of the film layer
Form multiple groove structures of equidistant array arrangement;And in the groove structure of the surface of film layer formation on underlay substrate
Orthographic projection is Chong Die with the orthographic projection position of groove structure that the surface of a upper film layer is formed.
In one possible implementation, in the production method of above-mentioned polysilicon provided in an embodiment of the present invention, In
The surface of first film layer is formed to set multiple groove structures of the equidistant array arrangement of spacing, is specifically included:
It is setting spacing with 3 μm, forms multiple groove knots of equidistant array arrangement on the surface of first film layer
Structure.
In one possible implementation, in the production method of above-mentioned polysilicon provided in an embodiment of the present invention, In
The surface of the film layer is formed to set multiple groove structures of the equidistant array arrangement of spacing, is specifically included:
To set spacing, multiple groove knots that depth is 0.1 μm and diameter is 1-2 μm are formed on the surface of the film layer
Structure.
In one possible implementation, in the production method of above-mentioned polysilicon provided in an embodiment of the present invention, In
Before amorphous silicon layer progress laser annealing processing, further includes:
Set temperature is carried out to the amorphous silicon layer and sets the heat treatment of duration.
In one possible implementation, right in the production method of above-mentioned polysilicon provided in an embodiment of the present invention
The amorphous silicon layer carries out set temperature and sets the heat treatment of duration, specifically includes:
At a temperature of being kept for 400 DEG C, heat treatment in 0.5-3 hours is carried out to the amorphous silicon layer.
In one possible implementation, right in the production method of above-mentioned polysilicon provided in an embodiment of the present invention
The amorphous silicon layer carries out laser annealing processing, specifically includes:
Using excimer laser or solid-state laser, the amorphous silicon layer is made annealing treatment.
In one possible implementation, right in the production method of above-mentioned polysilicon provided in an embodiment of the present invention
The amorphous silicon layer carries out laser annealing processing, specifically includes:
Use laser pulse frequency for 300Hz, Duplication 95%, laser scan rate 6mm/s, laser energy density
For 300-500mJ/cm2Laser, the amorphous silicon layer is made annealing treatment.
The embodiment of the invention also provides a kind of polysilicon membrane, the polysilicon membrane uses above-mentioned production method system
.
The present invention has the beneficial effect that:
The production method and polysilicon membrane of a kind of polysilicon provided in an embodiment of the present invention, comprising: on underlay substrate
Form the film layer for planting crystal seed;It is formed on the surface of film layer to set multiple groove knots of the equidistant array arrangement of spacing
Structure;The amorphous silicon layer for constituting crystal seed in each groove structure comprising being planted in is formed in film layer;Laser is carried out to amorphous silicon layer to move back
Fire processing, makes amorphous silicon grow crystallization since the position of each crystal seed, forms the tetragonal system with spacing crystallite dimension
Polysilicon layer.Since each groove structure is in square array arrangement on the surface of film layer, it is planted in each groove structure
Crystal seed may be constructed square arrangement, can make the amorphous silicon layer being arranged thereon when carrying out laser annealing processing from each crystal seed
Position starts growth crystallization, to obtain the more of the tetragonal system that crystallite dimension is larger, crystallite dimension is single and crystal phase is stable
Crystal silicon.
Detailed description of the invention
Fig. 1 is the flow chart of polysilicon production method in the embodiment of the present invention;
Fig. 2 is the structural schematic diagram of first layer polysilicon in the embodiment of the present invention;
Fig. 3 is the structural schematic diagram of second layer polysilicon in the embodiment of the present invention;
Fig. 4 is first layer crystal seed distribution schematic diagram in the embodiment of the present invention;
Fig. 5 is second layer crystal seed distribution schematic diagram in the embodiment of the present invention;
Fig. 6 is orthographic projection and second layer crystal seed of the first layer crystal seed on underlay substrate in the embodiment of the present invention in substrate base
The superposition schematic diagram of orthographic projection on plate.
Specific embodiment
With reference to the accompanying drawing, the production method to polysilicon provided in an embodiment of the present invention and the specific reality of polysilicon membrane
The mode of applying is described in detail.
A kind of production method of polysilicon provided in an embodiment of the present invention, as shown in Figure 1, specifically includes the following steps:
S101, film layer for planting crystal seed is formed on underlay substrate;
S102, it is formed on the surface of film layer to set multiple groove structures of the equidistant array arrangement of spacing;
S103, the amorphous silicon layer for constituting crystal seed in each groove structure comprising being planted in is formed in film layer;
S104, laser annealing processing is carried out to amorphous silicon layer, amorphous silicon is made to grow crystallization, shape since the position of each crystal seed
At the polysilicon layer of the tetragonal system with spacing crystallite dimension.
The production method of above-mentioned polysilicon provided in an embodiment of the present invention, since each groove structure is in four on the surface of film layer
Square array arrangement, therefore, the crystal seed being planted in each groove structure may be constructed square arrangement, can make to be arranged thereon
Amorphous silicon layer when carrying out laser annealing processing since the position of each crystal seed grow crystallization, thus obtain crystallite dimension it is larger,
The polysilicon for the tetragonal system that crystallite dimension is single and crystal phase is stable.
In the specific implementation, in the production method of above-mentioned polysilicon provided in an embodiment of the present invention, step S101 is being served as a contrast
The film layer for planting crystal seed is formed on substrate, is specifically as follows following one or combination:
The buffer layer formed on underlay substrate;
The polysilicon being set on buffer layer.
Specifically, the film layer for planting crystal seed can be one or more layers.As shown in Fig. 2, when one layer of polysilicon of production
When, the film layer for planting crystal seed can be the buffer layer 2 formed on underlay substrate 1.When production multilayer is for example more than two layers
When crystal silicon, as shown in figure 3, the film layer for planting crystal seed can be the buffer layer 2, Yi Jishe formed on underlay substrate 1
The first layer polysilicon 5 being placed on buffer layer 2.
In the specific implementation, in the production method of above-mentioned polysilicon provided in an embodiment of the present invention, when plantation crystal seed
When film layer is at least two, it can be formed on the surface of non-first film layer to set the multiple recessed of the equidistant array arrangement of spacing
Slot structure 4, specifically includes:
Each groove structure 4 that the above film surface is formed sets two times of spacing, is formed on the surface of the film layer
Multiple groove structures 4 of pitch arrays arrangement;And the surface of the film layer formed groove structure 4 on underlay substrate 1 just
It projects Chong Die with the orthographic projection position of groove structure 4 that the surface of a upper film layer is formed.
Specifically, to form the film layer for planting crystal seed on underlay substrate 1 there are two for, as shown in figure 3, two
Film layer is respectively buffer layer 2 and first layer polysilicon 5, and buffer layer 2 is first film layer, and first layer polysilicon 5 is second
Film layer.Spacing is set as d as shown in figure 4, can be formed on 2 surface of buffer layer1In array arrangement each groove structure 4, this
When, first layer crystal seed will be to set spacing d on the surface of buffer layer 21Equidistant array arrangement, the first layer grown are more
The crystallite dimension of crystal silicon layer is d1;As shown in figure 5, being formed on 5 surface of first layer polysilicon to set spacing d1Two times for setting
Spacing d2In array arrangement groove structure 4, and 5 surface of first layer polysilicon formed groove structure 4 in underlay substrate 1
On orthographic projection it is Chong Die with the orthographic projection position of groove structure 4 formed on 2 surface of buffer layer, as shown in fig. 6, at this point, second
Layer crystal kind will be to set spacing d on the surface of first layer polysilicon 52Equidistant array arrangement, the second layer grown are more
The crystallite dimension of crystal silicon layer is d2.The polycrystalline of big crystal grain size can be grown in such a way that above-mentioned multilayer crystal seed spacing is incremented by
Silicon, and can guarantee that crystallite dimension is uniform.
In the specific implementation, in the production method of above-mentioned polysilicon provided in an embodiment of the present invention, in first film layer
Surface formed to set multiple groove structures 4 of spacing equidistant array arrangement, specifically include:
It is setting spacing with 3 μm, forms multiple groove structures 4 of equidistant array arrangement on the surface of first film layer.
Crystallite dimension in order to guarantee polysilicon layer that first layer is grown is uniform, is typically chosen 3 μm or so of crystallite dimension.Specifically
Ground, as shown in Figures 2 and 3, first film layer are buffer layer 2, are formed on the surface of buffer layer 2 with 3 μm between setting spacing etc.
Multiple groove structures 4 away from array arrangement.
In the specific implementation, in the production method of above-mentioned polysilicon provided in an embodiment of the present invention, on the surface of film layer
It is formed to set multiple groove structures 4 of the equidistant array arrangement of spacing, is specifically included:
To set spacing, multiple groove structures 4 that depth a is 0.1 μm and diameter b is 1-2 μm are formed on the surface of film layer.
Specifically, it can be setting spacing with 3 μm, carry out 1-2 μm of exposure technology to film layer using line stepper, then use etching machine
Dry etching is carried out to the film layer after exposure-processed, carving hole depth is 0.1 μm, thus obtain arranging with 3 μm of equidistant arrays
Depth is 0.1 μm and diameter is 1-2 μm of multiple groove structure 4.
In the specific implementation, in the production method of above-mentioned polysilicon provided in an embodiment of the present invention, such as Fig. 2 and Fig. 3 institute
Show, in order to keep amorphous silicon layer 3 in a molten state, when in favor of the subsequent progress laser annealing processing to amorphous silicon layer 3, amorphous silicon
Layer 3 can preferably carry out recrystallization and generate polysilicon.It is handled to the progress laser annealing of amorphous silicon layer 3 executing step S104
Before, it can also include: that set temperature is carried out to amorphous silicon layer 3 and sets the heat treatment of duration.
Specifically, in the production method of above-mentioned polysilicon provided in an embodiment of the present invention, at a temperature of being kept for 400 DEG C,
Heat treatment in 0.5-3 hours is carried out to amorphous silicon layer 3.
In the specific implementation, in the production method of above-mentioned polysilicon provided in an embodiment of the present invention, step S104 is to non-
Crystal silicon layer 3 carries out laser annealing processing, specifically includes:
Using excimer laser or solid-state laser, amorphous silicon layer 3 is made annealing treatment.
Specifically, excimer laser can select the excimer lasers such as chlorination xenon, cesium fluoride, argon fluoride, and solid-state swashs
Light device can select the green solid-state lasers of 532nm wavelength, it is not limited here.
It specifically, can be real in the following way in the production method of above-mentioned polysilicon provided in an embodiment of the present invention
Existing step S104 carries out laser annealing processing to amorphous silicon layer 3:
Use laser pulse frequency for 300Hz, Duplication 95%, laser scan rate 6mm/s, laser energy density
For 300-500mJ/cm2Laser L, amorphous silicon layer 3 is made annealing treatment.
It, can be according to the specific required maximum formed in the production method of above-mentioned polysilicon provided in an embodiment of the present invention
Crystallite dimension come be designed for plantation crystal seed film layer quantity.It correspondingly needs to distinguish deposition of amorphous silicon layers 3 in each film layer,
Amorphous silicon layer 3 is handled through laser annealing, can get the polysilicon of the bigger and stable crystal phase tetragonal system of crystallite dimension.Under
It is illustrated for the polysilicon for the tetragonal system that face is 6 μm to make crystallite dimension, the specific steps are as follows:
1, buffer layer 2 is formed on underlay substrate 1 on the surface of buffer layer 2 to set 3 μm of spacing, to walk using line later
1-2 μm of exposure technology is carried out to buffer layer 2 into machine, then dry method quarter is carried out to the buffer layer 2 after exposure-processed using etching machine
Erosion, carving hole depth is 0.1 μm, and being formed is 0.1 μm with the depth of 3 μm of equidistant array arrangements and diameter is 1-2 μm of multiple groove
Structure 4.
Specifically, chemical vapor deposition method can be enhanced with using plasma and forms buffer layer 2, can also used and splash
It penetrates, the methods of vacuum evaporation and low-pressure chemical vapor deposition, it is not limited here.Buffer layer 2 is for preventing in underlay substrate 1
Impurity diffuses up in the subsequent process and influences the quality of the polysilicon formed later.Buffer layer 2 can be single layer titanium dioxide
Silicon thin film structure can also be double-layer silicon nitride/silica thin film structure.With buffer layer 2 for dual layer nitride silicon/silicon dioxide
For membrane structure, the silicon nitride layer with a thickness of 50-300nm can be initially formed, then on silicon nitride layer formed with a thickness of
The silicon dioxide layer of 100-300nm.
2, buffer layer 2 surface formed comprising be planted in each groove structure 4 constitute crystal seed with a thickness of 100-300nm
Amorphous silicon layer 3.
3, at a temperature of being kept for 400 DEG C, heat treatment in 0.5-3 hours is carried out to amorphous silicon layer 3.
4, the laser pulse frequency for using xenon chloride excimer laser to issue is 300Hz, and Duplication 95%, laser is swept
Retouching rate is 6mm/s, and the laser L that laser energy density is 300-500mJ/cm2 carries out laser annealing processing to amorphous silicon layer 3.
Amorphous silicon layer 3 can grow crystallization since the position of each crystal seed, to obtain the first of the tetragonal system that crystallite dimension is 3 μm
Layer polysilicon 5.
5, on the surface of first layer polysilicon 5 to set 6 μm of spacing, first layer polysilicon 5 is carried out using line stepper
1-2 μm of exposure technology, then dry etching is carried out to the first layer polysilicon 5 after exposure-processed using etching machine, carve hole depth
It is 0.1 μm, multiple groove structures 4 that being formed is 0.1 μm with the depth of 6 μm of equidistant array arrangements and diameter is 1-2 μm.
6, first layer polysilicon 5 surface formed comprising be planted in each groove structure 4 constitute crystal seed with a thickness of
The amorphous silicon layer 3 of 100-300nm.
7, at a temperature of being kept for 400 DEG C, heat treatment in 0.5-3 hours is carried out to amorphous silicon layer 3.
8, the laser pulse frequency for using xenon chloride excimer laser to issue is 300Hz, and Duplication 95%, laser is swept
Retouching rate is 6mm/s, laser energy density 300-500mJ/cm2Laser L to amorphous silicon layer 3 carry out laser annealing processing.
First layer polysilicon 5, also as an inducing layer, induces amorphous silicon layer 3 from each crystalline substance while as the film layer of plantation crystal seed
The position of kind starts to grow crystallization with quickly and more having orientation, obtains the second of the tetragonal system that crystallite dimension is 6 μm
Layer polysilicon.
Specifically, underlay substrate 1 can be glass substrate, can also be silicon nitride/flexible polyimide/glass substrate,
It is not limited here.
Based on the same inventive concept, the embodiment of the invention provides a kind of polysilicon membranes, and the polysilicon membrane is using this
The above-mentioned production method that inventive embodiments provide obtains.The implementation of the polysilicon membrane may refer to the production side of above-mentioned polysilicon
The embodiment of method, overlaps will not be repeated.The polysilicon membrane is aobvious suitable for polycrystalline silicon active matrix organic LED
Show the polysilicon displays such as device and polycrystalline SiTFT liquid crystal display.
The production method and polysilicon membrane of above-mentioned polysilicon provided in an embodiment of the present invention, comprising: on underlay substrate
Form the film layer for planting crystal seed;It is formed on the surface of film layer to set multiple groove knots of the equidistant array arrangement of spacing
Structure;The amorphous silicon layer for constituting crystal seed in each groove structure comprising being planted in is formed in film layer;Laser is carried out to amorphous silicon layer to move back
Fire processing, makes amorphous silicon grow crystallization since the position of each crystal seed, forms the tetragonal system with spacing crystallite dimension
Polysilicon layer.Since each groove structure is in square array arrangement on the surface of film layer, it is planted in each groove structure
Crystal seed may be constructed square arrangement, can make the amorphous silicon layer being arranged thereon when carrying out laser annealing processing from each crystal seed
Position starts growth crystallization, to obtain the more of the tetragonal system that crystallite dimension is larger, crystallite dimension is single and crystal phase is stable
Crystal silicon.
Obviously, various changes and modifications can be made to the invention without departing from essence of the invention by those skilled in the art
Mind and range.In this way, if these modifications and changes of the present invention belongs to the range of the claims in the present invention and its equivalent technologies
Within, then the present invention is also intended to include these modifications and variations.
Claims (8)
1. a kind of production method of polysilicon characterized by comprising
The film layer for planting crystal seed is formed on underlay substrate;
It is formed on the surface of the film layer to set multiple groove structures of the equidistant array arrangement of spacing;
The amorphous silicon layer for constituting crystal seed in each groove structure comprising being planted in is formed in the film layer;
Laser annealing processing is carried out to the amorphous silicon layer, amorphous silicon is made to grow crystallization, shape since the position of each crystal seed
At the polysilicon layer of the tetragonal system with the spacing crystallite dimension;
The film layer for planting crystal seed is formed on underlay substrate includes:
The buffer layer formed on underlay substrate;
At least one layer of polysilicon being set on the buffer layer;
When the film layer includes the buffer layer and at least one layer of polysilicon being set on the buffer layer, from lower
On the surface of non-first film layer formed to set multiple groove structures of spacing equidistant array arrangement, it is specific to wrap
It includes:
Each groove structure setting formed with upper one of the non-first film layer from bottom to top film surface
Two times of spacing form multiple groove structures of equidistant array arrangement on the surface of the film layer;And in the table of the film layer
The groove structure that the surface of orthographic projection and the upper film layer of the groove structure that face is formed on underlay substrate is formed is just
Projected position overlapping.
2. production method as described in claim 1, which is characterized in that in the surface shape of first film layer from bottom to top
At multiple groove structures to set the equidistant array arrangement of spacing, specifically include:
It is setting spacing with 3 μm, the surface of first film layer from bottom to top forms the multiple of equidistant array arrangement
Groove structure.
3. such as the described in any item production methods of claim 1-2, which is characterized in that formed on the surface of the film layer to set
Multiple groove structures of the equidistant array arrangement of spacing, specifically include:
To set spacing, multiple groove structures that depth is 0.1 μm and diameter is 1-2 μm are formed on the surface of the film layer.
4. such as the described in any item production methods of claim 1-2, which is characterized in that moved back carrying out laser to the amorphous silicon layer
Before fire processing, further includes:
Set temperature is carried out to the amorphous silicon layer and sets the heat treatment of duration.
5. production method as claimed in claim 4, which is characterized in that when carrying out set temperature and setting to the amorphous silicon layer
Long heat treatment, specifically includes:
At a temperature of being kept for 400 DEG C, heat treatment in 0.5-3 hours is carried out to the amorphous silicon layer.
6. such as the described in any item production methods of claim 1-2, which is characterized in that carry out laser annealing to the amorphous silicon layer
Processing, specifically includes:
Using excimer laser or solid-state laser, the amorphous silicon layer is made annealing treatment.
7. such as the described in any item production methods of claim 1-2, which is characterized in that carry out laser annealing to the amorphous silicon layer
Processing, specifically includes:
Use laser pulse frequency for 300Hz, Duplication 95%, laser scan rate 6mm/s, laser energy density is
300-500mJ/cm2Laser, the amorphous silicon layer is made annealing treatment.
8. a kind of polysilicon membrane, which is characterized in that the polysilicon membrane uses such as the described in any item systems of claim 1-7
Make method to be made.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201610800014.0A CN106229254B (en) | 2016-08-31 | 2016-08-31 | A kind of production method and polysilicon membrane of polysilicon |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201610800014.0A CN106229254B (en) | 2016-08-31 | 2016-08-31 | A kind of production method and polysilicon membrane of polysilicon |
Publications (2)
Publication Number | Publication Date |
---|---|
CN106229254A CN106229254A (en) | 2016-12-14 |
CN106229254B true CN106229254B (en) | 2019-11-26 |
Family
ID=58075093
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201610800014.0A Active CN106229254B (en) | 2016-08-31 | 2016-08-31 | A kind of production method and polysilicon membrane of polysilicon |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN106229254B (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107104112A (en) * | 2017-06-20 | 2017-08-29 | 京东方科技集团股份有限公司 | A kind of array base palte and preparation method thereof, display panel, display device |
CN109817644A (en) * | 2019-01-30 | 2019-05-28 | 武汉华星光电半导体显示技术有限公司 | A kind of tft array substrate and preparation method thereof |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1501449A (en) * | 2002-11-12 | 2004-06-02 | 友达光电股份有限公司 | Method for making polysilicon layer |
CN102891107A (en) * | 2012-10-19 | 2013-01-23 | 京东方科技集团股份有限公司 | Low temperature polysilicon base plate and manufacturing method thereof |
CN104867812A (en) * | 2015-03-27 | 2015-08-26 | 京东方科技集团股份有限公司 | Preparation methods of polysilicon film and semiconductor device, and display substrate and apparatus |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2861345B2 (en) * | 1990-09-25 | 1999-02-24 | 富士ゼロックス株式会社 | Method for manufacturing semiconductor film |
JP5084185B2 (en) * | 2006-06-23 | 2012-11-28 | 住友重機械工業株式会社 | Manufacturing method of semiconductor thin film |
-
2016
- 2016-08-31 CN CN201610800014.0A patent/CN106229254B/en active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1501449A (en) * | 2002-11-12 | 2004-06-02 | 友达光电股份有限公司 | Method for making polysilicon layer |
CN102891107A (en) * | 2012-10-19 | 2013-01-23 | 京东方科技集团股份有限公司 | Low temperature polysilicon base plate and manufacturing method thereof |
CN104867812A (en) * | 2015-03-27 | 2015-08-26 | 京东方科技集团股份有限公司 | Preparation methods of polysilicon film and semiconductor device, and display substrate and apparatus |
Also Published As
Publication number | Publication date |
---|---|
CN106229254A (en) | 2016-12-14 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US8940625B2 (en) | Low temperature polysilicon thin film and manufacturing method thereof | |
US8802580B2 (en) | Systems and methods for the crystallization of thin films | |
CN102969250B (en) | The preparation method of LTPS film and thin-film transistor, array base palte and display unit | |
CN103681776B (en) | Low-temperature polysilicon film and preparation method thereof, thin film transistor (TFT) and display device | |
KR101880835B1 (en) | Low temperature polysilicon thin film and preparation method thereof, and transistor | |
CN102891107B (en) | Low temperature polysilicon base plate and manufacturing method thereof | |
JP2004311935A (en) | Method for making single crystal silicon film | |
US9773813B2 (en) | Thin film transistor and a manufacturing method thereof, array substrate and a manufacturing method thereof, display device | |
MX2012005204A (en) | Systems and methods for non-periodic pulse partial melt film processing. | |
JP2003092262A (en) | Mask for polycrystallization and method of manufacturing polycrystal thin-film transistor using the same | |
CN103219230A (en) | Manufacturing method of low temperature polysilicon, low temperature polysilicon thin film and thin film transistor | |
CN105097453B (en) | Low-temperature polysilicon film, thin film transistor (TFT) and respective preparation method, display device | |
CN106229254B (en) | A kind of production method and polysilicon membrane of polysilicon | |
CN103915318A (en) | Laser annealing device, polycrystalline silicon thin film and manufacturing method thereof | |
CN101111925A (en) | System and method for generating polysilicon film controlled on crystallization direction | |
US10049873B2 (en) | Preparation methods of low temperature poly-silicon thin film and transistor and laser crystallization apparatus | |
US8916797B2 (en) | Crystallization apparatus using sequential lateral solidification | |
WO2016155149A1 (en) | Preparation method for polycrystalline silicon thin film, semiconductor device, display substrate and display device | |
CN1322563C (en) | Laser annealing device for preparing polycrystal system membrance layer and method for forming polycrystal system membrance layer | |
KR20030056248A (en) | Method of crystallization for Thin Silicone layer using by Laser | |
KR100807559B1 (en) | Thin film transistor and fabrication method of the same | |
CN104022042B (en) | Manufacturing method for low-temperature polycrystalline silicon thin film transistor and array substrate | |
EP1509948B1 (en) | Manufacture of active matrix display devices | |
CN108461390B (en) | Low-temperature polycrystalline silicon thin film, manufacturing method thereof, thin film transistor and display device | |
CN104078365A (en) | Manufacturing method for low-temperature polycrystalline silicon thin film, TFT, array substrate and display device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |