CN108461390B - Low-temperature polycrystalline silicon thin film, manufacturing method thereof, thin film transistor and display device - Google Patents

Low-temperature polycrystalline silicon thin film, manufacturing method thereof, thin film transistor and display device Download PDF

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CN108461390B
CN108461390B CN201810295950.XA CN201810295950A CN108461390B CN 108461390 B CN108461390 B CN 108461390B CN 201810295950 A CN201810295950 A CN 201810295950A CN 108461390 B CN108461390 B CN 108461390B
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thin film
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amorphous silicon
polycrystalline silicon
silicon layer
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CN108461390A (en
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田雪雁
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BOE Technology Group Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02587—Structure
    • H01L21/0259—Microstructure
    • H01L21/02595—Microstructure polycrystalline
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78651—Silicon transistors
    • H01L29/7866—Non-monocrystalline silicon transistors
    • H01L29/78672—Polycrystalline or microcrystalline silicon transistor

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  • Thin Film Transistor (AREA)

Abstract

The invention provides a low-temperature polycrystalline silicon thin film and a manufacturing method thereof, a thin film transistor and a display device, relates to the technical field of display, and can solve the problem that a polycrystalline silicon thin film with both grain size and uniformity cannot be obtained in the prior art. The manufacturing method of the low-temperature polycrystalline silicon film comprises the following steps: forming a first amorphous silicon layer on a substrate; carrying out first laser annealing treatment on the first amorphous silicon layer by adopting a first laser beam to obtain a polycrystalline silicon growth bottom layer; forming a second amorphous silicon layer on the substrate on which the polycrystalline silicon growth bottom layer is formed; performing second laser annealing treatment on the second amorphous silicon layer by using a second laser beam to obtain a polycrystalline silicon film; wherein an overlapping rate of adjacent lasers of the first laser beam is greater than an overlapping rate of adjacent lasers of the second laser beam, and a pulse length of the first laser beam is greater than a pulse length of the second laser beam.

Description

Low-temperature polycrystalline silicon thin film, manufacturing method thereof, thin film transistor and display device
Technical Field
The invention relates to the technical field of display, in particular to a low-temperature polycrystalline silicon thin film, a manufacturing method thereof, a thin film transistor and a display device.
Background
The polysilicon Thin Film Transistor is widely applied to the display technology field because of its advantages of small power consumption and large electron mobility, the early polysilicon Thin Film Transistor has a process Temperature as high as 1000 ℃, so the selection of the substrate material is greatly limited, recently, due to the development of laser, the process Temperature can be reduced to below 600 ℃, and the polysilicon Thin Film Transistor obtained by using the process method is also called a Low Temperature polysilicon Thin Film Transistor (LTPS TFT).
The key technology for preparing LTPS TFT is crystallization for converting amorphous silicon into polysilicon, and the common methods in the prior art include various manufacturing methods such as Excimer Laser Annealing (ELA), solid-phase crystallization (SPC), Metal Induced Crystallization (MIC), and the like, while the polysilicon film of the transistor active layer in the backplane obtained by the ELA process is the only method for mass production.
However, in recent years, in the production by the ELA process, if the grain size of the obtained polycrystalline silicon thin film is large, the distribution of the grains is not uniform, and if the grain distribution of the obtained polycrystalline silicon thin film is uniform, the grain size is small. Therefore, a polysilicon thin film having both grain size and uniformity cannot be obtained at present.
Disclosure of Invention
Embodiments of the present invention provide a low temperature polysilicon thin film, a method for manufacturing the same, a thin film transistor, and a display device, which can solve the problem in the prior art that a polysilicon thin film with both grain size and uniformity cannot be obtained.
In order to achieve the above purpose, the embodiment of the invention adopts the following technical scheme:
in a first aspect, a method for fabricating a low temperature polysilicon thin film is provided, the method comprising: forming a first amorphous silicon layer on a substrate; carrying out first laser annealing treatment on the first amorphous silicon layer by adopting a first laser beam to obtain a polycrystalline silicon growth bottom layer; forming a second amorphous silicon layer on the substrate on which the polycrystalline silicon growth bottom layer is formed; performing second laser annealing treatment on the second amorphous silicon layer by using a second laser beam to obtain a polycrystalline silicon film; wherein an overlapping rate of adjacent lasers of the first laser beam is greater than an overlapping rate of adjacent lasers of the second laser beam, and a pulse length of the first laser beam is greater than a pulse length of the second laser beam.
Optionally, the overlapping ratio of adjacent lasers of the first laser beam is 97% to 98%.
Optionally, the overlapping ratio of adjacent lasers of the second laser beam is 95% to 96.5%.
Optionally, the thickness of the first amorphous silicon layer is smaller than that of the second amorphous silicon layer.
Optionally, the thickness of the first amorphous silicon layer is 300-400 nm.
Optionally, the thickness of the second amorphous silicon layer is 400-500 nm.
Optionally, the pulse length of the first laser beam is 50-70 s.
Optionally, the pulse length of the second laser beam is 20-30 s.
In a second aspect, a low temperature polysilicon thin film is provided, which is manufactured by the method for manufacturing a low temperature polysilicon thin film of the first aspect.
In a third aspect, a thin film transistor is provided, and the active layer of the thin film transistor adopts the low-temperature polysilicon thin film of the second aspect.
In a fourth aspect, a display device is provided, which includes the thin film transistor of the third aspect.
The embodiment of the invention provides a low-temperature polycrystalline silicon thin film and a manufacturing method thereof, a thin film transistor and a display device. The array-type protrusions on the polycrystalline silicon growth bottom layer can be used as crystal seeds for crystallizing the second amorphous silicon layer to grow large and orderly crystal grains again, so that the second amorphous silicon layer is deposited on the polycrystalline silicon growth bottom layer again, the second amorphous silicon layer is subjected to laser annealing by using a second laser beam with shorter pulse length and lower overlapping rate of adjacent lasers, the second amorphous silicon layer can also grow large and uniform crystal grains by virtue of the excellent polycrystalline silicon growth bottom layer of the first layer, and the polycrystalline silicon thin film has arrangement orientation. And can simultaneously keep the low surface roughness of the final polycrystalline silicon film under the condition of shorter pulse length.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a flowchart of a method for manufacturing a low temperature polysilicon thin film according to an embodiment of the present invention;
FIGS. 2-5 are schematic views illustrating a process for fabricating a low temperature polysilicon thin film according to the present invention;
fig. 6 is a schematic structural diagram of a polysilicon growth underlayer according to an embodiment of the present invention.
Reference numerals
10-a substrate; 20-a first amorphous silicon layer; 21-a polysilicon growth bottom layer; 30-a second amorphous silicon layer; 31-a polysilicon film; 40-buffer layer.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The embodiment of the invention provides a method for manufacturing a low-temperature polycrystalline silicon thin film, which comprises the following steps of:
s10, as shown in fig. 2, the first amorphous silicon layer 20 is formed on the substrate 10.
The method for forming the first amorphous silicon layer 20 on the substrate 10 includes Deposition, coating, etc., and the present invention uses a Plasma Enhanced Chemical Vapor Deposition (PECVD) technique to deposit the first amorphous silicon layer 20 on the substrate 10.
The thickness of the first amorphous silicon layer 20 may be, for example, 300 to 400nm, specifically, 320nm, 340nm, 360nm, and 380nm, and the suitable thickness may improve the uniformity of the protrusions.
S20, as shown in fig. 3, the first laser beam is used to perform the first laser annealing process on the first amorphous silicon layer 20, so as to obtain the polysilicon growth bottom layer 21.
The overlapping ratio of the adjacent laser beams of the first laser beam may be, for example, 97% to 98%, and specifically, may be, for example, 97.2%, 97.4%, 97.5%, 97.6%, and 97.8%. The suitable overlapping rate of the adjacent lasers enables the crystallization degree of the first amorphous silicon layer 20 to be good, and is beneficial to the homogenization of the protrusion.
The pulse length of the first laser beam may be, for example, 50 to 70 seconds, specifically, 55 seconds, 60 seconds, or 65 seconds. And the pulse lengthening device is started to lengthen the pulse length, the proper pulse length is beneficial to the formation of the protrusion, and the crystal seed layer is manufactured through the protrusion to guide the growth of the crystal grains in the second amorphous silicon layer.
Here, the first amorphous silicon layer 20(a-Si) may be annealed using, for example, a xenon chloride (XeCl) excimer laser (wavelength 308nm) to obtain the polycrystalline silicon growth underlayer 21.
S30, as shown in fig. 4, a second amorphous silicon layer 30 is formed on the substrate 10 on which the polysilicon growth primer layer 21 is formed.
The method of forming the second amorphous silicon layer 30 on the substrate 10 having the polysilicon growth primer layer 21 formed thereon is deposition, coating, etc., and the present invention deposits the second amorphous silicon layer 30 on the substrate using PECVD technique.
The thickness of the second amorphous silicon layer 30 may be, for example, 400 to 500nm, and specifically, may be, for example, 420nm, 440nm, 460nm, and 480 nm. The appropriate thickness not only increases the grain size but also reduces the surface roughness of the polysilicon thin film 31.
S40, as shown in fig. 5, the second laser beam is used to perform the second laser annealing process on the second amorphous silicon layer 30, so as to obtain the polysilicon thin film 31.
The overlapping ratio of the adjacent laser beams of the second laser beam may be, for example, 95% to 96.5%, specifically, 95.2%, 95.4%, 95.5%, 95.6%, 95.8%, 96.0%, and 96.2%. The second amorphous silicon layer 30 has the crystal grain guidance on the polycrystalline silicon growth bottom layer 21 in the process of generating crystal grains, and the overlapping rate of proper adjacent lasers is not required to be too high, so that the yield is improved.
The pulse length of the second laser beam may be, for example, 20 to 30s, specifically, 22s, 24s, 25s, 26s, and 28 s. Here, the pulse lengthening device is turned off, and the surface roughness of the polysilicon thin film 31 can be reduced by selecting an appropriate pulse length without lengthening the pulse length.
Here, the polysilicon thin film 31 can be obtained by annealing the second amorphous silicon layer 30(a-Si) with an excimer laser such as xenon chloride, krypton fluoride, or argon fluoride, or a solid-state laser (green laser having a wavelength of 532 nm).
It should be noted that, during the manufacturing process, the overlapping rate of the adjacent laser of the first laser beam should be greater than the overlapping rate of the adjacent laser of the second laser beam, and the pulse length of the first laser beam should be greater than the pulse length of the second laser beam. Then, during the first laser annealing, the pulse lengthening device must be turned on so that the pulse length of the first laser beam should be longer than the pulse length of the second laser beam.
Preferably, the thickness of the second amorphous silicon layer 30 is greater than the thickness of the first amorphous silicon layer 20.
Since the height of the protrusion formed by the first amorphous silicon layer 20 after laser annealing is negligible compared with the thickness of the second amorphous silicon layer 30, the influence on the flatness of the surface of the amorphous silicon layer 30 is small after the second amorphous silicon layer 30 is formed on the polysilicon growth layer 21, so that the roughness of the polysilicon thin film 31 formed after the second laser annealing is low.
According to the method for manufacturing the low-temperature polycrystalline silicon thin film, provided by the embodiment of the invention, the first laser beam with longer pulse length and higher overlapping rate of adjacent lasers is used for carrying out laser annealing on the first amorphous silicon layer 20, so that the polycrystalline silicon growth bottom layer 21 with obvious surface protrusions and regularly arranged and distributed protrusions can be grown. Since the arrayed protrusions on the polysilicon growth underlayer 21 can be used as the crystallization seeds of the second amorphous silicon layer 30 to grow large and regular crystal grains again, the second amorphous silicon layer 30 is deposited again on the polysilicon growth underlayer 21, and the second amorphous silicon layer 30 is subjected to laser annealing using a second laser beam having a shorter pulse length and a lower overlap ratio of adjacent lasers with respect to the second amorphous silicon layer 30, so that the second amorphous silicon layer 30 can also grow large and uniform crystal grains by virtue of the first excellent polysilicon growth underlayer 21, and the polysilicon thin film 31 has an alignment orientation. And also can simultaneously maintain the low surface roughness of the final polysilicon thin film 31 under the condition of shorter pulse length.
Therefore, the low-temperature polycrystalline silicon film manufactured by the method for manufacturing the low-temperature polycrystalline silicon provided by the invention has larger grain size and uniform distribution (belongs to a tetragonal crystal system and is high-quality polycrystalline silicon with a crystal orientation index of 100), and simultaneously solves the problems of lower mobility and non-uniform mobility and threshold voltage when being applied to a backboard of a low-temperature polycrystalline silicon display. The method is suitable for the fields of low-temperature polysilicon active matrix organic light emitting diode displays (LTPS-AMOLED), low-temperature polysilicon thin film transistor liquid crystal displays (LTPS TFT-LCD) and the like.
Preferably, the method further includes forming a buffer layer 40 on the substrate 10 before the step S10.
The buffer layer 40 is formed on the substrate 10 by deposition, coating, etc., and the present invention deposits the buffer layer 40 on the substrate 10 using PECVD technique. The PECVD has the advantages of low basic temperature, high deposition rate, good film forming quality and the like, thereby being widely applied to the field of low-temperature polycrystalline silicon film manufacturing.
The substrate 10 may be a glass or non-silicon substrate, and the non-silicon substrate may be, for example: a flexible Polyimide (PI) substrate, a transparent ceramic substrate or a polymer transparent film substrate. The back surface of the flexible PI substrate is attached to the transparent material substrate. The transparent porcelain substrate includes, for example, alumina (A1)2O3) Oxygen memory (Y)2O3) Magnesium oxide (MgO), calcium oxide (CaO), barium dioxide (TiO)2) The hypo-oxidized oyster (ThO)2) Thorium dioxide (ZrO)2) Isooxide transparent ceramic substrate, and nitriding rate (AlN), zinc sulfide (ZnS), zinc selenide (ZnSe), magnesium fluoride (MgF)2) Calcium fluoride (CaF)2) And the like non-oxide transparent ceramic substrates.
Optionally, the buffer layer 40 is a double-layer structure of SiNx (silicon oxide)/SiO2(silicon nitride) film, wherein the SiNx thickness is 50-150nm, SiO2The thickness is 100-350 nm.
Due to SiO2Polysilicon with better crystal phase is easier to form than SiNx, and SiNx has better effect of blocking pollutants from the substrate, so that the upper layer of the buffer layer is preferably SiO2And the lower layer is SiNx.
Optionally, the buffer layer 40 is SiNx or SiO with a single-layer structure2A film of SiNx 50-150nm in thickness and SiO2The thickness is 100-350 nm.
The buffer layer 40 is formed on the substrate to prevent metal ions in the substrate from diffusing into the polysilicon thin film region to generate defect centers and thus increase leakage current. A buffer layer 40 of suitable thickness may also improve the quality of the polysilicon back interface and reduce thermal conduction, slowing the cooling rate of the laser heated silicon, helping to form larger polysilicon grains.
Further preferably, the thickness of the buffer layer 40 is 150-500 nm.
In the embodiment of the present invention, before the process of manufacturing the polysilicon thin film is performed, the substrate 10 may be further cleaned.
The method for manufacturing a low temperature polysilicon thin film according to the present invention will be described below with reference to a specific example.
S100, forming a buffer layer 40 on the substrate 10, wherein the buffer layer 10 is a single-layer SiO2And the thickness is 200 nm.
S200, forming a first amorphous silicon layer 20 on the substrate 10 with the buffer layer 40 by adopting a PECVD technology, wherein the thickness of the first amorphous silicon layer 20 is 350 nm.
S300, a first laser beam with the pulse length of 68S and the overlapping rate of adjacent lasers of 97.7% is emitted by a xenon chloride excimer laser to carry out laser annealing on the first amorphous silicon layer 20, and a polycrystalline silicon growth bottom layer 21 is obtained.
Here, by laser annealing the first amorphous silicon layer 20 using the first laser beam having a pulse length of 68s and an overlap ratio of adjacent lasers of 97.7%, as shown in fig. 6, the polysilicon growth underlayer 21 of the arrayed protrusions can be grown.
S400, forming a second amorphous silicon layer 30 on the surface of the polycrystalline silicon growth bottom layer 21 on the substrate 10 with the polycrystalline silicon growth bottom layer 21 by adopting a PECVD (plasma enhanced chemical vapor deposition) technology, wherein the thickness of the second amorphous silicon layer 30 is 450 nm.
And S500, performing laser annealing on the second amorphous silicon layer 30 by using a second laser beam which is emitted by a xenon chloride excimer laser and has the pulse length of 23S and the overlapping rate of adjacent lasers of 95.3% to obtain the polycrystalline silicon thin film 31.
Here, the protrusions on the polycrystalline silicon growth underlayer 21 guide the growth of a-Si as a seed for crystallization of the second amorphous silicon layer 30, so that the second amorphous silicon layer 30 generates large and ordered crystal grains. The size of the crystal grain generated in the prior art is only about 0.3 μm, but the size of the crystal grain in the low-temperature polycrystalline silicon film manufactured by the method for manufacturing the low-temperature polycrystalline silicon provided by the embodiment of the invention can reach about 0.4 μm. In addition, the pulse length of the second laser beam is smaller during the second laser annealing, so that the protrusion formed on the surface of the polycrystalline silicon thin film 31 is smaller, the surface roughness of the polycrystalline silicon thin film 31 is reduced, and the electron mobility is improved.
The embodiment of the invention also provides a low-temperature polycrystalline silicon film which is prepared by the preparation method of the low-temperature polycrystalline silicon film.
The low-temperature polycrystalline silicon film manufactured by the method for manufacturing the low-temperature polycrystalline silicon has larger grain size and uniform distribution (belongs to a tetragonal crystal system and is high-quality polycrystalline silicon with a crystal orientation index of 100), and simultaneously solves the problems of lower mobility and non-uniform mobility and threshold voltage when being applied to a backboard of a low-temperature polycrystalline silicon display. The method is suitable for the fields of low-temperature polysilicon active matrix organic light emitting diode displays (LTPS-AMOLED), low-temperature polysilicon thin film transistor liquid crystal displays (LTPS TFT-LCD) and the like. In the current products with high PPI (pixel Per Inch) and high image quality requirements, the need for such excellent polysilicon is particularly demanding and commercially available in some high-end products.
The embodiment of the invention also provides a thin film transistor which comprises the low-temperature polycrystalline silicon thin film, and the beneficial effect of the thin film transistor is the same as that of the low-temperature polycrystalline silicon thin film, and the details are not repeated here.
The embodiment of the invention also provides a display device which comprises the thin film transistor.
The display device may be a display panel or a display device including a display panel.
The display device can be specifically an organic electroluminescent diode display, a liquid crystal television, a digital photo frame, a mobile phone, a tablet personal computer, a navigator and other products or components with any display function.
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all the changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the appended claims.

Claims (9)

1. A method for manufacturing a low-temperature polycrystalline silicon thin film is characterized by comprising the following steps:
forming a first amorphous silicon layer on a substrate;
carrying out first laser annealing treatment on the first amorphous silicon layer by adopting a first laser beam to obtain a polycrystalline silicon growth bottom layer;
forming a second amorphous silicon layer on the substrate on which the polycrystalline silicon growth bottom layer is formed;
performing second laser annealing treatment on the second amorphous silicon layer by using a second laser beam to obtain a polycrystalline silicon film;
wherein the overlapping rate of the adjacent lasers of the first laser beam is greater than the overlapping rate of the adjacent lasers of the second laser beam, and the pulse length of the first laser beam is greater than the pulse length of the second laser beam; the overlapping rate of adjacent lasers of the first laser beam is 97% -98%.
2. The method of claim 1, wherein the overlapping ratio of adjacent ones of the second laser beams is 95% to 96.5%.
3. The method of claim 1, wherein a thickness of the first amorphous silicon layer is less than a thickness of the second amorphous silicon layer.
4. The method according to claim 1, wherein the first amorphous silicon layer has a thickness of 300 to 400 nm;
the thickness of the second amorphous silicon layer is 400-500 nm.
5. The method of claim 1, wherein the pulse length of the first laser beam is 50-70 s.
6. The method of claim 1, wherein the pulse length of the second laser beam is 20-30 s.
7. A low-temperature polysilicon thin film, characterized by being produced by the method for producing a low-temperature polysilicon thin film according to any one of claims 1 to 6.
8. A thin film transistor, wherein the low temperature polysilicon thin film of claim 7 is used as an active layer of the thin film transistor.
9. A display device comprising the thin film transistor according to claim 8.
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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102651311A (en) * 2011-12-20 2012-08-29 京东方科技集团股份有限公司 Preparation method of low-temperature polycrystalline silicon film and low-temperature polycrystalline silicon film
CN104362084A (en) * 2014-10-08 2015-02-18 昆山工研院新型平板显示技术中心有限公司 Low-temperature polycrystalline silicon thin film and preparation method thereof and low-temperature polycrystalline silicon thin film transistor

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009076707A (en) * 2007-09-21 2009-04-09 Hitachi Displays Ltd Method of manufacturing display device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102651311A (en) * 2011-12-20 2012-08-29 京东方科技集团股份有限公司 Preparation method of low-temperature polycrystalline silicon film and low-temperature polycrystalline silicon film
CN104362084A (en) * 2014-10-08 2015-02-18 昆山工研院新型平板显示技术中心有限公司 Low-temperature polycrystalline silicon thin film and preparation method thereof and low-temperature polycrystalline silicon thin film transistor

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