JPH04125975A - Semiconductor element and manufacture thereof - Google Patents

Abstract

PURPOSE:To prevent the generation of an avalanche breakdown in bevel surfaces by a method wherein the thickness of a layer between a low-impurity concentration layer located on the side of one side of p-n junctions in a semiconductor substrate having positive bevels and a high-impurity concentration layer of the same conductivity type as that of the layer adjacent to the high-impurity concentration layer is made thin in the central part of the substrate. CONSTITUTION:The thickness of an n<+> layer 4 is formed thick in the central part of a silicon substrate 1 and the thickness of an n-type layer 2 is formed thinner in the central part of the substrate than that of the layer 2 at the peripheral parts of the substrate 1. When a reverse voltage is applied to this element, an avalanche breakdown is caused in the central part of the substrate earlier than those in bevel surfaces 5 where a defect and a dirt are easy to exist. Thereby, discharge on the bevel surfaces 5 and the deterioration of the bevel surfaces 5 can be reduced.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention provides a PN junction between a first layer of a first conductivity type with a low impurity concentration and a layer of a second conductivity type with a higher impurity concentration. , relates to a semiconductor element exposed on the side surface of a semiconductor element whose area is inclined so that the area becomes smaller toward a second layer, and a method for manufacturing the same.

[Conventional technology]

As shown in FIG. 2, a semiconductor device called a mesa-type semiconductor device is made up of two layers 3 and N″ layer 4 sandwiching an N layer 2 of a silicon substrate 1, and a PN junction 2 parallel to the main surface of the base plate.
3 and NN' junction 24. Then, a sloped surface such that the area of the main surface on the side of the second layer 3 is reduced, that is, a beveled surface 5 is formed, and the PN junction 23 is exposed on this beveled surface. The exposed portion is protected by a glass layer 6.

[Problem to be solved by the invention]

When a reverse voltage is applied to the diode shown in FIG. 2, the depletion layer 7 spreads from the PN junction 23 toward the two opposing main surfaces, as shown in FIG. At this time, the width 13 of the depletion layer on the surface of the beveled surface 5 is the width inside the semiconductor substrate! ! (l, <18), so when the beveled surface of the depletion layer 7, which has the narrowest width, reaches the dielectric breakdown electric field, avalanche breakdown occurs in this semiconductor device. .

That is, a large current flows through the beveled surface during avalanche breakdown, and even before avalanche breakdown, a larger electric field is applied than inside the semiconductor substrate. This is because the Beher of this element is a negative Behr. Since such a negative bevel surface 5 is always subjected to a large load, if there are defects or dirt on the protective film 6 covering the surface or the interface between the protective film 6 and the silicon base plate 1,
Discharge and deterioration occur from that part, and for this reason,
This type of semiconductor device has a problem in that it is easily deteriorated when a high reverse voltage is applied or when avalanche breakdown occurs.

SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor element with high breakdown voltage and a method for manufacturing the same, which can solve the above problems and prevent avalanche breakdown from occurring on the bevel surface of a negative bevel.

[Means to solve the problem]

In order to achieve the above object, the present invention provides that a PN junction between a first layer of a first conductivity type with a low impurity concentration and a second layer of a second conductivity type with a higher impurity concentration is formed in the second layer. In a semiconductor element exposed on the side surface of a semiconductor element whose area is sloped toward the side, a third layer of the first conductivity type having a higher impurity concentration than the first layer is formed on the opposite side of the second layer of the first layer. is provided, and the thickness of the first layer between the second layer and the third layer is smaller in the central part of the blank than in the peripheral part. Further, the method for manufacturing a semiconductor device of the present invention includes a step of forming a layer of a second conductivity type with a uniform depth by diffusion of impurities from one main surface of a semiconductor substrate of a first conductivity type; forming a highly impurity-concentrated first conductivity type layer having a lattice-shaped shallow portion by selectively diffusing impurities from the lattice-shaped shallow portion of the lattice-shaped shallow portion of the high impurity concentration first conductivity type layer; A process of etching from one main surface area of the semiconductor substrate to form a recess whose deepest part is deeper than the depth of the second conductivity type layer, and a process of depositing a protective film on the inner surface of the recess; The method includes a step of attaching an electrode to the surface, and a step of dividing the semiconductor substrate along a plane perpendicular to the main surface passing through the deepest part of the recess to obtain semiconductor blanks. Then, after forming a first conductivity type layer with a high impurity concentration on the main surface of the semiconductor substrate, a lattice-shaped oxide film is formed, and then a layer containing an impurity element is deposited on the oxide film surface and the exposed surface of the substrate, It is effective to then diffuse impurities through heat treatment.

[Effect]

Since the thickness of the first conductivity type layer with low impurity concentration on one side of the PN junction is thin in the center, when a reverse voltage is applied to this semiconductor device, the depletion layer is reduced in the low voltage region as in the conventional device. However, when the voltage becomes higher and the depletion layer reaches the layer of the first conductivity type with a high impurity concentration, the expansion of the depletion layer inside the semiconductor substrate is suppressed and the layer of the first conductivity type with a low impurity concentration is suppressed. The depletion layer spreads as it is from the periphery where the thickness is thicker to the bevel surface. Therefore, the depletion layer width becomes larger on the bevel surface than inside the semiconductor blank, and avalanche breakdown also occurs inside the blank. In this region where high voltage leads to avalanche breakdown, the load is placed more on the inside of the semiconductor substrate than on the beveled surface, so discharge and deterioration on the beveled surface are significantly reduced, and the withstand voltage is improved.

〔Example〕

FIG. 1 shows a cross section of a diode element according to an embodiment of the present invention, and as is clear from FIG. 4 The thickness is the thickness at the center of the silicon base plate 1, and as a result, N
The thickness of FJ 2 is thinner at the center than at the periphery.

Figure 4 shows the state in which a reverse voltage is applied to the element, pN
The depletion layer 7 spreads from the junction 23 to the high impurity concentration layer 4
Since it is suppressed by j! , >1. becomes.

FIGS. 5(8) to 5(el) show the manufacturing process of a diode element according to an embodiment of the present invention, and the same parts as those in the previous figures are given the same reference numerals. First, an N-type semiconductor Oxidation 11 is applied to the surface of the substrate 10 by thermal oxidation at 1050 to 1150°C.
oxide film 11 on the lower surface by photoetching.
pattern to leave a grid-like part (Fig. 5 (a)
l), then phosphorus diffusion such as phosphorus oxychloride on both sides l1l1
2 (Fig. 5(b)), and then coated with oxide film 1 on the top surface.
1 is removed and a boron diffusion source 13 is applied (Fig. 5 (C)
)) After this, when diffusion is performed at around 1250℃, the fifth
As shown in Figure (d), a PN junction 23 parallel to the main surface and a stepped NN'' junction 24 are formed. Due to the diffusion of phosphorus, a shallow N' layer 4 is formed on the surface layer of the substrate 10. Then, a resist film with an opening is formed on the surface opposite to the shallow part of the N' layer 4, and a mesa is formed by etching. A groove 8 is formed, and glass is applied to the inner surface of the mesa groove 8 to form a protective film 6 (Fig. 5(e)).
. Although not shown, finally both main surfaces 14 and 15 of the substrate 10
An electric bridge is applied to the substrate, and the mesa groove 8 is cut using a dicer using the deepest part to obtain a semiconductor device as shown in FIG.

〔Effect of the invention〕

According to the present invention, the thickness between a low impurity concentration layer and an adjacent high impurity concentration layer of the same conductivity type on one side of a PN junction of a semiconductor substrate having a negative bevel is reduced at the center of the substrate. C,
By allowing avalanche breakdown to occur at the center before the bevel surface where defects or dirt exist, electrical discharge and deterioration on the bevel surface are significantly reduced. Therefore, if the thickness of the low impurity concentration layer in the center of the substrate is kept the same as before, a device with improved breakdown voltage can be obtained compared to the conventional device, and if it is made thinner than before to the extent that the breakdown voltage does not decrease, the on-state voltage can be reduced. An element is obtained. Such devices can be easily fabricated by making the impurity diffusion depth shallow in a lattice pattern in a semiconductor substrate, forming mesa grooves from the main surface facing that area, and dividing the substrate through the deepest part of the mesa groove. It can be easily manufactured and the impurity diffusion depth can be made shallow in a lattice-like manner by forming a lattice-like oxide film pattern on the surface of a semiconductor substrate and diffusing impurities from the entire surface.

[Brief explanation of drawings]

Fig. 1 is a cross-sectional view of a semiconductor element of a diode element according to an embodiment of the present invention, Fig. 2 is a cross-sectional view of a semiconductor element of a conventional diode element, and Figs. 3 and 4 are Figs. Cross-sectional diagrams showing the spread of the depletion layer when reverse breakdown voltage is applied to the device,
FIG. 5 is a cross-sectional view showing the manufacturing process of a diode element according to an embodiment of the present invention in the order of (a) to to+. 1: Silicon base plate, 2: N layer, 3: 2 layers, 4: N layer,
5: bevel surface, 6: glass layer, 10: silicon substrate, 11: oxide film, 12: phosphorus diffusion source, 13: boron diffusion source, 23: PN junction. 1st JI Iwao Yamaguchi 23 PNJk 1st figure 2q 130th figure j

Claims (1)

[Claims] 1) A PN junction between a first layer of a first conductivity type with a low impurity concentration and a second layer of a second conductivity type with a higher impurity concentration has an area of A third layer of the first conductivity type having a higher impurity concentration than the first layer is provided on the side opposite to the second layer of the first layer, and the second layer is A semiconductor device characterized in that the thickness of the first layer between the first layer and the third layer is smaller in the central part of the blank than in the peripheral part. 2) Forming a layer of a second conductivity type with a uniform depth by diffusion of impurities from one main surface of the semiconductor substrate of the first conductivity type, and selective diffusion of impurities from the other main surface of the substrate. A step of forming a highly impurity-concentrated first conductivity type layer having a shallow lattice-shaped portion, and a region of one main surface of a semiconductor substrate facing the lattice-shaped shallow portion of the high impurity concentration first conductivity type layer. forming a recess whose deepest part is deeper than the second conductivity type layer by etching, a step of depositing a protective film on the inner surface of the recess, and a step of depositing electrodes on both main surfaces of the semiconductor substrate. A method for manufacturing a semiconductor device, comprising the steps of: obtaining a semiconductor substrate by dividing the semiconductor substrate along a plane perpendicular to the main surface passing through the deepest part of the recess. 3) In the method according to claim 2, after forming the highly impurity-concentrated first conductivity type layer on the other main surface of the semiconductor substrate to form a lattice-shaped oxide film, an impurity element is added to the oxide film surface and the exposed surface of the substrate. A method of manufacturing a semiconductor device, which comprises depositing a layer containing a compound and then diffusing impurities by heat treatment.