JPH0412503B2 - - Google Patents

Info

Publication number
JPH0412503B2
JPH0412503B2 JP57062566A JP6256682A JPH0412503B2 JP H0412503 B2 JPH0412503 B2 JP H0412503B2 JP 57062566 A JP57062566 A JP 57062566A JP 6256682 A JP6256682 A JP 6256682A JP H0412503 B2 JPH0412503 B2 JP H0412503B2
Authority
JP
Japan
Prior art keywords
pipeline
register
adder
vector
multiplier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57062566A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58181165A (ja
Inventor
Shigeo Abe
Tadaaki Bando
Kotaro Hirasawa
Toshuki Ide
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP57062566A priority Critical patent/JPS58181165A/ja
Priority to US06/485,396 priority patent/US4853890A/en
Publication of JPS58181165A publication Critical patent/JPS58181165A/ja
Publication of JPH0412503B2 publication Critical patent/JPH0412503B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G06F9/30134—Register stacks; shift registers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053—Vector processors
    • G06F15/8076—Details on data register access
    • G06F15/8084—Special arrangements thereof, e.g. mask or switch
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30105—Register structure
    • G06F9/30112—Register structure comprising data of variable length

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Complex Calculations (AREA)
  • Multi Processors (AREA)
JP57062566A 1982-04-16 1982-04-16 ベクトル演算プロセツサ Granted JPS58181165A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP57062566A JPS58181165A (ja) 1982-04-16 1982-04-16 ベクトル演算プロセツサ
US06/485,396 US4853890A (en) 1982-04-16 1983-04-15 Vector processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57062566A JPS58181165A (ja) 1982-04-16 1982-04-16 ベクトル演算プロセツサ

Publications (2)

Publication Number Publication Date
JPS58181165A JPS58181165A (ja) 1983-10-22
JPH0412503B2 true JPH0412503B2 (en, 2012) 1992-03-04

Family

ID=13203962

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57062566A Granted JPS58181165A (ja) 1982-04-16 1982-04-16 ベクトル演算プロセツサ

Country Status (2)

Country Link
US (1) US4853890A (en, 2012)
JP (1) JPS58181165A (en, 2012)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0650512B2 (ja) * 1984-07-11 1994-06-29 日本電気株式会社 デ−タ処理装置
US4683547A (en) * 1984-10-25 1987-07-28 International Business Machines Corporation Special accumulate instruction for multiple floating point arithmetic units which use a putaway bus to enhance performance
JPS6263370A (ja) * 1985-05-15 1987-03-20 Toshiba Corp 演算回路
JPS622363A (ja) * 1985-06-27 1987-01-08 Nec Corp 演算装置
JPS622364A (ja) * 1985-06-27 1987-01-08 Nec Corp 演算装置
JPS6222177A (ja) * 1985-07-22 1987-01-30 Oki Electric Ind Co Ltd デジタル信号処理装置
JPS6462764A (en) * 1987-09-03 1989-03-09 Agency Ind Science Techn Vector computer
JP2583774B2 (ja) * 1987-12-25 1997-02-19 ジーイー横河メディカルシステム株式会社 高速数値演算装置
US5293611A (en) * 1988-09-20 1994-03-08 Hitachi, Ltd. Digital signal processor utilizing a multiply-and-add function for digital filter realization
GB9412439D0 (en) * 1994-06-21 1994-08-10 Inmos Ltd Computer instruction pipelining
GB9412435D0 (en) * 1994-06-21 1994-08-10 Inmos Ltd Computer instruction addressing
US6009508A (en) * 1994-06-21 1999-12-28 Sgs-Thomson Microelectronics Limited System and method for addressing plurality of data values with a single address in a multi-value store on FIFO basis
US5771392A (en) * 1996-06-20 1998-06-23 Mathsoft, Inc. Encoding method to enable vectors and matrices to be elements of vectors and matrices
US6738840B1 (en) * 1999-08-31 2004-05-18 Koninklijke Philips Electronics N.V. Arrangement with a plurality of processors having an interface for a collective memory
US6922716B2 (en) * 2001-07-13 2005-07-26 Motorola, Inc. Method and apparatus for vector processing
US7206927B2 (en) * 2002-11-19 2007-04-17 Analog Devices, Inc. Pipelined processor method and circuit with interleaving of iterative operations

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4041461A (en) * 1975-07-25 1977-08-09 International Business Machines Corporation Signal analyzer system
US4179734A (en) * 1976-07-02 1979-12-18 Floating Point Systems, Inc. Floating point data processor having fast access memory means
US4075704A (en) * 1976-07-02 1978-02-21 Floating Point Systems, Inc. Floating point data processor for high speech operation
JPS5852265B2 (ja) * 1977-01-12 1983-11-21 株式会社日立製作所 デ−タ処理装置
JPS5532161A (en) * 1978-08-29 1980-03-06 Fujitsu Ltd Integration processing unit
US4247892A (en) * 1978-10-12 1981-01-27 Lawrence Patrick N Arrays of machines such as computers
US4229790A (en) * 1978-10-16 1980-10-21 Denelcor, Inc. Concurrent task and instruction processor and method
US4400778A (en) * 1979-11-05 1983-08-23 Litton Resources Systems, Inc. Large-volume, high-speed data processor
US4298936A (en) * 1979-11-15 1981-11-03 Analogic Corporation Array Processor
EP0042452B1 (en) * 1980-06-24 1984-03-14 International Business Machines Corporation Signal processor computing arrangement and method of operating said arrangement

Also Published As

Publication number Publication date
US4853890A (en) 1989-08-01
JPS58181165A (ja) 1983-10-22

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