JPH04121779U - TOT connection land - Google Patents

TOT connection land

Info

Publication number
JPH04121779U
JPH04121779U JP3527091U JP3527091U JPH04121779U JP H04121779 U JPH04121779 U JP H04121779U JP 3527091 U JP3527091 U JP 3527091U JP 3527091 U JP3527091 U JP 3527091U JP H04121779 U JPH04121779 U JP H04121779U
Authority
JP
Japan
Prior art keywords
film substrate
thin film
thick film
land
connection land
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3527091U
Other languages
Japanese (ja)
Inventor
秀司 小野
Original Assignee
株式会社富士通ゼネラル
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社富士通ゼネラル filed Critical 株式会社富士通ゼネラル
Priority to JP3527091U priority Critical patent/JPH04121779U/en
Publication of JPH04121779U publication Critical patent/JPH04121779U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】 【目的】TOTハイブリットICにおいて、厚膜フィル
ム基板に薄膜フィルム基板を実装する際、厚膜フィルム
基板のパターンに合わせ載置した薄膜フィルム基板が半
田溶融によって位置ズレし固着するのを防止することを
目的とする。 【構成】薄膜フィルム基板2に形成された接続ランド6
と対応するように厚膜フィルム基板1に凸状形接続ラン
ド3の突片部4を外向きに形成し、該凸状形接続ランド
3の肩部5を薄膜フィルム基板2の外縁に一致させ突片
部4が薄膜フィルム基板2の目印になるようにして構成
する。
(57) [Abstract] [Purpose] When mounting a thin film substrate on a thick film substrate in a TOT hybrid IC, the thin film substrate placed in accordance with the pattern of the thick film substrate shifts and becomes stuck due to solder melting. The purpose is to prevent [Structure] Connection land 6 formed on thin film substrate 2
The protruding piece 4 of the convex connecting land 3 is formed outwardly on the thick film substrate 1 so as to correspond to the above, and the shoulder portion 5 of the convex connecting land 3 is aligned with the outer edge of the thin film substrate 2. The structure is such that the projecting piece 4 serves as a mark on the thin film substrate 2.

Description

【考案の詳細な説明】[Detailed explanation of the idea]

【0001】0001

【産業上の利用分野】[Industrial application field]

TOTハイブリッドICにおいて、薄膜基板を厚膜基板に実装する際の厚膜基 板に形成するパターン形状に関するものである。 In TOT hybrid ICs, thick film substrates are used when mounting thin film substrates on thick film substrates. This relates to the pattern shape formed on the board.

【0002】0002

【従来の技術】[Conventional technology]

従来、シンオンシックフィルム(Thin On Thick film(以下TOTとする)) ハイブリッドICにおいて、厚膜基板に実装される薄膜基板はその一面に抵抗体 と導体より形成された回路パターンとそれらを厚膜基板と接続する端子ランドを その外縁に設けてある。従って厚膜基板に薄膜基板を実装する際薄膜基板のパタ ーン面は下向きであり厚膜基板の接続ランドとの位置合わせを容易にするため、 図3に示す如く厚膜基板の接続ランドを薄膜基板の外側に出てくるように大きく 形成していた。 Conventionally, Thin On Thick film (hereinafter referred to as TOT) In a hybrid IC, a thin film board mounted on a thick film board has a resistor on one side. circuit patterns formed from conductors and terminal lands connecting them to the thick film board. It is placed on its outer edge. Therefore, when mounting a thin film board on a thick film board, the pattern of the thin film board The ground surface faces downward to facilitate alignment with the connection land of the thick film board. As shown in Figure 3, make the connection land of the thick film board larger so that it comes out outside of the thin film board. was forming.

【0003】0003

【考案が解決しようとする課題】[Problem that the idea aims to solve]

前述のようにTOTハイブリッドICにおいて、厚膜基板に薄膜基板を実装す る際、位置合わせを容易にするため厚膜基板の接続ランドを長方形の大きなもの としているため、また半田ペーストを大きくしている接続ランド全面に塗布して いるために、半田溶融の際ランドが大きいため載置する領域より薄膜基板が不特 定の方向に引っ張られ位置ズレを生じてしまうという問題があった。 As mentioned above, in TOT hybrid IC, mounting a thin film substrate on a thick film substrate When installing, use a large rectangular connection land for the thick film board to facilitate alignment. Therefore, the solder paste is applied to the entire surface of the large connecting land. Therefore, when melting the solder, the land is large, so the thin film substrate may have irregularities compared to the area where it is placed. There was a problem in that it was pulled in a certain direction, causing positional deviation.

【0004】0004

【課題を解決するための手段】[Means to solve the problem]

上記課題を解決するために、回路部品を実装した厚膜基板上に印刷回路を形成 した薄膜基板を備えたハイブリッドICにおいて、厚膜基板に形成される薄膜基 板との接続ランドを凸状形とし、該凸部の突片を外側にして凸部の肩を載置する 薄膜基板の外縁に沿うように形成したことを特徴とするTOT実装ランドを提供 する。 In order to solve the above issues, a printed circuit is formed on a thick film substrate with circuit components mounted on it. In a hybrid IC equipped with a thin film substrate, the thin film base formed on the thick film substrate The connecting land with the plate is made into a convex shape, and the shoulder of the convex part is placed with the projecting piece of the convex part outside. We provide a TOT mounting land that is characterized by being formed along the outer edge of a thin film board. do.

【0005】[0005]

【作用】[Effect]

前述のように、厚膜基板に形成される凸状形接続ランドの凸部の突片を外側に 肩部を薄膜基板の外縁に一致するように形成することにより、凸部の突片が位置 合わせの目印となるうえ凸状形接続ランド全面に半田ペーストを塗布したとして も半田の溶融する場所が載置する薄膜基板と略同一面積であるため前後左右に位 置ズレすることはない。 As mentioned above, the protruding piece of the convex part of the convex connection land formed on the thick film board is turned outward. By forming the shoulder to match the outer edge of the thin film substrate, the protruding piece of the convex part can be positioned easily. Assuming that solder paste is applied to the entire surface of the convex shaped connection land as well as a mark for alignment. Since the area where the solder melts is approximately the same area as the thin film substrate on which it is placed, the area where the solder melts is It will not be misplaced.

【0006】[0006]

【実施例】【Example】

以下、この考案の実施例を図面を参照しながら詳細に説明する。図1は本考案 による厚膜基板の接続ランドの一実施例の平面図、図2は薄膜基板の接続ランド の一実施例の平面図である。 Hereinafter, embodiments of this invention will be described in detail with reference to the drawings. Figure 1 shows the present invention FIG. 2 is a plan view of an embodiment of a connection land of a thick film substrate according to FIG. 2 is a plan view of one embodiment of the invention.

【0007】 図において、1はベースとなるアルミナの厚膜基板であって、載置する薄膜基 板2の外縁に凸状形接続ランド3の突片4を外側し、肩部5を一致するように形 成してある。2はアルミナの薄膜基板であって、一面のみに図には示されていな いが印刷による抵抗体と導体で回路が形成され、それらの接続ランド6が基板の 端部に設けられている。[0007] In the figure, 1 is an alumina thick film substrate that serves as a base, and a thin film substrate to be placed on it. Shape the protrusion 4 of the convex connecting land 3 to the outside edge of the plate 2 so that the shoulder 5 coincides with the outer edge of the plate 2. It has been completed. 2 is an alumina thin film substrate, with only one side not shown in the figure. A circuit is formed with a resistor and a conductor printed by the insulator, and their connection lands 6 are connected to the board. provided at the end.

【0008】 以上のように構成された厚膜基板1の凸状形接続ランド3に半田ペーストを塗 布し薄膜基板2の接続ランド6が凸状形接続ランド3に当接するようにに載置し 、リフロー炉にて半田を溶融しても半田の溶融する場所が載置する薄膜基板と略 同一面積であるため薄膜基板が引っ張られてズレることはない。[0008] Apply solder paste to the convex connection lands 3 of the thick film substrate 1 configured as described above. Place the thin film substrate 2 so that the connection land 6 is in contact with the convex connection land 3. , abbreviated as a thin film substrate on which the place where the solder melts is placed even if the solder is melted in a reflow oven. Since the area is the same, the thin film substrate will not be pulled and shifted.

【0009】[0009]

【考案の効果】[Effect of the idea]

前述のように、厚膜基板に形成される凸状形接続ランドの凸部の突片を外側に 肩部を薄膜基板の外縁に一致するように形成することにより、凸部の突片が位置 合わせの目印となるうえ凸状形接続ランド全面に半田ペーストを塗布したとして も半田の溶融する場所が載置する薄膜基板と略同一面積であるため前後左右に位 置ズレすることなく接続ができ、回路がショートしたりオープンになったりして 不良品となることが無くなることは歩留りを向上させコスト低減に寄与すること 顕著である。 As mentioned above, the protruding piece of the convex part of the convex connection land formed on the thick film board is turned outward. By forming the shoulder to match the outer edge of the thin film substrate, the protruding piece of the convex part can be positioned easily. Assuming that solder paste is applied to the entire surface of the convex shaped connection land as well as a mark for alignment. Since the area where the solder melts is approximately the same area as the thin film substrate on which it is placed, the area where the solder melts is Connections can be made without misalignment, preventing short circuits or open circuits. Eliminating defective products improves yield and contributes to cost reduction. Remarkable.

【図面の簡単な説明】[Brief explanation of drawings]

【図1】本考案による厚膜基板の接続ランドの一実施例
の平面図である。
FIG. 1 is a plan view of an embodiment of a connection land of a thick film substrate according to the present invention;

【図2】本考案による薄膜基板の接続ランドの一実施例
の平面図である。
FIG. 2 is a plan view of an embodiment of a connection land of a thin film substrate according to the present invention;

【図3】従来の厚膜基板の接続ランドの一実施例の平面
図である。
FIG. 3 is a plan view of an embodiment of a connection land of a conventional thick film substrate.

【符号の説明】[Explanation of symbols]

1 厚膜基板 2 薄膜基板 3 凸状形接続ランド 4 突片部 5 肩部 6 薄膜基板接続ランド 7 接続ランド 1 Thick film substrate 2 Thin film substrate 3 Convex connecting land 4 Projection part 5 Shoulder 6 Thin film board connection land 7 Connecting land

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 【請求項1】回路部品を実装した厚膜基板上に印刷回路
を形成した薄膜基板を備えたハイブリッドICにおい
て、厚膜基板に形成される薄膜基板との接続ランドを凸
状形とし、該凸部の突片を外側にして凸部の肩を載置す
る薄膜基板の外縁に沿うように形成したことを特徴とす
るTOT実装ランド。
1. A hybrid IC comprising a thin film substrate on which a printed circuit is formed on a thick film substrate on which circuit components are mounted, wherein a connection land formed on the thick film substrate and connected to the thin film substrate is formed in a convex shape, and the convex A TOT mounting land characterized in that the shoulder of the convex part is formed along the outer edge of a thin film substrate on which the shoulder of the convex part is placed, with the protruding piece of the part facing outward.
JP3527091U 1991-04-18 1991-04-18 TOT connection land Pending JPH04121779U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3527091U JPH04121779U (en) 1991-04-18 1991-04-18 TOT connection land

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3527091U JPH04121779U (en) 1991-04-18 1991-04-18 TOT connection land

Publications (1)

Publication Number Publication Date
JPH04121779U true JPH04121779U (en) 1992-10-30

Family

ID=31917482

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3527091U Pending JPH04121779U (en) 1991-04-18 1991-04-18 TOT connection land

Country Status (1)

Country Link
JP (1) JPH04121779U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006104032A1 (en) * 2005-03-29 2006-10-05 Murata Manufacturing Co., Ltd. Electronic part mounting structure

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59232485A (en) * 1983-06-15 1984-12-27 株式会社日立製作所 Thick film circuit board
JPS6178127A (en) * 1984-09-26 1986-04-21 Toshiba Corp Thin film wiring substrate

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59232485A (en) * 1983-06-15 1984-12-27 株式会社日立製作所 Thick film circuit board
JPS6178127A (en) * 1984-09-26 1986-04-21 Toshiba Corp Thin film wiring substrate

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006104032A1 (en) * 2005-03-29 2006-10-05 Murata Manufacturing Co., Ltd. Electronic part mounting structure
JPWO2006104032A1 (en) * 2005-03-29 2008-09-04 株式会社村田製作所 Electronic component mounting structure
JP4618298B2 (en) * 2005-03-29 2011-01-26 株式会社村田製作所 Electronic component mounting structure
US8039758B2 (en) 2005-03-29 2011-10-18 Murata Manufacturing Co., Ltd. Mounting structure for electronic component

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